Abstract: A semiconductor device using a MEMS technology according to an example of the present invention comprises a cavity, a lower electrode provided in a lower part of the cavity, an actuator provided in an upper part or inside of the cavity, an upper electrode connected to the actuator, and a conductive layer in contact with the lower electrode outside the cavity via a contact hole whose bottom face is provided above an upper face of the lower electrode in the cavity.

Abstract: A semiconductor device using a MEMS technology according to an example of the present invention comprises a cavity, a lower electrode positioned below the cavity, a moving part positioned in the cavity, an upper electrode coupled with the moving part, a film which covers an upper part of the cavity and has an opening, and a material which closes the opening and seals the cavity.

Abstract: Fins of semiconductor are formed on the substrate. Each of the fins is located separately from one another. A gate insulating film is formed on side surfaces of the fins. A gate electrode is formed on the gate insulating film. The gate electrode extends to cross over the fins. A gate contact portion is provided to supply an electric signal. In the fins, first drain regions and first source regions are formed respectively so as to sandwich portions of the fins located below the gate electrode. A width of first one of the fins is larger than that of second one of the fins which is more distant from the gate contact portion than the first one of the fins.

Abstract: A semiconductor device includes first semiconductor layers with a first conductivity, second to fifth semiconductor layers with a second conductivity, gate electrodes, and a first wiring layer. The second semiconductor layers are each disposed between adjacent ones of the first semiconductor layers. The third semiconductor layer is in contact with the second semiconductor layers. The gate electrodes are formed on the second semiconductor layers. The fourth semiconductor layer is in contact with the third semiconductor layer. The first wiring layer is formed on the third semiconductor layer and commonly connects the gate electrodes. The length of the fourth semiconductor layer in the lengthwise direction is smaller than the length of the third semiconductor layer in the lengthwise direction. The fifth semiconductor layer is in contact with the fourth semiconductor layer and isolated from the first semiconductor layers by the fourth semiconductor layer.

Abstract: A semiconductor device according to one embodiment includes: a substrate; a plurality of fins made of a semiconductor and formed on the substrate; a plurality of via contact regions formed between the fins, the plurality of via contact regions and the plurality of the fins constituting a closed loop structure; a gate contact region on the substrate arranged at a position surrounded by the closed loop structure; a plurality of gate electrodes connected to the gate contact region respectively, each of the plurality of gate electrodes sandwiching both side faces of each of the plurality of fins between its opposite regions via gate insulating film; and source/drain regions formed in regions in the plurality of fins and in the contact region, the regions being formed on both sides of a region sandwiched by the gate electrodes along longitudinal direction of the fin.

Abstract: The drift region for increasing the breakdown voltage in an LDMOSFET is regarded as a resistive element. The potential distribution of the overall device is calculated by obtaining a potential distribution considering the resistance by iterative calculation. A capacitance generated in the drift region is analytically calculated assuming a linear potential distribution. A capacitance generated in the overlap region between the gate electrode and the drift region is calculated by considering the potential from the depletion region to the accumulation region.

Abstract: A semiconductor device has a plurality of fins formed on a semiconductor substrate to be separated from each other, a first contact region which connects commonly one end side of the plurality of fins, a second contact region which connects commonly the other end side of the plurality of fins, a gate electrode arranged to be opposed to at least both side surfaces of the plurality of fins by sandwiching a gate insulating film therebetween, a source electrode including the first contact region and the plurality of fins on a side closer to the first contact region than the gate electrode, and a drain electrode including the second contact region and the plurality of fins on a side closer to the second contact than the gate electrode. The ratio Rd/Rs of a resistance Rd of each fin in the drain region to a resistance Rs of each fin in the source region is larger than 1.

Abstract: A MEMS includes an actuator, first and second electrodes, and a fixed shaft. The actuator is provided above a substrate. The actuator has one end and the other end. The one end of the actuator is coupled relative to the substrate. The first electrode is arranged at a position facing the second electrode. The second electrode has one end and the other end. The one end of the second electrode is coupled to the other end of the actuator. The other end of the second electrode is a free end. The fixed shaft is connected to the second electrode between the one end thereof and the other end thereof. The first electrode faces the second electrode at a portion between the fixed shaft and the other end of the second electrode.

Abstract: A manufacturing method for a hollow sealing structure, includes, a process for filling a recessed portion in a principal surface of a substrate with a first sacrificial layer, a process for forming a functional element portion on the principal surface of the substrate, a process for forming a second sacrificial layer on the functional element portion so as to be connected to a part of the first sacrificial layer, a process for forming a covering portion over respective surfaces of the first and second sacrificial layers, a process for circulating a fluid for sacrificial layer removal through an opening in the covering portion in contact with the first sacrificial layer, thereby removing the first and second sacrificial layers, and a process for closing the opening.

Abstract: A semiconductor device having a surface MEMS element, includes a semiconductor substrate, and an actuator which is arranged above the semiconductor substrate via a space and has a lower electrode, an upper electrode, and a piezoelectric layer sandwiched between the lower electrode and the upper electrode, at least an entire surface of the piezoelectric layer being substantially flat.

Abstract: A semiconductor device includes a semiconductor substrate, an actuator provided above the semiconductor substrate to move upwardly, a first electrode layer which is moved by the actuator, and a cap portion provided above the first electrode layer and including a second electrode layer.

Abstract: A semiconductor device comprises: a p-type semiconductor substrate (1); an insulating film (3); a gate electrode (2) formed on the substrate via the insulating film; and an n-type source/drain region (5) formed on both sides of a channel forming region (4) located under the gate electrode (2) formed on the substrate (1). In particular, the thickness (TOX) of the insulating film (3) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (Lg) of the gate electrode (2) is determined to be equal to or less than 0.3 ?m; and further a voltage applied to the gate electrode (2) and the drain region (6) is determined to be 1.5 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (3), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.

Abstract: A MEMS includes an actuator, first and second electrodes, and a fixed shaft. The actuator is provided above a substrate. The actuator has one end and the other end. The one end of the actuator is coupled relative to the substrate. The first electrode is arranged at a position facing the second electrode. The second electrode has one end and the other end. The one end of the second electrode is coupled to the other end of the actuator. The other end of the second electrode is a free end. The fixed shaft is connected to the second electrode between the one end thereof and the other end thereof. The first electrode faces the second electrode at a portion between the fixed shaft and the other end of the second electrode.

Abstract: A semiconductor device comprises: a p-type semiconductor substrate (1); an insulating film (3); a gate electrode (2) formed an the substrate via the insulating film; and an n-type source/drain region (5) formed on both sides of a channel forming region (4) located under the gate electrode (2) formed on the substrate (1). In particular, the thickness (TOX) of the insulating film (3) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (Lg) of the gate electrode (2) is determined to be equal to or less than 0.3 ?m; and further a voltage applied to the gate electrode (2) and the drain region (6) is determined a be 1.5 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (3), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.

Abstract: A semiconductor device includes first semiconductor layers with a first conductivity, second to fifth semiconductor layers with a second conductivity, gate electrodes, and a first wiring layer. The second semiconductor layers are each disposed between adjacent ones of the first semiconductor layers. The third semiconductor layer is in contact with the second semiconductor layers. The gate electrodes are formed on the second semiconductor layers. The fourth semiconductor layer is in contact with the third semiconductor layer. The first wiring layer is formed on the third semiconductor layer and commonly connects the gate electrodes. The length of the fourth semiconductor layer in the lengthwise direction is smaller than the length of the third semiconductor layer in the lengthwise direction. The fifth semiconductor layer is in contact with the fourth semiconductor layer and isolated from the first semiconductor layers by the fourth semiconductor layer.

Abstract: A variable-capacitance element includes: a first electrode and a second electrode which are fixed on a substrate with a spacing; a movable electrode; an actuator which is supported on a supporting portion provided on the substrate to drive the movable electrode. The movable electrode is put in an electrically connecting state with the second electrode, when the movable electrode is driven to a first position by the actuator, and the movable electrode is put in an electrically non-connected state with the second electrode, when the movable electrode is driven to a second position by the actuator. The movable electrode is constituted to be always put in an electrically non-connected state with the first electrode.

Abstract: A semiconductor device includes a semiconductor substrate having a resistivity of at least 30 ?·cm, a first MISFET formed on the semiconductor substrate to function as a protective element, and a second MISFET protected by the first MISFET.

Abstract: A semiconductor device includes a semiconductor substrate, an actuator provided above the semiconductor substrate to move upwardly, a first electrode layer which is moved by the actuator, and a cap portion provided above the first electrode layer and including a second electrode layer.

Abstract: A semiconductor device using a MEMS technology according to an example of the present invention comprises a cavity, a lower electrode positioned below the cavity, a moving part positioned in the cavity, an upper electrode coupled with the moving part, a film which covers an upper part of the cavity and has an opening, and a material which closes the opening and seals the cavity.

Abstract: A semiconductor wafer includes a semiconductor bulk; a first insulating layer formed on the semiconductor bulk; a first semiconductor layer formed on the first insulating layer; a second insulating layer formed on the first semiconductor layer; and a second semiconductor layer formed on the second insulating layer.