Abstract: A semiconductor device using a MEMS technology according to an example of the present invention comprises a cavity, a lower electrode provided in a lower part of the cavity, an actuator provided in an upper part or inside of the cavity, an upper electrode connected to the actuator, and a conductive layer in contact with the lower electrode outside the cavity via a contact hole whose bottom face is provided above an upper face of the lower electrode in the cavity.

Abstract: A variable-capacitance element includes: a first electrode and a second electrode which are fixed on a substrate with a spacing; a movable electrode; an actuator which is supported on a supporting portion provided on the substrate to drive the movable electrode. The movable electrode is put in an electrically connecting state with the second electrode, when the movable electrode is driven to a first position by the actuator, and the movable electrode is put in an electrically non-connected state with the second electrode, when the movable electrode is driven to a second position by the actuator. The movable electrode is constituted to be always put in an electrically non-connected state with the first electrode.

Abstract: An element isolation region is formed in a surface region of a semiconductor substrate. A spiral-shaped inductor is formed above the element isolation region. A conductive region to which a constant potential is applied is formed inside the inner circumference of the inductor.

Abstract: At present, Cu (copper) is being used as a wiring material. In an RF-CMOS device as a combination of an RF analog device and CMOS logic device, two electrodes of a MIM capacitor are formed from Cu having a large diffusion coefficient. To prevent Cu from diffusing to the capacitor insulating film of the MIM capacitor, diffusion prevention films having a function of preventing diffusion of Cu are interposed between the capacitor insulating film and the two electrodes. As a result, Cu forming the electrodes does not diffuse to the capacitor insulating film.

Abstract: A semiconductor device having a surface MEMS element, includes a semiconductor substrate, and an actuator which is arranged above the semiconductor substrate via a space and has a lower electrode, an upper electrode, and a piezoelectric layer sandwiched between the lower electrode and the upper electrode, at least an entire surface of the piezoelectric layer being substantially flat.

Abstract: A first conductivity type well area is formed in a semiconductor substrate. A second conductivity type semiconductor layer is formed at a first area of a well area which is separated by element isolation areas. In a base portion of the well area, a first conductivity type low resistance area is provided.

Abstract: A semiconductor device includes a first chip having an inductor, a second chip stacked on the first chip and having a conductive layer, and a first magnetic shielding layer formed between the first and second chips.

Abstract: A semiconductor device comprises: a p-type semiconductor substrate (1); an insulating film (3); a gate electrode (2) formed an the substrate via the insulating film; and an n-type source/drain region (5) formed on both sides of a channel forming region (4) located under the gate electrode (2) formed on the substrate (1). In particular, the thickness (TOX) of the insulating film (3) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (Lg) of the gate electrode (2) is determined to be equal to or less than 0.3 ?m; and further a voltage applied to the gate electrode (2) and the drain region (6) is determined a be 1.5 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (3), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.

Abstract: A semiconductor device includes a semiconductor substrate having a resistivity of at least 30 ?·cm, a first MISFET formed on the semiconductor substrate to function as a protective element, and a second MISFET protected by the first MISFET.

Abstract: A convex polycrystalline silicon film is formed on a handle wafer. A semiconductor layer is formed on the polycrystalline silicon film. The semiconductor is thinner on its areas in which the convex polycrystalline silicon film is formed and is thicker on its areas in which the convex polycrystalline silicon film is not formed. An opening is formed in each of those areas of an insulating film which are located under respective thick-film semiconductor areas of the semiconductor layer. The polycrystalline silicon film is formed in the openings to connect electrically the thick-film semiconductor areas and the handle wafer together.

Abstract: A semiconductor device comprises: a p-type semiconductor substrate (1); an insulating film (3); a gate electrode (2) formed on the substrate via the insulating film; and an n-type source/drain region (5) formed on both sides of a channel forming region (4) located under the gate electrode (2) formed on the substrate (1). In particular, the thickness (TOX) of the insulating film (3) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (Lg) of the gate electrode (2) is determined to be equal to or less than 0.3 ?m; and further a voltage applied to the gate electrode (2) and the drain region (6) is determined to be 1.5 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (3), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.

Abstract: A substrate contains dissolved oxygen at a concentration of not more than 8×1017 atoms/cm3 and an impurity which is used as an acceptor or donor at a concentration of not more than 1×1015 atoms/cm3. In the substrate, an oxygen precipitation layer used to suppress occurrence of a slip starting from the rear surface of the substrate is formed. On the substrate, a silicon layer in which circuit elements are formed and which contains dissolved oxygen with at concentration of not more than 8×1017 atoms/cm3 and an impurity which is used as an acceptor or donor at a concentration of not more than 1×1015 atoms/cm3 is formed.

Abstract: At present, Cu (copper) is being used as a wiring material. In an RF-CMOS device as a combination of an RF analog device and CMOS logic device, two electrodes of a MIM capacitor are formed from Cu having a large diffusion coefficient. To prevent Cu from diffusing to the capacitor insulating film of the MIM capacitor, diffusion prevention films having a function of preventing diffusion of Cu are interposed between the capacitor insulating film and the two electrodes. As a result, Cu forming the electrodes does not diffuse to the capacitor insulating film.

Abstract: A substrate contains dissolved oxygen at a concentration of not more than 8×1017 atoms/cm3 and an impurity which is used as an acceptor or donor at a concentration of not more than 1×1015 atoms/cm3. In the substrate, an oxygen precipitation layer used to suppress occurrence of a slip starting from the rear surface of the substrate is formed. On the substrate, a silicon layer in which circuit elements are formed and which contains dissolved oxygen with at concentration of not more than 8×1017 atoms/cm3 and an impurity which is used as an acceptor or donor at a concentration of not more than 1×1015 atoms/cm3 is formed.

Abstract: A MOS transistor in a semiconductor device allows a surge current to flow between source and drain to protect main circuits, includes a first conductive type well formed in a semiconductor substrate and having a first impurity concentration. A source region as the source and a drain region as the drain are formed in the surface of the well to sandwich a channel region under a gate electrode which is provided above the well and is electrically connected to ground. The source region and the drain region have a second conductive type opposite to the first conductive type. One of them is electrically connected to ground. A first impurity diffusion region of the first conductive type is formed along the surfaces of the source and drain regions facing the channel region, and has a second impurity concentration higher than the first impurity concentration.

Abstract: At present, Cu (copper) is being used as a wiring material. In an RF-CMOS device as a combination of an RF analog device and CMOS logic device, two electrodes of a MIM capacitor are formed from Cu having a large diffusion coefficient. To prevent Cu from diffusing to the capacitor insulating film of the MIM capacitor, diffusion prevention films having a function of preventing diffusion of Cu are interposed between the capacitor insulating film and the two electrodes. As a result, Cu forming the electrodes does not diffuse to the capacitor insulating film.

Abstract: An aspect the present invention is to provide a semiconductor device including at least one MISFET structure having an element isolation region formed on a surface portion of a semiconductor substrate to have a closed region, an element region formed on the surface region of the semiconductor substrate to surround the element isolation region, a gate insulating film formed to cover at least the surface of the element region, a contact region formed on the element isolation region, and at least four gate electrodes connected to the contact region and formed on the surface of the element region via the gate insulating film to extend to at least outside the element region.

Abstract: A convex polycrystalline silicon film is formed on a handle wafer. A semiconductor layer is formed on the polycrystalline silicon film. The semiconductor is thinner on its areas in which the convex polycrystalline silicon film is formed and is thicker on its areas in which the convex polycrystalline silicon film is not formed. An opening is formed in each of those areas of an insulating film which are located under respective thick-film semiconductor areas of the semiconductor layer. The polycrystalline silicon film is formed in the openings to connect electrically the thick-film semiconductor areas and the handle wafer together.

Abstract: A semiconductor device comprises: a p-type semiconductor substrate (1); an insulating film (3); a gate electrode (2) formed on the substrate via the insulating film; and an n-type source/drain region (5) formed on both sides of a channel forming region (4) located under the gate electrode (2) formed on the substrate (1). In particular, the thickness (TOX) of the insulating film (3) is determined to be less than 2.5 nm at conversion rate of silicon oxide film (silicon oxide equivalent thickness); a gate length (Lg) of the gate electrode (2) is determined to be equal to or less than 0.3 &mgr;m: and further a voltage applied to the gate electrode (2) and the drain region (6) is determined to be 1.5 V or less. Therefore, in the MOSFET having the tunneling gate oxide film (3), the reliability of the transistor under the hot carrier stress can be improved, and the gate leakage current can be reduced markedly, so that the transistor characteristics can be improved markedly.

Abstract: A substrate contains dissolved oxygen at a concentration of not more than 8×1017 atoms/cm3 and an impurity which is used as an acceptor or donor at a concentration of not more than 1×1015 atoms/cm3. In the substrate, an oxygen precipitation layer used to suppress occurrence of a slip starting from the rear surface of the substrate is formed. On the substrate, a silicon layer in which circuit elements are formed and which contains dissolved oxygen with at concentration of not more than 8×1017 atoms/cm3 and an impurity which is used as an acceptor or donor at a concentration of not more than 1×105 atoms/cm3 is formed.