Patents by Inventor Tatsuya Okamoto

Tatsuya Okamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160260936
    Abstract: A method of producing an organic EL device includes forming an organic EL element including a pixel electrode, a functional layer, and a counter electrode over a substrate, forming a cathode protective layer over the organic EL element, forming a cover layer over the cathode protective layer, forming an organic buffer layer over the cover layer, and forming a gas barrier layer over the organic buffer layer.
    Type: Application
    Filed: February 10, 2016
    Publication date: September 8, 2016
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Tatsuya OKAMOTO, Takefumi FUKAGAWA
  • Patent number: 9406691
    Abstract: According to one embodiment, a non-volatile memory device includes a plurality of electrodes, at least one semiconductor layer, conductive layers, and first and second insulating films. The electrodes are arranged side by side in a first direction. The semiconductor layer extends into the electrodes in the first direction. The conductive layers are provided between each electrode and the semiconductor layer and separated from each other in the first direction. The first insulating film contacts the conductive layers, and extends in the first direction along the semiconductor layer between the conductive layers and the semiconductor layer. The second insulating film is provided between the first insulating film and the semiconductor layer. The first insulating film includes a first portion located between the conductive layers and the second insulating film, and a second portion located between the interlayer insulating film and the second insulating film.
    Type: Grant
    Filed: September 24, 2015
    Date of Patent: August 2, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masaaki Higuchi, Katsuyuki Sekine, Fumiki Aiso, Takuo Ohashi, Tatsuya Okamoto
  • Publication number: 20160020245
    Abstract: The imaging device includes a sensor substrate, a light-blocking substrate, a light-collecting substrate, a sealing material, and a light-transmitting member. The light-transmitting member includes a light-transmitting base disposed to be in contact with either the sensor substrate or the light-blocking substrate, and a light-transmitting resin which is filled between the base and the sensor substrate or the light-blocking substrate. A void is formed in at least a part of a space between the sealing material and the light-transmitting member.
    Type: Application
    Filed: September 28, 2015
    Publication date: January 21, 2016
    Inventors: Takefumi FUKAGAWA, Takashi MIYATA, Satoshi HIGUCHI, Tatsuya OKAMOTO
  • Patent number: 9240416
    Abstract: A semiconductor memory device according to an embodiment includes a stacked body with electrode films and inter-electrode insulating films alternately stacked therein, a semiconductor member, a charge accumulation film, an insulating member and a floating electrode member. The semiconductor member is provided in the stacked body. The insulating member is provided at a position opposed to the inter-electrode insulating film on a side surface of the charge accumulation film. The insulating member is divided for each of the inter-electrode insulating films. The floating electrode member is provided on a region of the side surface of the charge accumulation film not covered with the insulating member. The floating electrode member is in contact with the charge accumulation film. The floating electrode member is divided for each of the electrode films. The floating electrode member has higher conductivity than the charge accumulation film.
    Type: Grant
    Filed: September 16, 2014
    Date of Patent: January 19, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuhiro Shimura, Masaaki Higuchi, Hirokazu Ishigaki, Tatsuya Okamoto
  • Publication number: 20160013201
    Abstract: According to one embodiment, a non-volatile memory device includes a plurality of electrodes, at least one semiconductor layer, conductive layers, and first and second insulating films. The electrodes are arranged side by side in a first direction. The semiconductor layer extends into the electrodes in the first direction. The conductive layers are provided between each electrode and the semiconductor layer and separated from each other in the first direction. The first insulating film contacts the conductive layers, and extends in the first direction along the semiconductor layer between the conductive layers and the semiconductor layer. The second insulating film is provided between the first insulating film and the semiconductor layer. The first insulating film includes a first portion located between the conductive layers and the second insulating film, and a second portion located between the interlayer insulating film and the second insulating film.
    Type: Application
    Filed: September 24, 2015
    Publication date: January 14, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masaaki HIGUCHI, Katsuyuki SEKINE, Fumiki AISO, Takuo OHASHI, Tatsuya OKAMOTO
  • Publication number: 20150371997
    Abstract: According to one embodiment, a non-volatile memory device includes electrodes, one semiconductor layer, conductive layers, and first and second insulating films. The electrodes are arranged side by side in a first direction. The semiconductor layer extends into the electrodes in the first direction. The conductive layers are provided between each electrode and the semiconductor layer and separated from each other in the first direction. The first insulating film extends between the conductive layers and the semiconductor layer in the first direction. The second insulating film is provided between each electrode and the conductive layers. The conductive layers become smaller in a thickness as the conductive layers are closer to an end in the first direction or a direction opposite to the first direction.
    Type: Application
    Filed: September 11, 2014
    Publication date: December 24, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Masaaki HIGUCHI, Katsuyuki SEKINE, Fumiki AlSO, Tatsuya OKAMOTO, Masaru KITO
  • Publication number: 20150364485
    Abstract: A semiconductor memory device according to an embodiment includes a stacked body with electrode films and inter-electrode insulating films alternately stacked therein, a semiconductor member, a charge accumulation film, an insulating member and a floating electrode member. The semiconductor member is provided in the stacked body. The insulating member is provided at a position opposed to the inter-electrode insulating film on a side surface of the charge accumulation film. The insulating member is divided for each of the inter-electrode insulating films. The floating electrode member is provided on a region of the side surface of the charge accumulation film not covered with the insulating member. The floating electrode member is in contact with the charge accumulation film. The floating electrode member is divided for each of the electrode films. The floating electrode member has higher conductivity than the charge accumulation film.
    Type: Application
    Filed: September 16, 2014
    Publication date: December 17, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yasuhiro SHIMURA, Masaaki Higuchi, Hirokazu Ishigaki, Tatsuya Okamoto
  • Patent number: 9182273
    Abstract: The imaging device includes a sensor substrate, a light-blocking substrate, a light-collecting substrate, a sealing material, and a light-transmitting member. The light-transmitting member includes a light-transmitting base disposed to be in contact with either the sensor substrate or the light-blocking substrate, and a light-transmitting resin which is filled between the base and the sensor substrate or the light-blocking substrate. A void is formed in at least a part of a space between the sealing material and the light-transmitting member.
    Type: Grant
    Filed: August 20, 2013
    Date of Patent: November 10, 2015
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Takefumi Fukagawa, Takashi Miyata, Satoshi Higuchi, Tatsuya Okamoto
  • Patent number: 9166032
    Abstract: According to one embodiment, a non-volatile memory device includes a plurality of electrodes, at least one semiconductor layer, conductive layers, and first and second insulating films. The electrodes are arranged side by side in a first direction. The semiconductor layer extends into the electrodes in the first direction. The conductive layers are provided between each electrode and the semiconductor layer and separated from each other in the first direction. The first insulating film contacts the conductive layers, and extends in the first direction along the semiconductor layer between the conductive layers and the semiconductor layer. The second insulating film is provided between the first insulating film and the semiconductor layer. The first insulating film includes a first portion located between the conductive layers and the second insulating film, and a second portion located between the interlayer insulating film and the second insulating film.
    Type: Grant
    Filed: September 11, 2014
    Date of Patent: October 20, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masaaki Higuchi, Katsuyuki Sekine, Fumiki Aiso, Takuo Ohashi, Tatsuya Okamoto
  • Publication number: 20150255470
    Abstract: In accordance with an embodiment, a semiconductor memory device includes a substrate and memory transistors on the substrate. The substrate has a semiconductor layer having impurity diffusion regions which become sources or drains. The memory transistors share the impurity diffusion regions. Each of the memory transistors has a first insulating film on the substrate, a charge storage layer on the first insulating film, a second insulating film on the charge storage layer, and a control gate on the second insulating film. A bottom surface of the control gate is parallel to a top surface of the charge storage layer.
    Type: Application
    Filed: July 10, 2014
    Publication date: September 10, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Tatsuya Okamoto
  • Publication number: 20150200199
    Abstract: According to one embodiment, a semiconductor memory device includes a substrate, a semiconductor pillar provided on the substrate to extend in a vertical direction, a plurality of first electrode films provided sideward of the semiconductor pillar to extend in a first direction. The plurality of first electrode films are disposed to be separated from each other along the vertical direction. The semiconductor memory device further includes a plurality of second electrode films provided between the semiconductor pillar and the first electrode films. The plurality of second electrode films are disposed to be separated from each other along the vertical direction. The semiconductor memory device further includes a first insulating film provided between the semiconductor pillar and the second electrode films, and a second insulating film provided between the second electrode film and the first electrode film.
    Type: Application
    Filed: March 11, 2014
    Publication date: July 16, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Wataru SAKAMOTO, Ryota Suzuki, Tatsuya Okamoto, Tatsuya Kato
  • Patent number: 9059303
    Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes: a first stacked body having a gate insulating film, a first charge storage layer, a first insulating film, a second charge storage layer, and a second insulating film, a second element isolation region, a bottom and at least part of a side portion of the second element isolation region being in contact with the semiconductor substrate in the peripheral portion; and a second stacked body, a third insulating film, a first layer, a fourth insulating film, a second layer, and the second insulating film are stacked in this order from the semiconductor substrate side between the semiconductor substrate and the control gate electrode in the second stacked body in the peripheral portion, a side portion of the second stacked body being covered with the second insulating film.
    Type: Grant
    Filed: January 24, 2014
    Date of Patent: June 16, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenji Aoyama, Tatsuya Okamoto, Hiroki Yamashita, Masanari Hattori
  • Publication number: 20150069495
    Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes: a first stacked body having a gate insulating film, a first charge storage layer, a first insulating film, a second charge storage layer, and a second insulating film, a second element isolation region, a bottom and at least part of a side portion of the second element isolation region being in contact with the semiconductor substrate in the peripheral portion; and a second stacked body, a third insulating film, a first layer, a fourth insulating film, a second layer, and the second insulating film are stacked in this order from the semiconductor substrate side between the semiconductor substrate and the control gate electrode in the second stacked body in the peripheral portion, a side portion of the second stacked body being covered with the second insulating film.
    Type: Application
    Filed: January 24, 2014
    Publication date: March 12, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kenji AOYAMA, Tatsuya OKAMOTO, Hiroki YAMASHITA, Masanari HATTORI
  • Publication number: 20150060994
    Abstract: According to one embodiment, a non-volatile semiconductor memory device, includes: peripheral transistors including a second element isolation insulating film, a gate electrode, and a diffusion layer region, the second element isolation insulating film being configured to divide the semiconductor layer into at least two second semiconductor regions, the diffusion layer region being formed in the second semiconductor regions to be provided on two sides of the gate electrode; and a sidewall film provided at a side surface of the gate electrode. The second element isolation insulating film has a first portion and a second portion, the second portion is provided on two sides of the first portion, a width of a bottom portion of the first portion in an extension direction of the gate electrode is not more than twice a thickness of the sidewall film at a lower end of the sidewall film.
    Type: Application
    Filed: January 23, 2014
    Publication date: March 5, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Tatsuya KATO, Tatsuya Okamoto
  • Patent number: 8873266
    Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a first memory string including a first memory cell and a second memory cell aligned along a first axis, a source contact provided at a source-side end of the first memory string, a second memory string that extends along the first axis and includes a third memory cell that aligns with the first memory cell along a second axis perpendicular to the first axis, and a shield conductive layer. The shield conductive layer extends along the first axis between the first memory string and the second memory string and is electrically connected to the source contact.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: October 28, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tatsuya Okamoto
  • Publication number: 20140061431
    Abstract: The imaging device includes a sensor substrate, a light-blocking substrate, a light-collecting substrate, a sealing material, and a light-transmitting member. The light-transmitting member includes a light-transmitting base disposed to be in contact with either the sensor substrate or the light-blocking substrate, and a light-transmitting resin which is filled between the base and the sensor substrate or the light-blocking substrate. A void is formed in at least a part of a space between the sealing material and the light-transmitting member.
    Type: Application
    Filed: August 20, 2013
    Publication date: March 6, 2014
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Takefumi FUKAGAWA, Takashi MIYATA, Satoshi HIGUCHI, Tatsuya OKAMOTO
  • Publication number: 20120236652
    Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes a first memory string including a first memory cell and a second memory cell aligned along a first axis, a source contact provided at a source-side end of the first memory string, a second memory string that extends along the first axis and includes a third memory cell that aligns with the first memory cell along a second axis perpendicular to the first axis, and a shield conductive layer. The shield conductive layer extends along the first axis between the first memory string and the second memory string and is electrically connected to the source contact.
    Type: Application
    Filed: February 17, 2012
    Publication date: September 20, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Tatsuya OKAMOTO
  • Publication number: 20110126594
    Abstract: The present invention provides an apparatus for producing molten glass, an apparatus for producing glass products and a process for producing glass products, which achieve production of various types of glass products of small lot with high energy efficiency in a short time.
    Type: Application
    Filed: December 1, 2009
    Publication date: June 2, 2011
    Applicant: ASAHI GLASS COMPANY, LIMITED
    Inventors: Hiroshi Matsui, Tatsuya Okamoto, Shingo Yamada
  • Patent number: 6959240
    Abstract: A correction device determines, by calculation, a real acceleration based on output from a velocity sensor 4. GPS mediated signal receiving portion 2 receives radio navigation waves from plural GPS satellites. The device detects a frequency change of the radio waves evoked as a result of Doppler effect, acquires horizontal and vertical velocity components based on the frequency change, and determines, by calculation, a gradient angle. Then, the device determines, by calculation, the gravitational acceleration sine of the gradient angle (G. sin ?). The device adds the real acceleration and the gravitational acceleration sine of the gradient angle (G. sin ?) to provide a theoretical acceleration of the acceleration sensor. The device divides the theoretical acceleration of the acceleration sensor with the sensitivity of the acceleration sensor 6, and subtracts the result from output from the acceleration sensor 6, to provide a right offset value.
    Type: Grant
    Filed: April 14, 2003
    Date of Patent: October 25, 2005
    Assignee: Pioneer Corporation
    Inventor: Tatsuya Okamoto
  • Publication number: 20050038597
    Abstract: A sensing apparatus for use in a non-horizontally mounted vehicle navigation system includes a chip having a sensing element for detecting a direction based on an amount of a physical quantity applied thereto. The sensing element is arranged in the chip so as to at least partly compensate for the non-horizontal mounting of the vehicle navigation system in which the sensing apparatus is used.
    Type: Application
    Filed: September 13, 2004
    Publication date: February 17, 2005
    Inventors: Hitoshi Kaneko, Tatsuya Okamoto, Isao Endo