Abstract: A gas laser apparatus may include a chamber filled with a laser gas; a window provided in the chamber and through which a laser beam passes; an optical path tube connected to the chamber to surround a position of the window in the chamber; a heated gas supply port configured to supply a heated purge gas into a closed space including a space in the optical path tube; and an exhaust port configured to exhaust a gas in the closed space.

Abstract: A primary battery includes: a positive electrode including a positive electrode collector composed of a porous conductor, and a porous positive electrode layer disposed on the positive electrode collector, oxygen taken from outside of the primary battery through the positive electrode collector being allowed to diffuse into the porous positive electrode layer; a negative electrode including a negative electrode collector composed of a porous conductor, and a porous negative electrode layer disposed on the negative electrode collector, the porous negative electrode layer including lithium nitride composed of lithium and nitrogen, nitrogen generated during discharge being allowed to diffuse into the porous negative electrode layer; and a nonaqueous electrolytic solution disposed between the positive electrode and the negative electrode, the nonaqueous electrolytic solution containing a lithium salt.

Abstract: An evaporated fuel processing device for a forced induction internal combustion engine according to the present invention includes: a first purge path extending from the downstream of a purge control valve to an intake pipe at the downstream of a throttle valve; and a second purge path extending from the downstream of the purge control valve to an ejector provided in a reflux pipe providing communication between the intake pipe at the downstream of a compressor and the intake pipe at the upstream of the compressor. The evaporated fuel processing device switches first control characteristic data for the first purge path and second control characteristic data for the second purge path, when the first purge path and the second purge path are switched.

Abstract: A gas laser apparatus includes a chamber; a window provided in the chamber; an optical path tube connected to the chamber; a gas supply port that supplies a purge gas into the optical path tube; an exhaust port that exhausts a gas in the optical path tube; and a control unit, the exhaust port including a main exhaust port provided in the optical path tube, and an auxiliary exhaust port provided in the optical path tube upstream of a flow of the gas in the optical path tube with respect to positions of the window and the main exhaust port, the control unit causing the gas to be exhausted through the main exhaust port before a laser beam is emitted from the chamber and causing the gas to be exhausted through the auxiliary exhaust port in at least a partial period when the laser beam is emitted.

Abstract: A particle beam apparatus includes an object table configured to hold a semiconductor substrate; a particle beam source configured to generate a particle beam; a detector configured to detect a response of the substrate caused by interaction of the particle beam with the substrate and to output a detector signal representative of the response; and a processing unit configured to: receive or determine a location of one or more defect target areas on the substrate; control the particle beam source to inspect the one or more defect target areas; identify one or more defects within the one or more defect target areas, based on the detector signal obtained during the inspection of the one or more defect target areas; control the particle beam source to repair the one or more defects.

Abstract: An in-memory computing method and apparatus, adapted for a processor to perform MAC operations on a memory, are provided. In the method, a format of binary data of weights is transformed from a floating-point format into a quantized format by truncating at least a portion of fraction bits of the binary data and calculating complements of remaining bits, and programming the transformed binary data into cells of the memory. A tuning procedure is performed by iteratively inputting binary data of input signals into the memory, integrating outputs of the memory, and adjusting the weights programmed to the cells based on the integrated outputs. The binary data of the weights is reshaped based on a probability of reducing bits with a value of one in the binary data of each weight. The tuning procedure is repeated until an end condition is met.

Abstract: A method for cleaning debris and contamination from an etching apparatus is provided. The etching apparatus includes a process chamber, a source of radio frequency power, an electrostatic chuck within the process chamber, a chuck electrode, and a source of DC power connected to the chuck electrode. The method of cleaning includes placing a substrate on a surface of the electrostatic chuck, applying a plasma to the substrate, thereby creating a positively charged surface on the surface of the substrate, applying a negative voltage or a radio frequency pulse to the electrode chuck, thereby making debris particles and/or contaminants from the surface of the electrostatic chuck negatively charged and causing them to attach to the positively charged surface of the substrate, and removing the substrate from the etching apparatus thereby removing the debris particles and/or contaminants from the etching apparatus.

Abstract: An example of an apparatus includes a plurality of memory cells arranged in a plurality of NAND strings that are connected to a source line and a control circuit connected to the source line. The control circuit is configured to provide a first current to the source line to pre-charge the source line to a target voltage for sensing data states of the plurality of memory cells and provide a second current to the source line to return the source line to the target voltage in a recovery period between sensing data states. The control circuit is configured to provide the second current at any one of a plurality of current levels.

Abstract: Provided herein are devices, methods, and systems for polynucleotide synthesis comprising a thermocycler comprising a plurality of individual chambers having a capability to control its own temperature setting and a machine learning for generating a recommendation of a design of experiment for polynucleotide synthesis.

Abstract: First and second wires form a wire assembly by being wound around a winding core portion together. The wire assembly includes a twisted wire portion, an inner layer portion, an outer layer portion, a plurality of outward transition portions, and an inward transition portion. The outer layer portion includes a first outer layer portion which is connected to one of the outward transition portions extending from an intermediate position of the inner layer portion and connected to the inward transition portion. The inward transition portion extends to an intermediate position of the inner layer portion.

Abstract: The present invention provides a polyion complex which can efficiently deliver mRNA into a living body as well as a therapeutic agent and a therapeutic method of arthropathy in which the polyion complex is used. For example, there is provided a polyion complex comprising a cationic polymer and mRNA, wherein the cationic polymer is a polymer comprising a cationic unnatural amino acid as a monomer unit and the cationic unnatural amino acid is an amino acid having a group represented by —(NH—(CH2)2)p—NH2, wherein p is 2, 3 or 4, as a side chain.

Abstract: A cathode active material for magnesium secondary batteries includes a material containing magnesium, boron, and carbon. The material has a layered structure.

Abstract: A finFET device and methods of forming are provided. The method includes etching recesses in a substrate on opposite sides of a gate stack. The method also includes epitaxially growing a source/drain region in each recess, where each of the source/drain regions includes a capping layer along a top surface of the respective source/drain region, and where a concentration of a first material in each source/drain region is highest at an interface of the capping layer and an underlying epitaxy layer. The method also includes depositing a plurality of metal layers overlying and contacting each of the source/drain regions. The method also includes performing an anneal, where after the anneal a metal silicide region is formed in each of the source/drain regions, where each metal silicide region extends through the capping layer and terminates at the interface of the capping layer and the underlying epitaxy layer.

Abstract: The present disclosure relates generally to doping for conductive features in a semiconductor device. In an example, a structure includes an active region of a transistor. The active region includes a source/drain region, and the source/drain region is defined at least in part by a first dopant having a first dopant concentration. The source/drain region further includes a second dopant with a concentration profile having a consistent concentration from a surface of the source/drain region into a depth of the source/drain region. The consistent concentration is greater than the first dopant concentration. The structure further includes a conductive feature contacting the source/drain region at the surface of the source/drain region.

Abstract: This method includes a reference optical fiber transmission loss measurement step for measuring a reference optical fiber transmission loss measurement value, a difference value calculation step for subtracting the transmission loss reference value from the reference optical fiber transmission loss measurement value and calculating a transmission loss difference value, and a measured-optical-fiber measurement step for measuring the transmission loss of an optical fiber to be measured, the reference optical fiber transmission loss measurement step being repeatedly performed, a transmission loss difference value being calculated by performing the difference value calculation step each time a reference optical fiber transmission loss measurement value is obtained, a correction value being calculated on the basis of a plurality of transmission loss difference values, the measurement value obtained in the measured-optical-fiber measurement step being corrected using the correction value, and the transmission loss

Abstract: A memory management method includes: performing a bloom filtering operation on a plurality of logic block addresses to determine a read and written frequency of each of the logic block addresses; setting a first program/erase (P/E) cycle threshold and a second P/E cycle threshold value, wherein the first P/E cycle threshold value is smaller than the second P/E cycle threshold value; dividing each of physical memory blocks into a first type memory block, a second type memory block or a third type memory block according to the first P/E cycle threshold value and the second P/E cycle threshold value; and, allocating each of the logic block addresses to the first type memory block, the second type memory block or the third type memory block according to the read and written frequency of corresponding logic block addresses.

Abstract: First and second wires form a wire assembly by being wound around a winding core portion together. The wire assembly includes a twisted wire portion, an inner layer portion, an outer layer portion, a plurality of outward transition portions, and an inward transition portion. The outer layer portion includes a first outer layer portion which is connected to one of the outward transition portions extending from an intermediate position of the inner layer portion and connected to the inward transition portion. The inward transition portion extends to an intermediate position of the inner layer portion.

Abstract: In certain embodiments, a semiconductor device includes a substrate having an n-doped well feature and an epitaxial silicon germanium fin formed over the n-doped well feature. The epitaxial silicon germanium fin has a lower part and an upper part. The lower part has a lower germanium content than the upper part. A channel is formed from the epitaxial silicon germanium fin. A gate is formed over the epitaxial silicon germanium fin. A doped source-drain is formed proximate the channel.

Abstract: An object of the present invention is to provide a gel material including a solvophilic polymer having a ?m-scale porous structure. A polymer gel in which solvophilic polymer units are cross-linked with each other, wherein the polymer gel contains a solvent and has a three-dimensional network structure having two regions: a first region in which the polymer units are densely present and a second region in which the polymer units are sparsely present, and a mesh size composed of the first region is from 1 to 500 ?m.