Patents by Inventor Teru Nakanishi
Teru Nakanishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7218184Abstract: A superconducting filter including input/output feeders formed on one surface of a dielectric substrate, resonator patterns formed on one surface of the dielectric substrate, and a dielectric plate mounted on the one surface of the dielectric substrate with a plurality of spacers formed on said one surface of the dielectric substrate disposed therebetween. The dielectric plate covers the region including the resonator patterns, and the input/output feeders length-wise over the length within ±20% of positive integer times a ¼ effective wavelength from the sides nearer to the resonator patterns.Type: GrantFiled: September 27, 2004Date of Patent: May 15, 2007Assignee: Fujitsu LimitedInventors: Kazunori Yamanaka, Teru Nakanishi, Manabu Kai, Akihiko Akasegawa
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Patent number: 6980841Abstract: A resonator is formed by forming a microstrip line having an electrical length corresponding to a ?/2 wavelength on a dielectric substrate, forming both side portions of the microstrip line from the center thereof into spiral shapes, making the orientations of the spirals opposite each other, making outer-side portions of the spiral shapes on both sides, inclusive of the central portion of the microstrip line, linear in shape overall, and making linear in shape a portion of prescribed range from the end portion of each spiral shape.Type: GrantFiled: August 12, 2004Date of Patent: December 27, 2005Assignee: Fujitsu LimitedInventors: Manabu Kai, Kazunori Yamanaka, Teru Nakanishi, Akihiko Akasegawa
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Publication number: 20050272609Abstract: A transmission line is provided which has a low loss and can flow large current. A superconductor transmission line has: an internal conductor; and an external conductor surrounding the internal conductor, made of oxide superconductor and having four planes, which four planes have a cross section of a hollow quadrilateral with each corner portion being removed, and adjacent planes of which define a slit narrower than ?/4 (? being a wavelength of a high frequency wave to be transmitted).Type: ApplicationFiled: August 16, 2005Publication date: December 8, 2005Applicant: FUJITSU LIMITEDInventors: Akihiko Akasegawa, Kazunori Yamanaka, Teru Nakanishi
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Publication number: 20050257549Abstract: The high-frequency circuit cooling apparatus comprises a package container 14 for housing a high-frequency circuit, a tank 16 for storing a gas to be introduced into the package container 14, a cold head 12 for cooling the package container 14 and the tank 16, pipes 24, 26 connected to the tank 16, for supplying the gas into the tank 16, pipes 18, 22 detachably connected between the tank 16 and the package container 14, for introducing the gas in the tank 16 into the package container 14, and pipes 34, 36 detachably connected to the package container 14, for discharging the gas in the package container 14.Type: ApplicationFiled: September 23, 2004Publication date: November 24, 2005Applicant: FUJITSU LIMITEDInventors: Kazunori Yamanaka, Teru Nakanishi
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Publication number: 20050261135Abstract: The superconducting filter comprises input/output feeders 14a, 14b formed on one surface of a dielectric substrate 10, resonator patterns 16a-16e formed on said one surface of the dielectric substrate 10, and a dielectric plate 24 mounted on said one surface of the dielectric plate 24 with a plurality of spacers 20, 22 formed on said one surface of the dielectric substrate 10. The dielectric plate 24 covers the region including the resonator patterns 16a-16e, and the input/output feeders 14a, 14b length-wise over the length within ±20% of positive integer times a ¼ effective wavelength from the sides nearer to the resonator patterns.Type: ApplicationFiled: September 27, 2004Publication date: November 24, 2005Applicant: FUJITSU LIMITEDInventors: Kazunori Yamanaka, Teru Nakanishi, Manabu Kai, Akihiko Akasegawa
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Publication number: 20050256008Abstract: A compact superconducting filter device can easily change a bandwidth and a center frequency without changing a pattern or shape of the filter. A filter pattern is formed on a substrate made of a dielectric material. The filter pattern is made of a superconductor material. A signal input line and a signal output line are formed on the substrate so as to extend from a periphery of the filter pattern. An adjust plate is located above the filter pattern with a predetermined distance therebetween. The adjust plate is made of an electrically conductive material.Type: ApplicationFiled: September 23, 2004Publication date: November 17, 2005Applicant: FUJITSU LIMITEDInventors: Teru Nakanishi, Akihiko Akasegawa, Manabu Kai, Kazunori Yamanaka
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Publication number: 20050256010Abstract: A compact superconducting filter device can easily change a bandwidth and a center frequency without changing a pattern or shape of the filter. A filter pattern is formed on a substrate made of a dielectric material. The filter pattern is made of a superconductor material. A signal input line and a signal output line are formed on the substrate so as to extend from a periphery of the filter pattern. An adjust plate is located above the filter pattern with a predetermined distance therebetween. The adjust plate is formed of one of an electrically conductive material, a superconductive material and a dielectric material.Type: ApplicationFiled: January 27, 2005Publication date: November 17, 2005Applicant: FUJITSU LIMITEDInventors: Teru Nakanishi, Akihiko Akasegawa, Manabu Kai, Kazunori Yamanaka
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Publication number: 20050204748Abstract: A cooling apparatus for articles operated at low temperatures comprises a refrigerating machine and a cold head provided in the refrigerating machine. A first Peltier element is thermally contacted and fixed with the cold head, and a second Peltier element is thermally contacted and fixed with the cold head. A first article can be arranged with the first Peltier element with being thermally contacted therewith, and a second article can be arranged with the second Peltier element with being thermally contacted therewith. The cold head is cooled to low temperatures by the refrigerating machine, and temperatures of the first article and the second article each is further controlled by the first Peltier element and the second Peltier element, respectively, to thereby cool the articles to different temperatures.Type: ApplicationFiled: April 25, 2005Publication date: September 22, 2005Applicant: FUJITSU LIMITEDInventors: Kazunori Yamanaka, Teru Nakanishi
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Publication number: 20050062157Abstract: Methods and apparatus for forming solder bumps on terminal pads of a semiconductor substrate for an integrated circuit device employ a solder bump transfer plate and a mask to form solder deposits on the plate. One embodiment of the invention employs a metal mask having a plurality of through holes for forming solder deposits on the solder bump transfer plate by vapor phase deposition through the through holes each area of which increases in step wise from the first surface of the mask to the second surface opposite to the first surface, thereby preventing solder deposits in the through holes from being removed when the mask is separated from the plate.Type: ApplicationFiled: November 4, 2004Publication date: March 24, 2005Applicant: FUJITSU LIMITEDInventors: Kazuaki Karasawa, Teru Nakanishi, Toshiya Akamatsu
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Publication number: 20050020452Abstract: A coaxial connector 10 to be connected to a coaxial cable comprising a surface coating layer 20 of indium or an indium alloy being formed on the surface of a terminal 12 which is a central conductor. Since indium similar to an indium-based solder material is used as the material of the surface coating layer 20, a reaction product is prevented from being produced in indium-based solder by the reaction between the material of the surface coating layer 20 and the material of the indium-based solder material. Accordingly, deterioration of the flexibility of the indium-based solder can be prevented, and a superconducting device which can endure the repeated temperature changes between the room temperature and lower temperatures can be provided.Type: ApplicationFiled: August 19, 2004Publication date: January 27, 2005Applicant: Fujitsu LimitedInventors: Teru Nakanishi, Akihiko Akasegawa, Kazunori Yamanaka
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Publication number: 20050009709Abstract: A resonator is formed by forming a microstrip line having an electrical length corresponding to a ?/2 wavelength on a dielectric substrate, forming both side portions of the microstrip line from the center thereof into spiral shapes, making the orientations of the spirals' opposite each other, making outer-side portions of the spiral shapes on both sides, inclusive of the central portion of the microstrip line, linear in shape overall, and making linear in shape a portion of prescribed range from the end portion of each spiral shape.Type: ApplicationFiled: August 12, 2004Publication date: January 13, 2005Inventors: Manabu Kai, Kazunori Yamanaka, Teru Nakanishi, Akihiko Akasegawa
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Publication number: 20040209453Abstract: An integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board. One embodiment according to the present invention is a method for fabricating an integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board, both surfaces of the first and second electrodes having an adhesive tendency to molten metal, the method comprising the steps of forming a metal bump on the first electrode, the metal bump being made of a soldering metal alloy consisting of a solid phase component and a liquid phase component at an operating temperature; and forming an electric connection between the first electrode and the second electrode by heating the soldering metal alloy so as to adhere to the surface of the second electrode.Type: ApplicationFiled: May 18, 2004Publication date: October 21, 2004Applicant: FUJITSU LIMITEDInventors: Toshiya Akamatsu, Kazuaki Karasawa, Teru Nakanishi, Kozo Shimizu
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Patent number: 6764938Abstract: An integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board. One embodiment according to the present invention is a method for fabricating an integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board, both surfaces of the first and second electrodes having an adhesive tendency to molten metal, the method comprising the steps of forming a metal bump on the first electrode, the metal bump being made of a soldering metal alloy consisting of a solid phase component and a liquid phase component at an operating temperature; and forming an electric connection between the first electrode and the second electrode by heating the soldering metal alloy so as to adhere to the surface of the second electrode.Type: GrantFiled: September 9, 1999Date of Patent: July 20, 2004Assignee: Fujitsu LimitedInventors: Toshiya Akamatsu, Kazuaki Karasawa, Teru Nakanishi, Kozo Shimizu
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Patent number: 6690957Abstract: A high temperature superconductor film which is Y—Ba—Cu—O-based and formed on a dielectric substrate 10, and has a Cu composition ratio to the Ba near the upper surface of the film which is higher than a Cu composition ratio to the Ba inside the film. The YBCO-based high temperature superconductor film is formed with a Cu composition on the film surface maintained higher with respect to the stoichiometric composition, whereby the Cu oxide can be easily produced while the production of the yttrium oxides can be depressed. The yttrium oxides cannot be easily produced, which makes it difficult for pores and crystal strains to be generated while the Cu oxide functions as a flux for advancing the crystal growth, whereby the YBCO-based high temperature superconductor film can have good film quality and single crystal. The superconducting elements can be formed of the YBCO-based high temperature superconducting film of such good film quality.Type: GrantFiled: March 20, 2002Date of Patent: February 10, 2004Assignee: Fujitsu LimitedInventors: Akihiko Akasegawa, Kazunori Yamanaka, Teru Nakanishi
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Patent number: 6608381Abstract: An integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board. One embodiment according to the present invention is a method for fabricating an integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board, both surfaces of the first and second electrodes having an adhesive tendency to molten metal, the method comprising the steps of forming a metal bump on the first electrode, the metal bump being made of a soldering metal alloy consisting of a solid phase component and a liquid phase component at an operating temperature; and forming an electric connection between the first electrode and the second electrode by heating the soldering metal alloy so as to adhere to the surface of the second electrode.Type: GrantFiled: July 3, 2000Date of Patent: August 19, 2003Assignee: Fujitsu LimitedInventors: Toshiya Akamatsu, Kazuaki Karasawa, Teru Nakanishi, Kozo Shimizu
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Publication number: 20030073584Abstract: A high temperature superconductor film which is Y—Ba—Cu—O-based and formed on a dielectric substrate 10, and has a Cu composition ratio to the Ba near the upper surface of the film which is higher than a Cu composition ratio to the Ba inside the film. The YBCO-based high temperature superconductor film is formed with a Cu composition on the film surface maintained higher with respect to the stoichiometric composition, whereby the Cu oxide can be easily produced while the production of the yttrium oxides can be depressed. The yttrium oxides cannot be easily produced, which makes it difficult for pores and crystal strains to be generated while the Cu oxide functions as a flux for advancing the crystal growth, whereby the YBCO-based high temperature superconductor film can have good film quality and single crystal. The superconducting elements can be formed of the YBCO-based high temperature superconducting film of such good film quality.Type: ApplicationFiled: March 20, 2002Publication date: April 17, 2003Applicant: Fujitsu LimitedInventors: Akihiko Akasegawa, Kazunori Yamanaka, Teru Nakanishi
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Publication number: 20020050404Abstract: An integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board. One embodiment according to the present invention is a method for fabricating an integrated electronic device having an electric connection between a first electrode of a semiconductor chip and a second electrode of a circuit board, both surfaces of the first and second electrodes having an adhesive tendency to molten metal, the method comprising the steps of forming a metal bump on the first electrode, the metal bump being made of a soldering metal alloy consisting of a solid phase component and a liquid phase component at an operating temperature; and forming an electric connection between the first electrode and the second electrode by heating the soldering metal alloy so as to adhere to the surface of the second electrode.Type: ApplicationFiled: September 9, 1999Publication date: May 2, 2002Inventors: TOSHIYA AKAMATSU, KAZUAKI KARASAWA, TERU NAKANISHI, KOZO SHIMIZU
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Patent number: 6136047Abstract: A solder bump transfer plate having a plurality of solder deposits on the surface non-wettable to molten solder both diameter and spacing of which are both smaller than diameter and spacing of the terminal pads on a semiconductor substrate.Type: GrantFiled: December 29, 1998Date of Patent: October 24, 2000Assignee: Fujitsu LimitedInventors: Kazuaki Karasawa, Teru Nakanishi, Toshiya Akamatsu
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Patent number: 6121062Abstract: A bump forming step forms a predetermined number of bumps on at least a first one of two components. A height measuring step measures the heights of the predetermined number of bumps. A fixing step fixes the two components together by means of the bumps with the distance between the two components determined, using the result of the height measurement, so that all of the predetermined number of bumps should come in contact with the second one of the two components. An oxide-film removing step removes the oxide film formed on the predetermined number of bumps after the height measuring step and before the fixing step. The fixing step comprises a press fixing step for press fixing the two components at the above distance by means of a press fixing method, and a melting step for causing the bumps to melt in a predetermined atmosphere so that the bumps firmly join the two components together. The distance is established by at least one of the press fixing step and the melting step.Type: GrantFiled: February 23, 1996Date of Patent: September 19, 2000Assignee: Fujitsu LimitedInventors: Kazuaki Karasawa, Teru Nakanishi, Kaoru Hashimoto, Toshihiro Sakamura
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Patent number: 6008071Abstract: Methods for forming solder bumps on terminal pads of a semiconductor substrate for an integrated circuit device employ a solder bump transfer plate and a mask to form solder deposits on the plate. One embodiment of the invention employs a metal mask having a plurality of through holes for forming solder deposits on the solder bump transfer plate by vapor phase deposition through the through holes each area of which increases in step wise from the first surface of the mask to the second surface opposite to the first surface, thereby preventing solder deposits in the through holes from being removed when the mask is separated from the plate. Another embodiment of the invention is a solder bump transfer plate having a plurality of solder deposits on the surface non-wettable to molten solder both diameter and spacing of which are both smaller than diameter and spacing of the terminal pads on the semiconductor substrate, whereby a single solder bump is accurately formed on each of the terminal pads.Type: GrantFiled: April 30, 1996Date of Patent: December 28, 1999Assignee: Fujitsu LimitedInventors: Kazuaki Karasawa, Teru Nakanishi, Toshiya Akamatsu