Abstract: It is made possible to provide a reconfigurable logic circuit with which high integration can be achieved. A reconfigurable logic circuit includes: a multiplexer which includes a plurality of spin MOSFETs each having a source and drain containing a magnetic material, and a selecting portion including a plurality of MOSFETs and selecting a spin MOSFET from the plurality of spin MOSFETs, based on control data transmitted from control lines; a determining circuit which determines whether magnetization of the magnetic material of the source and drain of a selected spin MOSFET, which is selected by the selecting portion, is in a first state or in a second state; and a first and second write circuits which put the magnetization of the magnetic material of the source and drain of the selected spin MOSFET into the second and first states respectively by supplying a write current flowing between the source and drain of the selected spin MOSFET.

Abstract: The objective is to provide a random number generating device having a smaller circuit size and a smaller value of output bias. The random number generating device includes a pair of first and second current paths arranged in parallel with each other, and a pair of first and second fine particles, which can mutually exchange charges, and are located in the vicinity of the first and second current paths.

Abstract: The objective is to provide a random number generating device having a smaller circuit size and a smaller value of output bias. The random number generating device includes a pair of first and second current paths arranged in parallel with each other, and a pair of first and second fine particles, which can mutually exchange charges, and are located in the vicinity of the first and second current paths.

Abstract: The objective is to provide a random number generating device having a smaller circuit size and a smaller value of output bias. The random number generating device includes a pair of first and second current paths arranged in parallel with each other, and a pair of first and second fine particles, which can mutually exchange charges, and are located in the vicinity of the first and second current paths.

Abstract: The objective is to provide a random number generating device having a smaller circuit size and a smaller value of output bias. The random number generating device includes a pair of first and second current paths arranged in parallel with each other, and a pair of first and second fine particles, which can mutually exchange charges, and are located in the vicinity of the first and second current paths.

Abstract: A random number generator includes an amplifier to amplify a difference between a noise signal and a reference signal to generate an amplified signal, a plurality of binarization circuits configured to binarize the amplified signal by using different inherent threshold values to obtain a plurality of binarized signals, and an exclusive OR circuit to perform an exclusive OR operation on the a plurality of binarized signals to generate random number sequence.

Abstract: A method of designing a three-dimensional integrated circuit includes dividing two-dimensional layout data of a circuit formed on a semiconductor substrate into a plurality of layout block data in order to re-arrange in different layers, generating layout block data reversing one of the layout block data of two folded layers arranged vertically adjacent to each other, alternately arranging the reversed layout block data and non-reverse block layout data to form a plurality of layers vertically overlapped, selecting at least one from interconnects included in a plurality of layout block data of the circuit and ranging over plural layers so as to be mutually and functionally collected together with respect to at least one of time delay, interconnect length and block configuration, and re-arranging the selected interconnect using a via connecting an upper layer and an under layer of the folded interconnect.

Abstract: The objective is to provide a random number generating device having a smaller circuit size and a smaller value of output bias. The random number generating device includes a pair of first and second current paths arranged in parallel with each other, and a pair of first and second fine particles, which can mutually exchange charges, and are located in the vicinity of the first and second current paths.

Abstract: A random number test circuit includes a counting unit to count number of repetitions of a certain-value bit in a random number sequence, the repetitions occurring in series, a detecting unit to detect a plurality of numbers corresponding to a kind of bits in the random number sequence, and a determining unit to determine whether the random number sequence is normal, based on the numbers.

Abstract: The random number test circuit includes a shift register which operates based on a clock and which successively stores serial random numbers generated by a random number generation element, a first random number being output from a predetermined stage of the shift register; a comparison circuit which compares the first random number with a second random number located at a distance of a first predetermined number of bits from the first random number, the second random number being generated by the random number generation element; a counter which counts a frequency of occurrence of equality or inequality between the first random number and the second random number, with respect to all bits in the serial random numbers, and a decision circuit which judges an article quality to be good if a count value in the counter indicates a frequency of occurrence equal to or less than a number determined previously by correlation.

Abstract: An electrode manufacturing method comprises: forming plural protruding portions on a surface of a substrate; introducing first particles having a size that changes according to heat, light, or a first solvent between said plural protruding portions; changing the size of the first particles by applying heat, light, or the first solvent to said first particles; and depositing an electrode material onto the surface of said substrate.

Abstract: A random number test circuit includes a counting unit to count number of repetitions of a certain-value bit in a random number sequence, the repetitions occurring in series, a detecting unit to detect a plurality of numbers corresponding to a kind of bits in the random number sequence, and a determining unit to determine whether the random number sequence is normal, based on the numbers.

Abstract: An electrode manufacturing method comprises: forming plural protruding portions on a surface of a substrate; introducing first particles having a size that changes according to heat, light, or a first solvent between said plural protruding portions; changing the size of the first particles by applying heat, light, or the first solvent to said first particles; and depositing an electrode material onto the surface of said substrate.

Abstract: Physical systems, each having three energy levels, in the solid substance arranged in a resonator are provided in which two of three transitions are optically allowed and a qubit is expressed by either of quantum states of two levels constituting the remaining optically forbidden transition or by the superposition state thereof. Two physical systems selectively irradiated with two kinds of light, frequency difference thereof corresponding to a transition frequency of the optically forbidden transition for respective physical systems, thereby setting initial states. A two-qubit gate operation is performed by irradiating the two physical systems simultaneously with two kinds of light having frequencies resonant with the optically allowed transitions other than the transitions coupled through the common resonator mode, while increasing an intensity level of one of the two kinds of light and decreasing an intensity level of the other light between start time and finish time of the simultaneous irradiation.

Abstract: The objective is to provide a random number generating device having a smaller circuit size and a smaller value of output bias. The random number generating device includes a pair of first and second current paths arranged in parallel with each other, and a pair of first and second fine particles, which can mutually exchange charges, and are located in the vicinity of the first and second current paths.

Abstract: An inverter comprising four quantum dot cells. When the quantum dot cells are arranged in 9 o'clock direction, 12 o'clock direction and 3 o'clock direction, the quantum dot cell is arranged in 6 o'clock direction.

Abstract: A semiconductor device according to the invention is constructed as below. A charge accumulating layer which contains a magnetic substance is formed directly on a semiconductor substrate, and a gate insulating film is formed on the charge accumulating layer. Further, a gate electrode is formed on the gate insulating film, and source and drain regions formed in surface portions of the semiconductor substrate such that the gate electrode is interposed therebetween. Another semiconductor device according to the invention is constructed as below. A first gate insulating film formed on a semiconductor substrate, and a charge accumulating layer which contains a magnetic substance is formed on the first gate insulating film. Further, a second gate insulating film is formed on the charge accumulating layer, and a gate electrode is formed on the second gate insulating film. Source and drain regions formed in surface portions of the semiconductor substrate such that the gate electrode is interposed therebetween.

Abstract: The semiconductor device comprises a first insulating layer formed on the semiconductor substrate, at least one double-deck semiconductor nanocrystal formed on the first insulating layer, the at least one double-deck semiconductor nanocrystal comprising a first semiconductor nanocrystal and a second semiconductor nanocrystal stacked one upon the other via a second insulating layer, and a third insulating layer selectively formed on the first insulating layer so as to cover the at least one double-deck semiconductor nanocrystal.

Abstract: A single-electron controlling magnetoresistance element which comprises, a couple of first ferromagnetic bodies each magnetized in a first direction, a second ferromagnetic body magnetized in a second direction in an initial direction and sandwiched between the couple of first ferromagnetic bodies with a tunnel junction interposed therebetween respectively, and means for directing the magnetization direction of the second ferromagnetic body to a direction different from the second direction, wherein a charging energy E.sub.c of a single electron in at least one of the tunnel junctions interposed between the first ferromagnetic body and the second ferromagnetic body meets the following conditions:E.sub.c >>k.sub.B T (2)E.sub.c >>h/R.sub.t C (3)wherein k.sub.B T is a thermal energy at an operation temperature, h is a Planck's constant, R.sub.t is a junction tunnel resistance, and C is a junction capacity.

Abstract: A semiconductor device which includes, a substrate, an insulating layer formed on the substrate, a silicon layer having an exposed surface constituted by a Si (100) face, the silicon layer being provided with a tapered recess having a bottom at which a part of the silicon layer is remained without exposing the insulating layer, a first conductive region constituted by the silicon layer remaining at the bottom of the tapered recess, a second and a third conductive regions formed on both sides of the tapered recess respectively, a first insulating film formed on an inner surface of the tapered recess, and an electrode formed in the tapered recess. A flow of electron resulting from the tunneling effect from the second conductive region via the first insulating film to the third conductive region is controlled by controlling a voltage to be impressed onto the electrode.