Patents by Inventor Tetsuya Hayashi

Tetsuya Hayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7695997
    Abstract: An electrostatic discharge protection element and a protection resistor, which are formed on an N? drain region with a field oxide film interposed therebetween for the purpose of preventing electrical breakdown of a field effect transistor, are composed as a stacked bidirectional Zener diode of one or a plurality of N+ polycrystalline silicon regions of a first layer and a P+ polycrystalline silicon region of a second layer, and a stacked resistor of one or a plurality of N+ resistor layers of the first layer and an N+ resistor layer of the second layer, respectively. One end of the plurality of N+ polycrystalline silicon regions of the first layer is connected to an external gate electrode terminal, and the other end is connected to a source electrode. One end of the plurality of N+ resistor layers of the first layer is connected to a gate electrode, and the other end is connected to the external gate electrode terminal.
    Type: Grant
    Filed: April 27, 2007
    Date of Patent: April 13, 2010
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Yoshio Shimoida, Masakatsu Hoshi, Tetsuya Hayashi, Hideaki Tanaka, Shigeharu Yamagami
  • Publication number: 20100079571
    Abstract: A drawing device includes a drawing element irradiating laser light to a label surface of a recording medium according to drawing data of tracks to compose a desired pattern and draw it on the label surface. The drawing device further includes a juncture specifying element that specifies a juncture portion between drawing start and end positions according to the drawing data and a non-drawing portion specifying element that specifies a non-drawing portion corresponding to the drawing data not to direct the irradiation of the laser light in accordance with the drawing data. The drawing device includes a control element controlling the drawing element to carry out movement processing so the drawing start position in each of a plurality of the tracks moves relative to the desired pattern to be drawn in order for at least a part of the specified juncture portion to be received in the specified non-drawing portion.
    Type: Application
    Filed: December 21, 2006
    Publication date: April 1, 2010
    Inventor: Tetsuya HAYASHI
  • Patent number: 7679739
    Abstract: There is provided a film measuring device capable of accurately and easily measuring the thickness of a microporous film formed on a battery electrode plate over the entire area of the film. A color CCD sensor 8 shoots the microporous film. A video board 11 converts a color tone of a color image signal obtained by the image pickup into gradation data of respective color components of RGB. After the data conversion, an image processing board 12 extracts line images of the respective color components. A calculator 14 obtains the thickness of the microporous film by referring to pre-measured film thickness reference values corresponding to the gradation data of the green or blue color component, which are stored in a table storage 13 as reference thickness table data, using the gradation data of the line image of the green color component or the blue color component as lookup data.
    Type: Grant
    Filed: August 22, 2006
    Date of Patent: March 16, 2010
    Assignee: Panasonic Corporation
    Inventors: Tetsuya Hayashi, Masato Fujikawa, Kazutaka Teramoto
  • Publication number: 20100062146
    Abstract: The amount of a paint for forming a porous heat-resistant layer supplied to the outer surface of a gravure roll is adjusted by removing the paint with a blade that is disposed so as to contact the outer surface. A resin blade is used, and the position at which the resin blade contacts the outer surface of the gravure roll is changed as the resin blade wears away. This prevents the amount of the paint for forming the porous heat-resistant layer removed from the outer surface of the gravure roll from changing as the resin blade wears away, so that the excess amount of the paint carried on the outer surface of the gravure roll is removed with good accuracy. An almost constant amount of the paint is thus transferred to an electrode surface from the outer surface of the gravure roll, and a porous heat-resistant layer with an almost uniform thickness is stably formed on an industrial scale.
    Type: Application
    Filed: December 25, 2007
    Publication date: March 11, 2010
    Inventors: Tetsuya Hayashi, Akira Motoi, Yasuhiko Takeuchi
  • Patent number: 7671383
    Abstract: A semiconductor device, includes: a first conductivity type semiconductor base having a main face; a hetero semiconductor region contacting the main face of the semiconductor base and forming a hetero junction in combination with the semiconductor base, the semiconductor base and the hetero semiconductor region in combination defining a junction end part; a gate insulating film defining a junction face in contact with the semiconductor base and having a thickness; and a gate electrode disposed adjacent to the junction end part via the gate insulating film and defining a shortest point in a position away from the junction end part by a shortest interval, a line extending from the shortest point to a contact point vertically relative to the junction face, forming such a distance between the contact point and the junction end part as to be smaller than the thickness of the gate insulating film contacting the semiconductor base.
    Type: Grant
    Filed: March 6, 2007
    Date of Patent: March 2, 2010
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Tetsuya Hayashi, Masakatsu Hoshi, Yoshio Shimoida, Hideaki Tanaka, Shigeharu Yamagami
  • Publication number: 20100046794
    Abstract: There is provided a film measuring device capable of accurately and easily measuring the thickness of a microporous film formed on a battery electrode plate over the entire area of the film. A color CCD sensor 8 shoots the microporous film. A video board 11 converts a color tone of a color image signal obtained by the image pickup into gradation data of respective color components of RGB. After the data conversion, an image processing board 12 extracts line images of the respective color components. A calculator 14 obtains the thickness of the microporous film by referring to pre-measured film thickness reference values corresponding to the gradation data of the green or blue color component, which are stored in a table storage 13 as reference thickness table data, using the gradation data of the line image of the green color component or the blue color component as lookup data.
    Type: Application
    Filed: October 28, 2009
    Publication date: February 25, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Tetsuya HAYASHI, Masato FUJIKAWA, Kazutaka TERAMOTO
  • Publication number: 20100033711
    Abstract: This invention relates to optical sensing technology to measure and control a physical quantity of an object that exists on or within a microstructure object, utilizing Brillouin scattering decreases. The measurement method prepares an optical waveguide one-, two- or three-dimensionally, on or within a micro-chemical chip, IC chip, or other element, and measures a physical quantity of the object on the basis of a property variation of light attributed to Brillouin scattering occurring in the optical waveguide.
    Type: Application
    Filed: December 19, 2007
    Publication date: February 11, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Tetsuya Hayashi, Eisuke Sasaoka, Yoshinori Yamamoto, Makoto Katayama, Tomohiko Kanie, Shinji Ishikawa, Osamu Ichikawa
  • Patent number: 7659747
    Abstract: A transmission device including: a driver unit which generates an output signal having an amplitude by a resistance division of a power-supply voltage; and an output-amplitude correction unit which generates current according to variation in the power-supply voltage, and corrects the amplitude by using the current.
    Type: Grant
    Filed: July 23, 2008
    Date of Patent: February 9, 2010
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Hiroshi Shiraishi, Tetsuya Hayashi, Tomokazu Higuchi
  • Publication number: 20100026778
    Abstract: A drawing device (1) is provided with a drawing element (13) that irradiates laser light to a label surface of a recording medium to draw a desired pattern on the label surface, a first moving element (14) that moves a laser light irradiated position along an inner or outer circumferential direction of the recording medium by a first distance as a unit, a second moving element (131) that moves the laser light irradiated position along the inner or outer circumferential direction by a second distance that is shorter than the first distance as a unit, and a rearranging element (31, 32) that carries out the rearrangement of drawing data composing a desired pattern in accordance with a moving direction of the irradiated position that at least the second moving element moves, whereby the drawing element draws a desired pattern on the basis of the drawing data to be rearranged.
    Type: Application
    Filed: December 15, 2006
    Publication date: February 4, 2010
    Applicant: Pioneer Corporation
    Inventor: Tetsuya Hayashi
  • Patent number: 7642149
    Abstract: A method for producing a semiconductor device which includes: a semiconductor base, a hetero semiconductor region made of a semiconductor material different in band gap from a semiconductor material for the semiconductor base, and so configured as to form a hetero junction in combination with the semiconductor base, a gate insulating film so configured as to contact with the hetero junction between the semiconductor base and the hetero semiconductor region, a gate electrode so configured as to contact with the gate insulating film, a source electrode connected to the hetero semiconductor region, and a drain electrode connected to the semiconductor base. The method includes: forming the following in a self-aligning manner, by using a certain mask material: a source contact hole for the source electrode, and the gate electrode.
    Type: Grant
    Filed: October 11, 2007
    Date of Patent: January 5, 2010
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Tetsuya Hayashi, Masakatsu Hoshi, Hideaki Tanaka, Shigeharu Yamagami
  • Publication number: 20090325074
    Abstract: A lithium ion secondary battery includes a positive electrode, a negative electrode, a porous heat-resistant layer, and a nonaqueous electrolyte. The positive and negative electrodes reversibly absorb and release lithium ions, respectively. The porous heat-resistant layer is provided between the positive electrode and the negative electrode and includes a metal oxide as filler. The nonaqueous electrolyte is impregnated into the porous heat-resistant layer and exists between the positive electrode and the negative electrode. The filler of the porous heat-resistant layer has a particle diameter of 0.1 ?m or more and 5.0 ?m or less, D10 in particle size distribution measurement of 0.2 ?m or more and 0.6 ?m or less, and a mode diameter of 0.80 ?m or more and 1.25 ?m or less.
    Type: Application
    Filed: July 5, 2007
    Publication date: December 31, 2009
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yusuke Fukumoto, Tetsuya Hayashi, Kazunori Kubota
  • Patent number: 7638230
    Abstract: A lithium ion secondary battery including: an electrode group including a belt-like positive electrode and a belt-like negative electrode that are wound with a separator interposed therebetween; and a can with a bottom for accommodating the electrode group, wherein the positive electrode has a positive electrode current collector and a positive electrode mixture layer carried on the positive electrode current collector, the negative electrode has a negative electrode current collector and a negative electrode mixture layer carried on the negative electrode current collector, and a porous heat-resistant layer is partially provided between the separator and at least one of the positive electrode mixture layer and the negative electrode mixture layer. Since a porous heat-resistant layer is thus placed, a high performance lithium ion secondary battery capable of efficiently preventing internal short circuit due to overheating while preventing decrease in battery characteristics can be provided.
    Type: Grant
    Filed: August 30, 2005
    Date of Patent: December 29, 2009
    Assignee: Panasonic Corporation
    Inventors: Hideaki Fujita, Tsuyoshi Hatanaka, Tetsuya Hayashi, Akira Nagasaki, Yusuke Fukumoto, Kohei Suzuki
  • Publication number: 20090315970
    Abstract: A drawing apparatus (1) is provided with: a drawing device (13) for drawing a predetermined pattern onto a label surface (120), which is provided for a recording medium (100), by irradiating the label surface with a laser beam (LB); a driving device (15) for driving the drawing device along the label surface; a voltage applying device (17) for applying each of a first voltage and a second voltage for driving the driving device, to the driving device; and a controlling device (31) for controlling the voltage applying device such that the first voltage and the second voltage have a same polarity and amplitude when the drawing device is located at an initial position corresponding to a position at which the drawing of the desired pattern is started with respect to the label surface.
    Type: Application
    Filed: September 22, 2006
    Publication date: December 24, 2009
    Inventors: Wataru Hasegawa, Toshiyuki Kaneko, Takashi Nakamura, Tetsuya Hayashi
  • Publication number: 20090309953
    Abstract: A drawing device (1) for performing drawing processing for drawing a desired pattern on a label surface (122) of a recording medium. The drawing device (1) has input element (42) for receiving from a user a desired pattern to be drawn, drawing element (13) for drawing the received desired pattern on the label surface by applying a laser beam to the label surface, and management information recording element (32) for recording, each time when a desired pattern is drawn on a label surface, management information in which the desired pattern drawn and identification information unique to the recording medium having the label surface on which the drawing is made are associated with each other.
    Type: Application
    Filed: December 25, 2006
    Publication date: December 17, 2009
    Applicant: PIONEER CORPORATION
    Inventor: Tetsuya Hayashi
  • Publication number: 20090278169
    Abstract: A semiconductor device includes: a semiconductor base; a hetero semiconductor region which is in contact with the semiconductor base and which has a band gap different from that of the semiconductor base; a first electrode connected to the hetero semiconductor region; and a second electrode forming an ohmic contact to the semiconductor base. The hetero semiconductor region includes a laminated hetero semiconductor region formed by laminating a plurality of semiconductor layers in which crystal alignment is discontinuous at a boundary between at least two layers.
    Type: Application
    Filed: August 22, 2006
    Publication date: November 12, 2009
    Inventors: Tetsuya Hayashi, Yoshio Shimoida, Masakatsu Hoshi, Hideaki Tanaka, Shigeharu Yamagami
  • Publication number: 20090267113
    Abstract: A semiconductor device has a semiconductor base of a first conductivity type; a hetero semiconductor region in contact with the semiconductor base; a gate electrode adjacent to a portion of a junction between the hetero semiconductor region and the semiconductor base across a gate insulating film; a source electrode connected to the hetero semiconductor region; and a drain electrode connected to the semiconductor base. The hetero semiconductor region has a band gap different from that of the semi-conductor base. The hetero semiconductor region includes a first hetero semiconductor region and a second hetero semiconductor region. The first hetero semiconductor region is formed before the gate insulating film is formed. The second hetero semiconductor region is formed after the gate insulating film is formed.
    Type: Application
    Filed: August 2, 2006
    Publication date: October 29, 2009
    Applicant: NISSAN MOTOR CO., LTD.
    Inventors: Yoshio Shimoida, Tetsuya Hayashi, Masakatsu Hoshi, Hideaki Tanaka, Shigeharu Yamagami
  • Patent number: 7605017
    Abstract: Methods of manufacturing a semiconductor device and resulting products. The semiconductor device includes a semiconductor substrate, a hetero semiconductor region hetero-adjoined with the semiconductor substrate, a gate insulation layer contacting the semiconductor substrate and a heterojunction of the hetero semiconductor region, a gate electrode formed on the gate insulation layer, an electric field alleviation region spaced apart from a heterojunction driving end of the heterojunction that contacts the gate insulation layer by a predetermined distance and contacting the semiconductor substrate and the gate insulation layer, a source electrode contacting the hetero semiconductor region and a drain electrode contacting the semiconductor substrate. A mask layer is formed on the hetero semiconductor region, and the electric field alleviation region and the heterojunction driving end are formed by using at least a portion of the first mask layer.
    Type: Grant
    Filed: October 11, 2007
    Date of Patent: October 20, 2009
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Tetsuya Hayashi, Masakatsu Hoshi, Hideaki Tanaka, Shigeharu Yamagami
  • Publication number: 20090233408
    Abstract: A method of manufacturing a semiconductor device having a polycrystalline silicon layer (5) includes; a step of forming a mask layer (7) on the polycrystalline silicon layer (5); a step of forming a side wall (8) that is provided on a side face of the mask layer (7) and covers part of the polycrystalline silicon layer (6); a step of doping an impurity (52) into the polycrystalline silicon layer (5) by using at least one of the mask layer (7) and the side wall (8) as a mask; and a step of etching the polycrystalline silicon layer (5, 6) by using at least one of the mask layer (7) and the side wall (8) as a mask.
    Type: Application
    Filed: June 26, 2006
    Publication date: September 17, 2009
    Inventors: Shigeharu Yamagami, Masakatsu Hoshi, Tetsuya Hayashi, Hideaki Tanaka, Yoshio Shimoida
  • Patent number: 7588961
    Abstract: In general, this disclosure describes a semiconductor device that exhibits an increased resistance and reduced leakage current in a reverse-biased state, and a method for manufacturing such a semiconductor device. For example, in one embodiment, the increased resistance in the reverse-biased state is obtained by introducing either a P+ or P? type impurity in a polycrystalline silicon layer formed on an N? type epitaxial layer. Additionally, the semiconductor device maintains a low resistance in a forward-biased state. To keep the forward-biased resistance low, the polycrystalline silicon layer in the vicinity of a gate electrode may be of an N+ type. Furthermore, an N+ type source extracting region is formed on the surface of the polycrystalline silicon layer to connect a source electrode to a drain electrode and maintain a low resistance when forward-biased.
    Type: Grant
    Filed: March 16, 2006
    Date of Patent: September 15, 2009
    Assignee: Nissan Motor Co., Ltd.
    Inventors: Yoshio Shimoida, Masakatsu Hoshi, Tetsuya Hayashi, Hideaki Tanaka, Shigeharu Yamagami
  • Patent number: 7588606
    Abstract: A positive electrode plate (11) and a negative electrode plate (12) are coiled around into a flat shape such that positive electrode layer faces (22a-22e) and negative electrode layer faces (23a-23f) are alternately layered upon one another with a separator interposed therebetween. Positional discrepancy detecting holes (41a, 41b, 42, 43, 44) are formed in the positive electrode layer faces (22a, 22b) and negative electrode layer face (23a) facing each other at the coiling start end, and in the positive electrode layer face (22e) and negative electrode layer face (23f) facing each other at the coiling finish end. The electrode plates are coiled into an electrode plate group, which is subjected to X-ray inspection for detecting positional displacement based on a discrepancy in the positions of the holes.
    Type: Grant
    Filed: March 13, 2006
    Date of Patent: September 15, 2009
    Assignee: Panasonic Corporation
    Inventors: Tetsuya Hayashi, Kazuyuki Hiranaga, Takahiro Teraoka, Shinichi Sakamoto, Satoshi Ogawa