Patents by Inventor Tetsuya Mizuguchi

Tetsuya Mizuguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8816313
    Abstract: Provided are a memory element and a memory device. A memory layer is provided with an ion source layer. The ion source layer includes Zr (zirconium), Cu (copper), and Al (aluminum) as a metal element together with an ion conductive material such as S (sulfur), Se (selenium), and Te (tellurium) (chalcogen element). The amount of Al in the ion source layer is 30 to 50 atomic percent. The amount of Zr is preferably 7.5 to 25 atomic percent, and more preferably, the composition ratio of Zr to the chalcogen element in total included in the ion source layer (=Zr (atomic percent)/chalcogen element in total (atomic percent)) falls within a range from 0.2 to 0.74.
    Type: Grant
    Filed: August 28, 2009
    Date of Patent: August 26, 2014
    Assignee: Sony Corporation
    Inventors: Kazuhiro Ohba, Tetsuya Mizuguchi, Shuichiro Yasuda
  • Patent number: 8796657
    Abstract: There are provided a memory element and a memory device with improved repetition characteristics during operations at a low voltage and current. The memory element includes a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer disposed on the first electrode side, and an ion source layer disposed on the second electrode side, and having a resistivity of 2.8 m?cm or higher but lower than 1 ?cm.
    Type: Grant
    Filed: February 10, 2012
    Date of Patent: August 5, 2014
    Assignee: Sony Corporation
    Inventors: Shuichiro Yasuda, Tetsuya Mizuguchi, Masayuki Shimuta, Katsuhisa Aratani, Kazuhiro Ohba
  • Publication number: 20140183438
    Abstract: A memory component including first and second electrodes with a memory layer therebetween, the memory layer having first and second memory layers, the first memory layer containing aluminum and a chalcogen element of tellurium, the second memory layer between the first memory layer and the first electrode and containing an aluminum oxide and at least one of a transition metal oxide and a transition metal oxynitride having a lower resistance than the aluminum oxide.
    Type: Application
    Filed: March 7, 2014
    Publication date: July 3, 2014
    Applicant: Sony Corporation
    Inventors: Kazuhiro Ohba, Shuichiro Yasuda, Tetsuya Mizuguchi, Katsuhisa Aratani, Masayuki Shimuta, Akira Kouchiyama, Mayumi Ogasawara
  • Patent number: 8730709
    Abstract: A memory component including first and second electrodes with a memory layer therebetween, the memory layer having first and second memory layers, the first memory layer containing aluminum and a chalcogen element of tellurium, the second memory layer between the first memory layer and the first electrode and containing an aluminum oxide and at least one of a transition metal oxide and a transition metal oxynitride having a lower resistance than the aluminum oxide.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: May 20, 2014
    Assignee: Sony Corporation
    Inventors: Kazuhiro Ohba, Shuichiro Yasuda, Tetsuya Mizuguchi, Katsuhisa Aratani, Masayuki Shimuta, Akira Kouchiyama, Mayumi Ogasawara
  • Patent number: 8685786
    Abstract: Disclosed herein is a semiconductor memory device, including: a first electrode formed on a substrate; an ion source layer formed on an upper layer of the first electrode; and a second electrode formed on an upper layer of the ion source layer. Resistance change type memory cells in each of which either a surface of the first electrode or a surface of the ion source layer is oxidized to form a resistance change type memory layer in an interface between the first electrode and the ion source interface are arranged in a array.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: April 1, 2014
    Assignee: Sony Corporation
    Inventors: Yoshihisa Kagawa, Tetsuya Mizuguchi, Ichiro Fujiwara, Akira Kouchiyama, Satoshi Sasaki, Naomi Yamada
  • Publication number: 20140008600
    Abstract: A memory element capable of simultaneously satisfying the number of repeating operation times and a low-voltage operation characteristic which are in a tradeoff relation is provided. The memory element has a high-resistivity layer and an ion source layer between a bottom electrode and a top electrode. The high-resistivity layer is made of an oxide containing Te. Any of elements other than Te such as Al, Zr, Ta, Hf, Si, Ge, Ni, Co, Cu, and Au may be added. In the case of adding Al to Te and also adding Cu and Zr, the composition ratio of the high-resistivity layer is preferably adjusted in the ranges of 30?Te?100 atomic %, 0?Al ?70 atomic %, and 0?Cu+Zr?36 atomic % except for oxygen. The ion source layer is made of at least one kind of metal elements and at least one kind of chalcogen elements of Te, S, and Se.
    Type: Application
    Filed: September 9, 2013
    Publication date: January 9, 2014
    Applicant: Sony Corporation
    Inventors: Tetsuya Mizuguchi, Shuichiro Yasuda, Satoshi Sasaki, Naomi Yamada
  • Publication number: 20140006031
    Abstract: A sound synthesis apparatus connected to a display device, includes a processor configured to: display a lyric on a screen of the display device; input a pitch based on an operation of a user, after the lyric has been displayed on the screen; and output a piece of waveform data representing a singing sound of the displayed lyric based on the inputted pitch.
    Type: Application
    Filed: June 21, 2013
    Publication date: January 2, 2014
    Inventors: Tetsuya MIZUGUCHI, Kiyohisa SUGII
  • Publication number: 20130256626
    Abstract: Disclosed herein is a semiconductor memory device, including: a first electrode formed on a substrate; an ion source layer formed on an upper layer of the first electrode; and a second electrode formed on an upper layer of the ion source layer. Resistance change type memory cells in each of which either a surface of the first electrode or a surface of the ion source layer is oxidized to form a resistance change type memory layer in an interface between the first electrode and the ion source interface are arranged in a array.
    Type: Application
    Filed: May 24, 2013
    Publication date: October 3, 2013
    Inventors: Yoshihisa KAGAWA, Tetsuya MIZUGUCHI, Ichiro FUJIWARA, Akira KOUCHIYAMA, Satoshi SASAKI, Naomi YAMADA
  • Patent number: 8547735
    Abstract: A memory element capable of simultaneously satisfying the number of repeating operation times and a low-voltage operation characteristic which are in a tradeoff relation is provided. The memory element has a high-resistivity layer and an ion source layer between a bottom electrode and a top electrode. The high-resistivity layer is made of an oxide containing Te. Any of elements other than Te such as Al, Zr, Ta, Hf, Si, Ge, Ni, Co, Cu, and Au may be added. In the case of adding Al to Te and also adding Cu and Zr, the composition ratio of the high-resistivity layer is preferably adjusted in the ranges of 30?Te?100 atomic %, 0?Al?70 atomic %, and 0?Cu+Zr?36 atomic % except for oxygen. The ion source layer is made of at least one kind of metal elements and at least one kind of chalcogen elements of Te, S, and Se.
    Type: Grant
    Filed: August 28, 2009
    Date of Patent: October 1, 2013
    Assignee: Sony Corporation
    Inventors: Tetsuya Mizuguchi, Shuichiro Yasuda, Satoshi Sasaki, Naomi Yamada
  • Publication number: 20130240818
    Abstract: A memory component including first and second electrodes with a memory layer therebetween, the memory layer having first and second memory layers, the first memory layer containing aluminum and a chalcogen element of tellurium, the second memory layer between the first memory layer and the first electrode and containing an aluminum oxide and at least one of a transition metal oxide and a transition metal oxynitride having a lower resistance than the aluminum oxide.
    Type: Application
    Filed: March 18, 2013
    Publication date: September 19, 2013
    Applicant: SONY CORPORATION
    Inventors: KAZUHIRO OHBA, SHUICHIRO YASUDA, TETSUYA MIZUGUCHI, KATSUHISA ARATANI, MASAYUKI SHIMUTA, AKIRA KOUCHIYAMA, MAYUMI OGASAWARA
  • Patent number: 8492740
    Abstract: The capability of retaining a resistance value of a stored state and an erased state is improved in a resistance variation-type memory device. A memory layer 5 including a high-resistance layer 2 and an ion source layer 3 is provided between a lower electrode 1 and an upper electrode 4. The ion source layer 3 contains Al (aluminum) as an additive element together with an ion conductive material such as S (sulfur), Se (selenium), and Te (tellurium) (chalcogenide element) and a metal element to be ionized such as Zr (zirconium). Since Al is included in the ion source layer 3, the high-resistance layer which includes Al (Al oxide) is formed on an anode in erasing operation. Thus, a retaining property in a high-resistance state improves, and at the same time, an operating speed is improved.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: July 23, 2013
    Assignee: Sony Corporation
    Inventors: Kazuhiro Ohba, Tetsuya Mizuguchi, Shuichiro Yasuda
  • Patent number: 8427860
    Abstract: A memory component includes: a first electrode; a memory layer; and a second electrode which are provided in that order, wherein the memory layer includes an ion source layer containing aluminum (Al) together with at least one chalcogen element selected from the group consisting of tellurium (Te), sulfur (S), and selenium (Se), and a resistance variable layer provided between the ion source layer and the first electrode and containing an aluminum oxide and at least one of a transition metal oxide and a transition metal oxynitride having a lower resistance than the aluminum oxide.
    Type: Grant
    Filed: February 1, 2011
    Date of Patent: April 23, 2013
    Assignee: Sony Corporation
    Inventors: Kazuhiro Ohba, Shuichiro Yasuda, Tetsuya Mizuguchi, Katsuhisa Aratani, Masayuki Shimuta, Akira Kouchiyama, Mayumi Ogasawara
  • Publication number: 20130001497
    Abstract: A memory element, including: a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer containing an oxide, and the resistance change layer being provided on the first electrode side, and an ion source layer in a stacking structure of two or more of a unit ion source layer, the unit ion source layer including a first layer and a second layer, the first layer containing one or more of chalcogen elements of tellurium (Te), sulfur (S), and selenium (Se) and an easy-to-move element that is easy to move in the memory layer, and having a density distribution of the easy-to-move element from the first electrode to the second electrode, and the second layer containing a difficult-to-move element that is difficult to move in the memory layer.
    Type: Application
    Filed: June 20, 2012
    Publication date: January 3, 2013
    Applicant: SONY CORPORATION
    Inventors: Kazuhiro Ohba, Tetsuya Mizuguchi, Shuichiro Yasuda, Masayuki Shimuta, Katsuhisa Aratani
  • Publication number: 20130001496
    Abstract: A memory element includes: a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer provided on the first electrode side, and an ion source layer containing one or more of metallic elements, and the ion source layer being provided on the second electrode side. The ion source layer includes a first ion source layer and a second ion source layer, the first ion source layer containing one or more of chalcogen elements of tellurium (Te), sulfur (S), and selenium (Se) and being provided on the resistance change layer side, and the second ion source layer containing the chalcogen element with a content different from a content in the first ion source layer and being provided on the second electrode side.
    Type: Application
    Filed: June 20, 2012
    Publication date: January 3, 2013
    Applicant: SONY CORPORATION
    Inventors: Masayuki Shimuta, Shuichiro Yasuda, Tetsuya Mizuguchi, Kazuhiro Ohba, Katsuhisa Aratani
  • Publication number: 20120314479
    Abstract: A memory element includes: a memory layer disposed between a first electrode and a second electrode. The memory layer includes: an ion source layer containing one or more metallic elements, and one or more chalcogen elements of tellurium (Te), sulfur (S), and selenium (Se); and a resistance change layer disposed between the ion source layer and the first electrode, the resistance change layer including a layer which includes tellurium and nitrogen (N) and is in contact with the ion source layer.
    Type: Application
    Filed: June 2, 2012
    Publication date: December 13, 2012
    Applicant: SONY CORPORATION
    Inventors: Tetsuya Mizuguchi, Shuichiro Yasuda, Masayuki Shimuta, Kazuhiro Ohba, Katsuhisa Aratani
  • Publication number: 20120294063
    Abstract: There are provided a memory element and a memory device excellently operating at a low current, and having the satisfactory retention characteristics. The memory element includes a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer disposed on the first electrode side, and being in a single- or multi-layer structure including a layer containing a highest percentage of tellurium (Te) as an anionic component, and an ion source layer disposed on the second electrode side, and containing a metallic element and one or more chalcogen elements including tellurium (Te), sulfur (S), and selenium (Se) with aluminum (Al) of 27.7 atomic % or more but 47.4 atomic % or less.
    Type: Application
    Filed: February 23, 2012
    Publication date: November 22, 2012
    Applicant: SONY CORPORATION
    Inventors: Tetsuya Mizuguchi, Kazuhiro Ohba, Shuichiro Yasuda, Masayuki Shimuta, Akira Kouchiyama, Hiroaki Sei
  • Patent number: 8295074
    Abstract: A memory cell is provided, in which a resistance value is appropriately controlled, thereby a variable resistance element may be applied with a voltage necessary for changing the element into a high or low resistance state. A storage element 10, a nonlinear resistance element 20, and an MOS transistor 30 are electrically connected in series. The storage element 10 has a nonlinear current-voltage characteristic opposite to a nonlinear current-voltage characteristic of the MOS transistor 30, and changes into a high or low resistance state in accordance with a polarity of applied voltage. The nonlinear resistance element 20 has a nonlinear current-voltage characteristic similar to the nonlinear current-voltage characteristic of the storage element 10.
    Type: Grant
    Filed: November 27, 2008
    Date of Patent: October 23, 2012
    Assignee: Sony Corporation
    Inventors: Shuichiro Yasuda, Katsuhisa Aratani, Akira Kouchiyama, Tetsuya Mizuguchi, Satoshi Sasaki
  • Publication number: 20120218808
    Abstract: There are provided a memory element and a memory device with improved repetition characteristics during operations at a low voltage and current. The memory element includes a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer disposed on the first electrode side, and an ion source layer disposed on the second electrode side, and having a resistivity of 2.8 m?cm or higher but lower than 1 ?cm.
    Type: Application
    Filed: February 10, 2012
    Publication date: August 30, 2012
    Applicant: SONY CORPORATION
    Inventors: Shuichiro Yasuda, Tetsuya Mizuguchi, Masayuki Shimuta, Katsuhisa Aratani, Kazuhiro Ohba
  • Publication number: 20110194329
    Abstract: A memory component includes: a first electrode; a memory layer; and a second electrode which are provided in that order, wherein the memory layer includes an ion source layer containing aluminum (Al) together with at least one chalcogen element selected from the group consisting of tellurium (Te), sulfur (S), and selenium (Se), and a resistance variable layer provided between the ion source layer and the first electrode and containing an aluminum oxide and at least one of a transition metal oxide and a transition metal oxynitride having a lower resistance than the aluminum oxide.
    Type: Application
    Filed: February 1, 2011
    Publication date: August 11, 2011
    Applicant: SONY CORPORATION
    Inventors: Kazuhiro Ohba, Shuichiro Yasuda, Tetsuya Mizuguchi, Katsuhisa Aratani, Masayuki Shimuta, Akira Kouchiyama, Mayumi Ogasawara
  • Publication number: 20110155988
    Abstract: Provided are a memory element and a memory device. A memory layer is provided with an ion source layer. The ion source layer includes Zr (zirconium), Cu (copper), and Al (aluminum) as a metal element together with an ion conductive material such as S (sulfur), Se (selenium), and Te (tellurium) (chalcogen element). The amount of Al in the ion source layer is 30 to 50 atomic percent. The amount of Zr is preferably 7.5 to 25 atomic percent, and more preferably, the composition ratio of Zr to the chalcogen element in total included in the ion source layer (=Zr (atomic percent)/chalcogen element in total (atomic percent)) falls within a range from 0.2 to 0.74.
    Type: Application
    Filed: August 28, 2009
    Publication date: June 30, 2011
    Applicant: SONY CORPORATION
    Inventors: Kazuhiro Ohba, Tetsuya Mizuguchi, Shuichiro Yasuda