Patents by Inventor Tetsuya Mizuguchi

Tetsuya Mizuguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110155987
    Abstract: A memory element capable of simultaneously satisfying the number of repeating operation times and a low-voltage operation characteristic which are in a tradeoff relation is provided. The memory element has a high-resistivity layer and an ion source layer between a bottom electrode and a top electrode. The high-resistivity layer is made of an oxide containing Te. Any of elements other than Te such as Al, Zr, Ta, Hf, Si, Ge, Ni, Co, Cu, and Au may be added. In the case of adding Al to Te and also adding Cu and Zr, the composition ratio of the high-resistivity layer is preferably adjusted in the ranges of 30?Te?100 atomic %, 0?Al?70 atomic %, and 0?Cu+Zr?36 atomic % except for oxygen. The ion source layer is made of at least one kind of metal elements and at least one kind of chalcogen elements of Te, S, and Se.
    Type: Application
    Filed: August 28, 2009
    Publication date: June 30, 2011
    Applicant: SONY CORPORATION
    Inventors: Tetsuya Mizuguchi, Shuichiro Yasuda, Satoshi Sasaki, Naomi Yamada
  • Publication number: 20110140065
    Abstract: The present invention provides a memory element and a memory device realizing reduced variations in resistance values in an initial state or erase state of a plurality of memory elements and capable of retaining the resistance value in a write/erase state for writing/erasing operations of a plurality of times. The memory element includes a first electrode, a memory layer, and a second electrode in order. The memory layer has: an ion source layer containing at least one of chalcogen elements of tellurium (Te), sulfur (S), and selenium (Se) and at least one metal element selected from copper (Cu), silver (Ag), zinc (Zn), and zirconium (Zr); and two or more high-resistance layers having a resistance value higher than that of the ion source layer and having different compositions.
    Type: Application
    Filed: December 1, 2010
    Publication date: June 16, 2011
    Applicant: SONY CORPORATION
    Inventors: Akihiro Maesaka, Kazuhiro Ohba, Tetsuya Mizuguchi, Koji Miyata, Motonari Honda, Katsuhisa Aratani
  • Publication number: 20110031466
    Abstract: Disclosed herein is a semiconductor memory device, including: a first electrode formed on a substrate; an ion source layer formed on an upper layer of the first electrode; and a second electrode formed on an upper layer of the ion source layer. Resistance change type memory cells in each of which either a surface of the first electrode or a surface of the ion source layer is oxidized to form a resistance change type memory layer in an interface between the first electrode and the ion source interface are arranged in a array.
    Type: Application
    Filed: June 21, 2010
    Publication date: February 10, 2011
    Applicant: SONY CORPORATION
    Inventors: Yoshihisa KAGAWA, Tetsuya MIZUGUCHI, Ichiro FUJIWARA, Akira KOUCHIYAMA, Satoshi SASAKI, Naomi YAMADA
  • Publication number: 20100259967
    Abstract: A memory cell is provided, in which a resistance value is appropriately controlled, thereby a variable resistance element may be applied with a voltage necessary for changing the element into a high or low resistance state. A storage element 10, a nonlinear resistance element 20, and an MOS transistor 30 are electrically connected in series. The storage element 10 has a nonlinear current-voltage characteristic opposite to a nonlinear current-voltage characteristic of the MOS transistor 30, and changes into a high or low resistance state in accordance with a polarity of applied voltage. The nonlinear resistance element 20 has a nonlinear current-voltage characteristic similar to the nonlinear current-voltage characteristic of the storage element 10.
    Type: Application
    Filed: November 27, 2008
    Publication date: October 14, 2010
    Applicant: SONY CORPORATION
    Inventors: Shuichiro Yasuda, Katsuhisa Aratani, Akira Kouchiyama, Tetsuya Mizuguchi, Satoshi Sasaki
  • Patent number: 7786459
    Abstract: A memory element 10 includes a memory layer 4 positioned between a first electrode 2 and a second electrode 6, in which an element selected from Cu, Ag, and Zn is contained in the memory layer 4 or in a layer 3 in contact with the memory layer 4, a resistance of the memory element 10 is changed by a voltage applied to the memory element 10 to perform recording of information, and in an erasing process of changing from a recorded state of low resistance value of the memory element 10 to an erased state of high resistance value of the memory element 10, a fluctuation, which is caused by an increase of the voltage applied to the memory element 10, of the resistance value of the memory element 10 at the end of the erasing process is within ten times at a maximum.
    Type: Grant
    Filed: November 15, 2005
    Date of Patent: August 31, 2010
    Assignee: Sony Corporation
    Inventors: Katsuhisa Aratani, Tomohito Tsushima, Akira Kouchiyama, Tetsuya Mizuguchi
  • Patent number: 7775866
    Abstract: Display control is made so that meteor blocks (101-104) falling from the outer space are piled up on the surface of earth. When the player operates a cursor (106) for piled up meteor blocks (105) to designate them as objects to be operated, and presses a button, the meteor blocks are vertically re-arranged. When the meteor blocks of the same type line up as a result of re arranging, they can be ignited and launched. When the meteor blocks rise up to the outer space, they can be cleared. On the other hand, when the meteor blocks stall halfway, they cannot be cleared, and fall on the surface of earth again.
    Type: Grant
    Filed: May 27, 2005
    Date of Patent: August 17, 2010
    Assignees: Bandai Co., Ltd., Q Entertainment, Inc., Namco Bandai Games, Inc.
    Inventors: Tetsuya Mizuguchi, Masahiro Sakurai
  • Publication number: 20100195371
    Abstract: The capability of retaining a resistance value of a stored state and an erased state is improved in a resistance variation-type memory device. A memory layer 5 including a high-resistance layer 2 and an ion source layer 3 is provided between a lower electrode 1 and an upper electrode 4. The ion source layer 3 contains Al (aluminum) as an additive element together with an ion conductive material such as S (sulfur), Se (selenium), and Te (tellurium) (chalcogenide element) and a metal element to be ionized such as Zr (zirconium). Since Al is included in the ion source layer 3, the high-resistance layer which includes Al (Al oxide) is formed on an anode in erasing operation. Thus, a retaining property in a high-resistance state improves, and at the same time, an operating speed is improved.
    Type: Application
    Filed: July 31, 2008
    Publication date: August 5, 2010
    Applicant: SONY CORPORATION
    Inventors: Kazuhiro Ohba, Tetsuya Mizuguchi, Shuichiro Yasuda
  • Patent number: 7700982
    Abstract: Write characteristics and read characteristics can be improved at the same time by applying novel materials to ferromagnetic layers. In a magneto resistive effect element having a pair of ferromagnetic layers being opposed to each other through an intermediate layer to cause a current to flow in the direction perpendicular to the film plane to obtain a magnetoresistive change, at least one of the ferromagnetic layers contains a ferromagnetic material containing Fe, Co and B. The ferromagnetic material should preferably contain FeaCobNicBd (in the chemical formula, a, b, c and d represent atomic %. 5?a?45, 35?b?85, 0?c?35, 10?d?30, a+b+C+d=100).
    Type: Grant
    Filed: September 11, 2007
    Date of Patent: April 20, 2010
    Assignee: Sony Corporation
    Inventors: Masanori Hosomi, Tetsuya Mizuguchi, Kazuhiro Ohba, Kazuhiro Bessho, Tetsuya Yamamoto, Hiroshi Kano
  • Patent number: 7696511
    Abstract: A memory element having a storage layer containing an ion source layer between a first electrode and a second electrode is provided. The memory element stores information by changing an electrical characteristic of the storage layer, wherein at least Zr is added to the ion source layer as a metal element together with an ion conducting material.
    Type: Grant
    Filed: August 5, 2008
    Date of Patent: April 13, 2010
    Assignee: Sony Corporation
    Inventors: Kazuhiro Ohba, Tetsuya Mizuguchi, Takeyuki Sone, Keitaro Endo
  • Patent number: 7675053
    Abstract: A memory element in which data recording and data readout can be performed stably without difficulties and which can be manufactured with a comparatively simplified method is provided. The memory element 10 includes a memory layer 4 and an ion source layer 3 positioned between the first electrode 2 and the second electrode 6, in which the ion source layer 3 contains any of elements selected from Cu, Ag, Zn and any of elements selected from Te, S, Se, and the ion source layer further contains boron (or rare-earth elements and silicon).
    Type: Grant
    Filed: January 9, 2006
    Date of Patent: March 9, 2010
    Assignee: Sony Corporation
    Inventors: Tetsuya Mizuguchi, Katsuhisa Aratani, Akihiro Maesaka, Akira Kouchiyama
  • Publication number: 20090039337
    Abstract: A memory element having a storage layer containing an ion source layer between a first electrode and a second electrode is provided. The memory element stores information by changing an electrical characteristic of the storage layer, wherein at least Zr is added to the ion source layer as a metal element together with an ion conducting material.
    Type: Application
    Filed: August 5, 2008
    Publication date: February 12, 2009
    Applicant: SONY CORPORATION
    Inventors: Kazuhiro Ohba, Tetsuya Mizuguchi, Takeyuki Sone, Keitaro Endo
  • Publication number: 20080006860
    Abstract: Write characteristics and read characteristics can be improved at the same time by applying novel materials to ferromagnetic layers. In a magneto resistive effect element having a pair of ferromagnetic layers being opposed to each other through an intermediate layer to cause a current to flow in the direction perpendicular to the film plane to obtain a magnetoresistive change, at least one of the ferromagnetic layers contains a ferromagnetic material containing Fe, Co and B. The ferromagnetic material should preferably contain FeaCobNicBd (in the chemical formula, a, b, c and d represent atomic %. 5?a?45, 35?b?85, 0?c?35, 10?d?30. a+b+C+d=100).
    Type: Application
    Filed: September 11, 2007
    Publication date: January 10, 2008
    Applicant: Sony Corporation
    Inventors: Masanori Hosomi, Tetsuya Mizuguchi, Kazuhiro Ohba, Kazuhiro Bessho, Tetsuya Yamamoto, Hiroshi Kano
  • Patent number: 7315053
    Abstract: Write characteristics and read characteristics can be improved at the same time by applying novel materials to ferromagnetic layers. In a magnetoresistive effect element having a pair of ferromagnetic layers being opposed to each other through an intermediate layer to cause a current to flow in the direction perpendicular to the film plane to obtain a magnetoresistive change, at least one of the ferromagnetic layers contains a ferromagnetic material containing Fe, Co and B. The ferromagnetic material should preferably contain FeaCobNicBd (in the chemical formula, a, b, c and d represent atomic %. 5?a?45, 35?b?85, 0<c?35, 10?d?30. a+b+C+d=100).
    Type: Grant
    Filed: April 8, 2003
    Date of Patent: January 1, 2008
    Assignee: Sony Corporation
    Inventors: Masanori Hosomi, Tetsuya Mizuguchi, Kazuhiro Ohba, Kazuhiro Bessho, Tetsuya Yamamoto, Hiroshi Kano
  • Patent number: 7307270
    Abstract: A memory element which stably performs operations such as data recording and which has a stable structure with respect to heat is provided. A memory element 10 includes a memory layer 4 and an ion source layer 3 positioned between the first electrode 2 and second electrode 6, in which the ion source layer 3 contains any of elements selected from Cu, Ag and Zn, and any of elements selected from Te, S and Se, and the memory layer 4 is made of any of tantalum oxide, niobium oxide, aluminum oxide, hafnium oxide and zirconium oxide, or is made of mixed materials thereof.
    Type: Grant
    Filed: December 14, 2005
    Date of Patent: December 11, 2007
    Assignee: Sony Corporation
    Inventors: Katsuhisa Aratani, Akira Kouchiyama, Tetsuya Mizuguchi
  • Patent number: 7262064
    Abstract: In a magnetoresistive effect element using a ferromagnetic tunnel junction having a tunnel barrier layer sandwiched between at least a pair of ferromagnetic layers, a magnetization free layer comprising one of the ferromagnetic layers is composed of a single layer of a material having an amorphous or microcrystal structure or a material layer the main portion of which has an amorphous or microcrystal structure. The magnetoresistive effect element can produce excellent magnetic-resistance characteristics, and a magnetic memory element and a magnetic memory device using the magnetoresistive effect element as a memory element thereof can improve both of write and read characteristics at the same time.
    Type: Grant
    Filed: October 11, 2002
    Date of Patent: August 28, 2007
    Assignee: Sony Corporation
    Inventors: Kazuhiro Ohba, Kazuhiko Hayashi, Hiroshi Kano, Kazuhiro Bessho, Tetsuya Mizuguchi, Yutaka Higo, Masanori Hosomi, Tetsuya Yamamoto, Hiroaki Narisawa, Takeyuki Sone, Keitaro Endo, Shinya Kubo
  • Patent number: 7206173
    Abstract: A magnetoresistance-effect element comprising a magnetism-sensing layer 9, a low-resistance metal layer 10 and an oxide layer 11. The magnetism-sensing layer 9 has its electric resistance changed in accordance with an external magnetic field. The low-resistance metal layer 9 is formed in contact with the magnetism-sensing layer 9. The oxide layer 11 is provided on that surface of the metal layer 10 which faces away from the magnetism-sensing layer 9.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: April 17, 2007
    Assignee: Sony Corporation
    Inventor: Tetsuya Mizuguchi
  • Patent number: 7173300
    Abstract: A magnetoresistive element including a free layer having rotatable magnetization, in which information is recorded in the magnetoresistive element by the rotation of the magnetization of the free layer, is provided. The free layer is a laminate that includes at least one ferromagnetic sublayer composed of a ferromagnetic material and at least one low-saturation-magnetization ferromagnetic sublayer having a lower saturation magnetization than that of the ferromagnetic sublayer.
    Type: Grant
    Filed: December 23, 2002
    Date of Patent: February 6, 2007
    Assignee: Sony Corporation
    Inventors: Tetsuya Mizuguchi, Kazuhiro Bessho
  • Patent number: 7099124
    Abstract: A spin-valve film used in a magnetoresistive-effect magnetic head includes an antiferromagnetic layer, a magnetization fixing layer, a non-magnetic layer, and a free layer. The magnetization fixing layer or the free layer is provided with a layered ferromagnetic structure which includes a pair of magnetic layers through the intermediary of a non-magnetic layer. In the layered ferromagnetic structure, a surface oxidation layer is formed on the surface of the non-magnetic intermediate layer to the side of the non-magnetic layer.
    Type: Grant
    Filed: June 21, 2004
    Date of Patent: August 29, 2006
    Assignee: Sony Corporation
    Inventor: Tetsuya Mizuguchi
  • Publication number: 20060189084
    Abstract: A memory element in which data recording and data readout can be performed stably without difficulties and which can be manufactured with a comparatively simplified method is provided. The memory element 10 includes a memory layer 4 and an ion source layer 3 positioned between the first electrode 2 and the second electrode 6, in which the ion source layer 3 contains any of elements selected from Cu, Ag, Zn and any of elements selected from Te, S, Se, and the ion source layer further contains boron (or rare-earth elements and silicon).
    Type: Application
    Filed: January 9, 2006
    Publication date: August 24, 2006
    Applicant: Sony Corporation
    Inventors: Tetsuya Mizuguchi, Katsuhisa Aratani, Akihiro Maesaka, Akira Kouchiyama
  • Publication number: 20060187703
    Abstract: A magnetoresistive effect element (1) has an arrangement in which a pair of ferromagnetic material layers (magnetization fixed layer (5) and magnetization free layer (7)) is opposed to each other through an intermediate layer (6) to obtain a magnetoresistive change by causing a current to flow in the direction perpendicular to the layer surface and in which the ferromagnetic material layers are annealed by anneal including rotating field anneal and the following static field anneal. A magnetic memory device comprises this magnetoresistive effect element (1) and bit lines and word lines sandwiching the magnetoresistive effect element (1) in the thickness direction. When the magnetoresistive effect element (1) and the magnetic memory device are manufactured, the ferromagnetic material layers (5, 7) are annealed by rotating field anneal and the following static field anneal.
    Type: Application
    Filed: December 14, 2005
    Publication date: August 24, 2006
    Inventors: Tetsuya Mizuguchi, Masanori Hosomi, Kazuhiro Ohba, Kazuhiro Bessho, Yutaka Higo, Tetsuya Yamamoto, Takeyuki Sone, Hiroshi Kano