Abstract: A semiconductor device which eliminates the need for high fillability through a simple process and a method for manufacturing the same. A high breakdown voltage lateral MOS transistor including a source region and a drain region is completed on a surface of a semiconductor substrate. A trench which surrounds the transistor when seen in a plan view is made in the surface of the semiconductor substrate. An insulating film is formed over the transistor and in the trench so as to cover the transistor and form an air-gap space in the trench. Contact holes which reach the source region and drain region of the transistor respectively are made in an interlayer insulating film.

Abstract: In a force increasing device of a clamping device for an indexing table, a large clamping force is obtained without reducing working efficiency of a workpiece and while limiting the length in the axial direction of a rotating shaft.

Abstract: Provided is a semiconductor device about which the reliability thereof is certainly kept even when a void is generated in a buried film in its trench. A rectangular element formation region is formed in a silicon layer. A trench having a predetermined width is formed to surround the element formation region. A first TEOS film and a second TEOS film are buried in the trench. A protecting film is formed at an L-shaped intersection region of the trench.

Abstract: An N? layer is formed on a semiconductor substrate, with a BOX layer interposed. In the N? layer, a trench isolation region is formed to surround the N? layer to be an element forming region. The trench isolation region is formed to reach the BOX layer, from the surface of the N? layer. Between trench isolation region and the N? layer, a P type diffusion region 10a is formed. The P type diffusion region is formed continuously without any interruption, to be in contact with the entire surface of an inner sidewall of the trench isolation region surrounding the element forming region. In the element forming region of the N? layer, a prescribed semiconductor element is formed. Thus, a semiconductor device is formed, in which electrical isolation is established reliably, without increasing the area occupied by the element forming region.

Abstract: An integrated semiconductor device containing semiconductor elements that have respective desired on-resistances and breakdown voltages achieves appropriate characteristics as a whole of the integrated semiconductor element. The integrated semiconductor device includes a plurality of semiconductor elements formed in a semiconductor layer and each having a source of an n type semiconductor, a drain of the n type semiconductor and a back gate of a p type semiconductor between the source and the drain. At least a predetermined part of the drain of one semiconductor element and a predetermined part of the drain of another semiconductor element have respective impurity concentrations different from each other.

Abstract: An index table assembly includes a rotary table having a workpiece-receiving surface on one side and a through hole at a rotational center of the rotary table, the through hole having a step portion extending toward the rotational center in the middle of the through hole, a frame separated from the rotary table in the direction of a rotational axis of the rotary table and including a shaft portion extending through the step portion and a bearing support detachably attached to the shaft portion, the bearing support facing a surface of the step portion on the same side as the workpiece-receiving surface, a first bearing positioned between a surface of the rotary table on the side opposite to the workpiece-receiving surface and the frame, and a second bearing positioned between the surface of the step portion on the same side as the workpiece-receiving surface and the bearing support.

Abstract: An index table assembly includes a rotary table, a frame separated from the rotary table in the direction of a rotational axis of the rotary table, a clamping device for bringing the rotary table into contact with the frame by moving the rotary table along the rotational axis, a first bearing disposed between the rotary table and the frame, and an urging device disposed between the first bearing and one of the rotary table and the frame and pressing the first bearing against the other one of the rotary table and the frame at least when the rotary table rotates.

Abstract: An index table assembly includes a rotary table, a frame separated from the rotary table in the direction of a rotational axis of the rotary table, a clamping device for bringing the rotary table into contact with the frame by moving the rotary table along the rotational axis, a first bearing disposed between the rotary table and the frame, and an urging device disposed between the first bearing and one of the rotary table and the frame and pressing the first bearing against the other one of the rotary table and the frame at least when the rotary table rotates.

Abstract: The present invention provides a semiconductor technology capable of suppressing an increase in threshold voltage of a transistor and, also, improving a withstand voltage between a source region and a drain region. Source and drain regions of a p channel type MOS transistor are formed in an n? type semiconductor layer in an SOI substrate. In addition, an n type impurity region is formed in the semiconductor layer. The impurity region is formed over the entire bottom of the source region at a portion directly below this source region, and is also formed directly below the semiconductor layer between the source region and the drain region. A peak position of an impurity concentration in the impurity region is set below a lowest end of the source region at a portion directly below an upper surface of the semiconductor layer between the source region and the drain region.

Abstract: An integrated semiconductor device containing semiconductor elements that have respective desired on-resistances and breakdown voltages achieves appropriate characteristics as a whole of the integrated semiconductor element. The integrated semiconductor device includes a plurality of semiconductor elements formed in a semiconductor layer and each having a source of an n type semiconductor, a drain of the n type semiconductor and a back gate of a p type semiconductor between the source and the drain. At least a predetermined part of the drain of one semiconductor element and a predetermined part of the drain of another semiconductor element have respective impurity concentrations different from each other.

Abstract: An integrated semiconductor device containing semiconductor elements that have respective desired on-resistances and breakdown voltages achieves appropriate characteristics as a whole of the integrated semiconductor element. The integrated semiconductor device includes a plurality of semiconductor elements formed in a semiconductor layer and each having a source of an n type semiconductor, a drain of the n type semiconductor and a back gate of a p type semiconductor between the source and the drain. At least a predetermined part of the drain of one semiconductor element and a predetermined part of the drain of another semiconductor element have respective impurity concentrations different from each other.

Abstract: A semiconductor device of the present invention has a pn-repeating structure that a structure in which a p-type impurity region (4) and an n-type drift region (3) are aligned side by side is repeated twice or more, and a low concentration region which is either p-type impurity region (4) or n-type drift region (3) located at the outermost portion of this pn-repeating structure has the lowest impurity concentration or has the least generally effective charge amount among all the p-type impurity regions (4) and n-type drift regions (3) forming the pn-repeating structure.

Abstract: The present invention provides a semiconductor technology capable of suppressing an increase in threshold voltage of a transistor and, also, improving a withstand voltage between a source region and a drain region. Source and drain regions of a p channel type MOS transistor are formed in an n? type semiconductor layer in an SOI substrate. In addition, an n type impurity region is formed in the semiconductor layer. The impurity region is formed over the entire bottom of the source region at a portion directly below this source region, and is also formed directly below the semiconductor layer between the source region and the drain region. A peak position of an impurity concentration in the impurity region is set below a lowest end of the source region at a portion directly below an upper surface of the semiconductor layer between the source region and the drain region.

Abstract: An N? layer is formed on a semiconductor substrate, with a BOX layer interposed. In the N? layer, a trench isolation region is formed to surround the N? layer to be an element forming region. The trench isolation region is formed to reach the BOX layer, from the surface of the N? layer. Between trench isolation region and the N? layer, a P type diffusion region 10a is formed. The P type diffusion region is formed continuously without any interruption, to be in contact with the entire surface of an inner sidewall of the trench isolation region surrounding the element forming region. In the element forming region of the N? layer, a prescribed semiconductor element is formed. Thus, a semiconductor device is formed, in which electrical isolation is established reliably, without increasing the area occupied by the element forming region.

Abstract: The semiconductor device of the present invention has a repeat structure of repeated unit structures in a semiconductor substrate (1), each unit structure having an n type diffusion region (3) and a p type diffusion region (4) in contact with each other to form a pn junction sandwiched between trenches (1a). An impurity amount in the n type diffusion region (3) and an impurity amount in the p type diffusion region (4) in the unit structure are set unequal (or different). Thus, in the semiconductor device having the trenches (1a), favorable breakdown voltage and avalanche breakdown tolerance can be ensured at the same time.

Abstract: An index table assembly includes a rotary table, a frame separated from the rotary table in the direction of a rotational axis of the rotary table, a clamping device for bringing the rotary table into contact with the frame by moving the rotary table along the rotational axis, a first bearing disposed between the rotary table and the frame, and an urging device disposed between the first bearing and one of the rotary table and the frame and pressing the first bearing against the other one of the rotary table and the frame at least when the rotary table rotates.

Abstract: An index table assembly includes a rotary table having a workpiece-receiving surface on one side and a through hole at a rotational center of the rotary table, the through hole having a step portion extending toward the rotational center in the middle of the through hole, a frame separated from the rotary table in the direction of a rotational axis of the rotary table and including a shaft portion extending through the step portion and a bearing support detachably attached to the shaft portion, the bearing support facing a surface of the step portion on the same side as the workpiece-receiving surface, a first bearing positioned between a surface of the rotary table on the side opposite to the workpiece-receiving surface and the frame, and a second bearing positioned between the surface of the step portion on the same side as the workpiece-receiving surface and the bearing support.

Abstract: A semiconductor device of the present invention has a pn-repeating structure that a structure in which a p-type impurity region (4) and an n-type drift region (3) are aligned side by side is repeated twice or more, and a low concentration region which is either p-type impurity region (4) or n-type drift region (3) located at the outermost portion of this pn-repeating structure has the lowest impurity concentration or has the least generally effective charge amount among all the p-type impurity regions (4) and n-type drift regions (3) forming the pn-repeating structure.

Abstract: A semiconductor device of the present invention has a pn-repeating structure that a structure in which a p-type impurity region (4) and an n-type drift region (3) are aligned side by side is repeated twice or more, and a low concentration region which is either p-type impurity region (4) or n-type drift region (3) located at the outermost portion of this pn-repeating structure has the lowest impurity concentration or has the least generally effective charge amount among all the p-type impurity regions (4) and n-type drift regions (3) forming the pn-repeating structure.

Abstract: The semiconductor device of the present invention has a repeat structure of repeated unit structures in a semiconductor substrate (1), each unit structure having an n type diffusion region (3) and a p type diffusion region (4) in contact with each other to form a pn junction sandwiched between trenches (1a). An impurity amount in the n type diffusion region (3) and an impurity amount in the p type diffusion region (4) in the unit structure are set unequal (or different). Thus, in the semiconductor device having the trenches (1a), favorable breakdown voltage and avalanche breakdown tolerance can be ensured at the same time.