Abstract: A new approach to objective quality assessment of DCT-coded video sequences, with or without a reference is proposed. The system is comprised of a proprietary segmentation algorithm, a feature extraction process and a nonlinear feed-forward-type neural network for feature analysis. The methods mimic function of the human visual system (HVS): A neural network training algorithm is used for determining the optimal network weights and biases for both system modes of operation. The proposed method allows for assessment of DCT-coded video sequences without the original source being available (pseudo-reference mode). The pseudo-reference mode is also comprised of a proprietary DCT-coded video (MPEG) noise reducer (MNR), co-pending patent application No. 60/592,143.

Abstract: In sensing a page of nonvolatile memory cells with a corresponding group of sense modules in parallel, as each high current cell is identified, it is locked out from further sensing while others in the page continued to be sensed. The sense module involved in the locked out is then in a lockout mode and becomes inactive. A noise source from the sense module becomes significant when in the lockout mode. The noise is liable to interfere with the sensing of neighboring cells by coupling through its bit line to neighboring ones. The noise can also couple through the common source line of the page to affect the accuracy of ongoing sensing of the cells in the page. Improved sense modules and method isolate the noise from the lockout sense module from affecting the other sense modules still active in sensing memory cell in the page.

Abstract: In a sensing method, accuracy of sensing operations, such as read or verify, in a memory device is improved by avoiding fluctuations in a sense amp supply voltage which can occur when different sense amps are strobed at different times. First and second sets of sense amps perform a sensing operation on respective storage elements, such as in an all bit line configuration. The first set of sense amps is strobed at a first time point. In response, a sensed analog level is converted to digital data. The A/D conversion relies on the sense amp supply voltage being accurate. To avoid a fluctuation in the sense amp supply voltage, a bypass path allows the storage elements associated with the first set of sense amps to continue to draw power from the sense amp supply voltage. The second set of sense amps is strobed at a later, second time point.

Abstract: An electrical connector includes a housing having a mating end and a board end. The housing has a plurality of contact cavities extending along a longitudinal axis between the mating and board ends. A plurality of contacts are received within the contact cavities. The contacts have a mating end and a mounting end, and the contacts have a flexible tail at the mounting end. The tail has a first portion extending along the longitudinal axis and a second portion angled with respect to the first portion with the second portion having a board mounting surface configured to mount to a circuit board. The tail includes a slot open along the board mounting surface.

Abstract: Accuracy of sensing operations, such as read or verify, in a memory device is improved by avoiding fluctuations in a sense amp supply voltage which can occur when different sense amps are strobed at different times. First and second sets of sense amps perform a sensing operation on respective storage elements, such as in an all bit line configuration. The first set of sense amps is strobed at a first time point. In response, a sensed analog level is converted to digital data. The A/D conversion relies on the sense amp supply voltage being accurate. To avoid a fluctuation in the sense amp supply voltage, a bypass path allows the storage elements associated with the first set of sense amps to continue to draw power from the sense amp supply voltage. The second set of sense amps is strobed at a later, second time point.

Abstract: A method for fabricating beams for a probe card includes dividing a large beam panel into smaller sub-panels before attaching the beams to corresponding posts on a substrate. Each sub-panel may have a sufficient number of beams to test several devices under test. The beam sub-panels may be aligned to the space transformer using alignment fiducials on the beam sub-panels that correspond to opposing alignment features formed in the space transformer or other substrate. Special tie-bars may be formed between: (1) rows, for example, of beams and the frame/frame splines (i.e., quadrant tie-bars); and (2) adjacent beams within any such rows on the beam panel (i.e., beam tie-bars). The approach may also include the use of tip tie-bars and/or tail tie-bars.

Abstract: Sensing circuits for sensing a conduction current of a memory cell among a group of non-volatile memory cells being sensed in parallel and providing the result thereof to a data bus are presented. A precharge circuit is coupled to a node for charging the node to an initial voltage. An intermediate circuit is also coupled to the node and connectable to the memory cell, whereby current from the precharge circuit can be supplied to the memory cell. The circuit also includes a comparator circuit to perform a determination the conduction current by a rate of discharge at the node; a data latch coupled to the comparator circuit to hold the result of said determination; and a transfer gate coupled to the data latch to supply a result latched therein to the data bus independently of the node. This arrangement improves sensing performance and can help to eliminate noise on the analog sensing path during sensing and reduce switching current.

Abstract: An electrical connector assembly includes a housing having a mating end and a connector cavity extending from the mating end along a cavity axis. The housing has a panel wall including first and second sides with an opening extending therebetween and open to the connector cavity. An electrical connector is received in the connector cavity and includes a shell extending along a longitudinal axis. The shell has a flange extending radially outward therefrom that engages the first side of the panel wall. The shell has a groove extending at least partially circumferentially around the shell. A washer is held within the groove of the shell and has a washer engagement surface. A spring concentrically surrounds a portion of the shell. The spring has a front end and a rear end with the front end engaging the washer engagement surface. The rear end faces the flange engagement surface and engages the second side of the panel wall such that the panel wall is captured between the flange and the spring.

Abstract: A probe test card assembly for testing of a device under test includes a printed circuit board, a substrate and a substrate support structure. The substrate support structure holds the substrate in position with respect to the printed circuit board. The substrate support structure may include one or more alignment members, one or more hard stop members and/or a support plate attached to the printed circuit board for positioning the substrate with respect to the printed circuit board. The one or more alignment members may extend through the printed circuit board and be connected to the one or more printed circuit board stiffener members. The probe test card assembly may also employ a proximity detection feature to indicate when the substrate is in a particular position with respect to the printed circuit board.

Abstract: A source line bias error caused by a voltage drop in a source line of a non-volatile memory device during a read or verify operation is addressed. In one approach, a body bias is applied to a substrate of the non-volatile memory device by coupling the substrate to a source voltage or a voltage which is a function of the source voltage. In another approach, a control gate voltage and/or drain voltage, e.g., bit line voltage, are compensated by referencing them to a voltage which is based on the source voltage instead of to ground. Various combinations of these approaches can be used as well. During other operations, such as programming, erase-verify and sensing of negative threshold voltages, the source line bias error is not present, so there is no need for a bias or compensation. A forward body bias can also be compensated.

Abstract: A source line bias error caused by a voltage drop in a source line of a non-volatile memory device during a read or verify operation is addressed. In one approach, a body bias is applied to a substrate of the non-volatile memory device by coupling the substrate to a source voltage or a voltage which is a function of the source voltage. In another approach, a control gate voltage and/or drain voltage, e.g., bit line voltage, are compensated by referencing them to a voltage which is based on the source voltage instead of to ground. Various combinations of these approaches can be used as well. During other operations, such as programming, erase-verify and sensing of negative threshold voltages, the source line bias error is not present, so there is no need for a bias or compensation. A forward body bias can also be compensated.

Abstract: A pull down circuit pulls a bit line voltage to a regulated source voltage in a non-volatile storage device during a sense operation such as a verify operation which occurs during programming. The storage device may include NAND strings which have associated bit lines and sense components, and a common source line. When a selected storage element of a NAND string has been programmed to its intended state, the bit line is locked out during subsequent verify operations which occur for other NAND strings which are not yet locked out. The pull down device is coupled to each bit line and to the common source line, whose voltage is regulated at a positive DC level, to prevent coupling of system power bus (VSS) noise from the locked out bit lines to the not yet locked out bit lines.

Abstract: A technique for efficient power amplification includes providing multiple baseband signals to an amplifier. The signals may be converted to RF and combined through one or more impedance inverters.

Abstract: In sensing a page of nonvolatile memory cells with a corresponding group of sense modules in parallel, as each high current cell is identified, it is locked out from further sensing while others in the page continued to be sensed. The sense module involved in the locked out is then in a lockout mode and becomes inactive. A noise source from the sense module becomes significant when in the lockout mode. The noise is liable to interfere with the sensing of neighboring cells by coupling through its bit line to neighboring ones. The noise can also couple through the common source line of the page to affect the accuracy of ongoing sensing of the cells in the page. Improved sense modules and method isolate the noise from the lockout sense module from affecting the other sense modules still active in sensing memory cell in the page.

Abstract: A terminal module for assembly into a high-speed electrical connector having a contact receiving first contact pair and second contact pair, the second contact pair being in electrical communication with the first contact pair via a corresponding pair of contact interconnections. The contact interconnections have a substantially identical length of the corresponding pair and are arranged within parallel planes. The module further includes a shielding member arranged and disposed in close proximity to at least three edges of one or more of the first contact pair, the second contact pair and the contact interconnections to provide shielding. A housing member is arranged and disposed to receive backplane contacts via contact receiving apertures. The housing member is engaged with the first contact pair to receive the contacts into the contacts of the first contact pair. A backplane having grounding plate grid is also disclosed.

Abstract: In sensing a page of nonvolatile memory cells with a corresponding group of sense modules in parallel, as each high current cell is identified, it is locked out from further sensing while others in the page continued to be sensed. The sense module involved in the locked out is then in a lockout mode and becomes inactive. A noise source from the sense module becomes significant when in the lockout mode. The noise is liable to interfere with the sensing of neighboring cells by coupling through its bit line to neighboring ones. The noise can also couple through the common source line of the page to affect the accuracy of ongoing sensing of the cells in the page. Improved sense modules and method isolate the noise from the lockout sense module from affecting the other sense modules still active in sensing memory cell in the page.

Abstract: A NAND string in which bit line-to-bit line noise is discharged prior to sensing a programming condition of a selected non-volatile storage element in the NAND string. A source voltage is applied which boosts the voltage in conductive NAND strings. The voltage boost results in capacitive coupling of noise to neighboring NAND strings. A current pull down device is used to discharge each NAND string prior to performing sensing. After each NAND string is coupled to a discharge path for a predetermined amount of time, bit lines of the NAND string are coupled to voltage sense components for sensing the programming condition of the selected non-volatile storage elements based on a potential of the bit lines. The selected non-volatile storage elements may have a negative threshold voltage. Further, a word line associated with the selected non-volatile storage elements may be set at ground.

Abstract: A non-volatile storage device in which current sensing is performed for a non-volatile storage element. A voltage is applied to a selected word line of the first non-volatile storage element, and source and p-well voltages are applied to a source and a p-well, respectively, associated with the non-volatile storage element. The source and p-well voltages are regulated at respective positive DC levels to avoid a ground bounce, or voltage fluctuation, which would occur if the source voltage at least was regulated at a ground voltage. A programming condition of the non-volatile storage element is determined by sensing a current in a NAND string of the non-volatile storage element. The sensing can occur quickly since there is no delay in waiting for the ground bounce to settle.

Abstract: A terminal module for assembly into a high speed electrical connector. The module includes an electrically insulated housing, a first contact portion and a second contact portion. The second contact portion is in electrical communication with the first contact portion via a contact interconnection. The contact interconnection is at least partially disposed within the insulated housing. At least one of the first contact portion or the second contact portion includes a contact selected from the group consisting of a mesh contact element, a socket configured to receive a mesh contact element and combinations thereof.

Abstract: A non-volatile storage device in which current sensing is performed for a non-volatile storage element with a negative threshold voltage. A control gate read voltage is applied to a selected word line of a non-volatile storage element, and source and p-well voltages are applied to a source and a p-well, respectively, associated with the non-volatile storage element. The source and p-well voltages exceed the control gate read voltage so that a positive control gate read voltage can be used. There is no need for a negative charge pump to apply a negative word line voltage even for sensing a negative threshold voltage. A programming condition of the non-volatile storage element is determined by sensing a voltage drop which is tied to a fixed current which flows in a NAND string of the non-volatile storage element.