Patents by Inventor Thierry Sicard
Thierry Sicard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9110485Abstract: A band-gap voltage reference circuit having first and second branches respectively including first and second groups of transistors of different emitter current conduction areas and current sources for running the first and second groups of transistors at different emitter current densities to generate respective base-emitter voltages, and output terminals connected to receive a regulated voltage (Vout) which is a function of the base-emitter voltages of the first and second groups of transistors. Each of the first and second groups includes at least one npn-type transistor and at least one pnp transistor connected with their emitter-collector paths in series in the respective one of the branches so as to present cumulated base-emitter voltages across the respective group.Type: GrantFiled: September 21, 2007Date of Patent: August 18, 2015Assignee: Freescale Semiconductor, Inc.Inventor: Thierry Sicard
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Publication number: 20150188426Abstract: A power switching device connected or connectable between a power supply and a load is described. The device may have at least two different operating states, each operating state having a different level of said output voltage associated with it.Type: ApplicationFiled: September 14, 2012Publication date: July 2, 2015Applicant: Freescale Semiconductor, Inc.Inventors: Thierry Sicard, Randall Gray, Philippe Perruchoud, John Pigott
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Patent number: 9071248Abstract: A circuit having an active mode and a sleep mode includes a power transistor, an amplifier, and a protection circuit. The power transistor has a first current electrode coupled to a first power supply terminal, a second current electrode as an output of the circuit for coupling to a load, and a control electrode, wherein the power transistor is characterized by having a threshold voltage and a leakage current, wherein the leakage current occurs between the control electrode and the first current electrode during the sleep mode. The amplifier has an output coupled to the control electrode of the power transistor that provides an active output during the active mode. The protection circuit detects the leakage current and prevents the leakage current from developing a voltage on the control electrode of the power transistor that exceeds the threshold voltage of the power transistor.Type: GrantFiled: March 3, 2010Date of Patent: June 30, 2015Assignee: Freescale Semiconductor, Inc.Inventors: Thierry Sicard, Laurent Guillot
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Publication number: 20150108936Abstract: A charging circuit for at least one bootstrap charge storage element within an inertial load driver circuit is described, the at least one bootstrap charge storage element comprising a first node operably coupled to an output node of at least one switching element of the inertial load driver circuit.Type: ApplicationFiled: June 5, 2012Publication date: April 23, 2015Applicant: Freescale Semiconductor, Inc.Inventor: Thierry Sicard
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Patent number: 8750415Abstract: A LIN network comprises a transmit driver for communicating on a single communication bus. A slope control module is operably coupled to a supply voltage and arranged to identify a voltage transition, and in response thereto and via control of the transmit driver selectively apply one of: a first voltage transition mode comprising a constant DV/DT slope transition, or a second voltage transition mode comprising a fixed time transition.Type: GrantFiled: May 24, 2006Date of Patent: June 10, 2014Assignee: Freescale Semiconductor, Inc.Inventor: Thierry Sicard
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Patent number: 8618780Abstract: A multimode voltage regulator comprises an output for providing a regulator output voltage Vdd and an output current to a load and a low power reference voltage source having a reference voltage output providing the regulator output voltage Vdd, when in a first low power mode the output current is not greater than a threshold value. It may comprise a buffer amplifier having an output providing the regulator output voltage Vdd, when the output current is greater than the threshold value and a first bias voltage input being connected in a second low power mode to the reference voltage output when the output current is greater than the threshold value for less than a predefined time. And it may comprise a mode controller for automatically determining the output current and automatically switching from first low power mode to second low power mode.Type: GrantFiled: November 24, 2008Date of Patent: December 31, 2013Assignee: Freescale Semiconductor, Inc.Inventors: Philippe Mounier, Estelle Huynh, David Lopez, Thierry Sicard
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Patent number: 8531324Abstract: Systems and methods are provided for converting analog data to digital data that can include performing N successive analog subtractions from an initial data charge Qin. The analog subtractions are performed using an amplifier coupled to a discharge capacitor and a divider circuit coupled to an input of the amplifier. The divider circuit includes a first capacitor, a second capacitor, and a switch to alternately divide a remaining charge Q by 2N between the first and second capacitors until the remaining charge Qin at the amplifier is below a threshold value. A compensating circuit compensates for fluctuations in the charge held by the first and second capacitors due to operation of the switch.Type: GrantFiled: July 19, 2011Date of Patent: September 10, 2013Assignee: Freescale Semiconductor, Inc.Inventor: Thierry Sicard
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Patent number: 8514530Abstract: A control and protection system has a DC terminal (DCT), for connection to a DC bus (DCB), a load terminal (LT) for connection to a LOAD, a ground terminal (GT) for connection to an external ground bus (EGB), and an INPUT terminal for receiving ON/OFF commands. An internal ground bus (IGB) of the system is normally coupled to the EGB via the GT. But if a ground fault disconnects the GT from the EGB, the system automatically couples the IGB to the LT, thereby providing a synthetic ground that facilitates continued operation of the system and any peripheral circuits coupled between the DCB and the GT. Any peripheral circuit current passing through the system to the EGB is prevented from causing improper operation of the LOAD by automatically adjusting a series impedance that it passes through between the GT and the LT before reaching the LOAD and EGB.Type: GrantFiled: April 28, 2011Date of Patent: August 20, 2013Assignee: Freescale Semiconductor, Inc.Inventor: Thierry Sicard
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Patent number: 8508282Abstract: A LIN network comprises a transmit driver and a receive comparator for communicating low frequency signals on a single communication bus. The transmit driver is operably coupled to a high frequency detector to detect a high frequency component on the low frequency signal. In response to detecting the high frequency component the LIN network is arranged to perform one or both of the following: route the low frequency signal having a high frequency component through a low pass filter; and/or bypass the low frequency signal having a high frequency component from passing through an active device operably coupled between the transmit driver and the single communication bus.Type: GrantFiled: February 9, 2006Date of Patent: August 13, 2013Assignee: Freescale Semiconductor, Inc.Inventor: Thierry Sicard
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Patent number: 8436597Abstract: A low drop-out DC voltage regulator comprising an output pass element for controlling an output voltage (v) of power supplied from a power supply through the output pass element to a load (R), a source of a reference voltage (v), and a feedback loop for providing to the output pass element a control signal tending to correct error in the output voltage. The feedback loop includes a differential module responsive to relative values of the output voltage (v) and the reference voltage (v) and an intermediate module driven by the differential module for providing the control signal. The differential module presents the widest bandwidth of the modules of the regulator and the differential module presents a frequency pole that is higher than the cut-off frequency of the regulator, at which its regulation gain becomes less than one.Type: GrantFiled: February 4, 2008Date of Patent: May 7, 2013Assignee: Freescale Semiconductor, Inc.Inventor: Thierry Sicard
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Patent number: 8400213Abstract: A complementary band-gap voltage reference circuit comprising first and second groups of transistors, each group containing a first transistor of npn type and a second transistor of pnp type and the transistors of different types in the same group having different emitter current conduction areas. The emitter-collector paths of the first transistors of each group are connected in parallel so as to present differential base-emitter voltages. The second transistors of each group are connected with their emitter-collector paths in parallel with a base-emitter junction of the first transistor of the same group so as to present differential base-emitter voltages of the second transistors across the first and second groups of transistors. The output regulated voltage is an additive function of the differential base-emitter voltages and of additive base-emitter voltages of transistors with smaller emitter current conduction area and different type.Type: GrantFiled: November 18, 2008Date of Patent: March 19, 2013Assignee: Freescale Semiconductor, Inc.Inventor: Thierry Sicard
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Patent number: 8384579Abstract: Systems and methods are provided for converting analog data to digital data that can include a discharge capacitor coupled to a voltage source. The voltage source supplies an initial data charge to the discharge capacitor; an amplifier coupled to the discharge capacitor; a divider circuit coupled to the amplifier; and a comparator coupled to the amplifier and the divider circuit. The divider circuit includes a first capacitor, a second capacitor, and a switch that is operated to alternately divide a remaining charge Q by 2N using the first and second capacitors until the remaining data charge Qin at the amplifier is below a threshold value in the process of converting analog data to digital data.Type: GrantFiled: July 19, 2011Date of Patent: February 26, 2013Assignee: Freescale Semiconductor, Inc.Inventor: Thierry Sicard
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Publication number: 20130021191Abstract: Systems and methods are provided for converting analog data to digital data that can include a discharge capacitor coupled to a voltage source. The voltage source supplies an initial data charge to the discharge capacitor; an amplifier coupled to the discharge capacitor; a divider circuit coupled to the amplifier; and a comparator coupled to the amplifier and the divider circuit. The divider circuit includes a first capacitor, a second capacitor, and a switch that is operated to alternately divide a remaining charge Q by 2N using the first and second capacitors until the remaining data charge Qin at the amplifier is below a threshold value in the process of converting analog data to digital data.Type: ApplicationFiled: July 19, 2011Publication date: January 24, 2013Inventor: THIERRY SICARD
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Publication number: 20130021190Abstract: Systems and methods are provided for converting analog data to digital data that can include performing N successive analog subtractions from an initial data charge Qin. The analog subtractions are performed using an amplifier coupled to a discharge capacitor and a divider circuit coupled to an input of the amplifier. The divider circuit includes a first capacitor, a second capacitor, and a switch to alternately divide a remaining charge Q by 2N between the first and second capacitors until the remaining charge Qin at the amplifier is below a threshold value. A compensating circuit compensates for fluctuations in the charge held by the first and second capacitors due to operation of the switch.Type: ApplicationFiled: July 19, 2011Publication date: January 24, 2013Inventor: THIERRY SICARD
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Patent number: 8351168Abstract: A circuit comprises a switch, a driver circuit, and an open circuit detector. The switch has a first current electrode coupled to a power supply terminal, a second current electrode coupled to supply a current to a load, and a control electrode. The driver circuit has an input for receiving a control signal, and an output coupled to the control electrode of the switch. The open circuit detector has a first terminal coupled to receive a voltage from a bootstrap capacitor, a second terminal coupled to the power supply terminal, and a control terminal coupled to the driver circuit. The open circuit detector detects an open circuit, and in response, provides a signal at the control terminal for causing the driver circuit to open the switch.Type: GrantFiled: April 27, 2010Date of Patent: January 8, 2013Assignee: Freescale Semiconductor, Inc.Inventor: Thierry Sicard
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Publication number: 20120326690Abstract: A circuit having an active mode and a sleep mode includes a power transistor, an amplifier, and a protection circuit. The power transistor has a first current electrode coupled to a first power supply terminal, a second current electrode as an output of the circuit for coupling to a load, and a control electrode, wherein the power transistor is characterized by having a threshold voltage and a leakage current, wherein the leakage current occurs between the control electrode and the first current electrode during the sleep mode. The amplifier has an output coupled to the control electrode of the power transistor that provides an active output during the active mode. The protection circuit detects the leakage current and prevents the leakage current from developing a voltage on the control electrode of the power transistor that exceeds the threshold voltage of the power transistor.Type: ApplicationFiled: March 3, 2010Publication date: December 27, 2012Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: Thierry Sicard, Laurent Guillot
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Patent number: 8339117Abstract: Electrical supply apparatus comprising a start-up circuit element coupled to an output element for ensuring reliable start-up when first connected to a source of power. The start-up circuit element comprises first and second branches with current mirror coupling therebetween. The first branch comprises first and second transistors of opposite polarities for connection in series between the source of power and ground and a leakage path to ground in parallel with the second transistor for start-up current for the first transistor of the first branch in response to application of voltage from the source of power. The current mirror coupling between the first and second branches responds to start-up of the first transistor of the first branch to start up a first transistor of the second branch and provide start-up current to the output element.Type: GrantFiled: July 24, 2007Date of Patent: December 25, 2012Assignee: Freescale Semiconductor, Inc.Inventor: Thierry Sicard
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Publication number: 20120275070Abstract: A control and protection system has a DC terminal (DCT), for connection to a DC bus (DCB), a load terminal (LT) for connection to a LOAD, a ground terminal (GT) for connection to an external ground bus (EGB), and an INPUT terminal for receiving ON/OFF commands. An internal ground bus (IGB) of the system is normally coupled to the EGB via the GT. But if a ground fault disconnects the GT from the EGB, the system automatically couples the IGB to the LT, thereby providing a synthetic ground that facilitates continued operation of the system and any peripheral circuits coupled between the DCB and the GT. Any peripheral circuit current passing through the system to the EGB is prevented from causing improper operation of the LOAD by automatically adjusting a series impedance that it passes through between the GT and the LT before reaching the LOAD and EGB.Type: ApplicationFiled: April 28, 2011Publication date: November 1, 2012Applicant: FREESCALE SEMICONDUCTOR, INC.Inventor: Thierry Sicard
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Patent number: 8259427Abstract: A power transistor has a first current electrode coupled to a first power supply terminal and a second current electrode as an output of the circuit. A driver control circuit is coupled between a first and a second internal power supply node and is coupled to a control electrode of the power transistor. A first switch selectively couples the first power supply terminal to the first internal power supply node. A second power supply terminal is coupled to the second internal power supply node. A diode has an anode coupled to the second internal power supply node. A second switch is coupled between the diode and the output of the circuit such that, when the circuit is in active mode, it selectively couples the cathode of the diode to the output of the circuit based on whether or not the second power supply terminal is coupled to an external ground.Type: GrantFiled: September 4, 2009Date of Patent: September 4, 2012Assignee: Freescale Semiconductor, Inc.Inventor: Thierry Sicard
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Publication number: 20110260772Abstract: A circuit comprises a switch, a driver circuit, and an open circuit detector. The switch has a first current electrode coupled to a power supply terminal, a second current electrode coupled to supply a current to a load, and a control electrode. The driver circuit has an input for receiving a control signal, and an output coupled to the control electrode of the switch. The open circuit detector has a first terminal coupled to receive a voltage from a bootstrap capacitor, a second terminal coupled to the power supply terminal, and a control terminal coupled to the driver circuit. The open circuit detector detects an open circuit, and in response, provides a signal at the control terminal for causing the driver circuit to open the switch.Type: ApplicationFiled: April 27, 2010Publication date: October 27, 2011Inventor: Thierry Sicard