Abstract: A circuit has a power transistor, a driver control circuit, a variable clamp circuit and a turn-off control circuit. The power transistor has a first current electrode coupled to a first power supply terminal, a second current electrode as an output of the circuit, and a control electrode. The driver control circuit has an output coupled to the control electrode of the power transistor for controlling the power transistor during an active mode of the circuit. The variable clamp circuit is coupled between the output of circuit and the first power supply terminal. The turn-off control circuit is coupled to the variable clamp circuit and selects clamping levels of the variable clamp circuit during a transition from the active mode to an inactive mode of the circuit.

Abstract: A multimode voltage regulator comprises an output for providing a regulator output voltage Vdd and an output current to a load and a low power reference voltage source having a reference voltage output providing the regulator output voltage Vdd, when in a first low power mode the output current is not greater than a threshold value. It may comprise a buffer amplifier having an output providing the regulator output voltage Vdd, when the output current is greater than the threshold value and a first bias voltage input being connected in a second low power mode to the reference voltage output when the output current is greater than the threshold value for less than a predefined time. And it may comprise a mode controller for automatically determining the output current and automatically switching from first low power mode to second low power mode.

Abstract: A switching circuit includes first and second transistors, and a driver circuit. The first transistor has a first current electrode coupled to a first power supply voltage terminal, a second current electrode, and a control electrode. The second transistor has a first current electrode coupled to the second current electrode of the first transistor, a second current electrode coupled to a second power supply voltage terminal, and a control electrode. The driver circuit has an input for receiving an input signal, and an output coupled to the control electrode of the first transistor. The driver circuit precharges the control electrode of the first transistor to a first predetermined voltage, and in response to the input signal transitioning from a first logic state to a second logic state, the driver circuit provides a second predetermined voltage to the control electrode of the first transistor to cause the first transistor to be conductive.

Abstract: A circuit includes a first resistive element coupled to a diode, a second resistive element, a first transistor having a first current electrode coupled the second resistive element, a second transistor having a first current electrode coupled to the first resistive element and a second current electrode coupled to the control electrode of the first transistor, a third resistive element coupled to a node, a third transistor having a first current electrode coupled to the node and having a control electrode and a second current electrode each coupled to the control electrode of the second transistor, a fourth transistor having a first current electrode coupled to the second resistive element and a control electrode coupled to the control electrode of the second transistor, and a fifth transistor having a first current electrode coupled to the node and a control electrode coupled to the second current electrode of the fourth transistor.

Abstract: A circuit comprises a first amplifier portion and a second amplifier portion. The first amplifier portion includes first and second transistors coupled together in a common-base configuration. A current mirror is coupled to the first and second transistors. A first filter is coupled between a first input and the first and second transistors. The second amplifier portion includes third and fourth transistors coupled together in a common-base configuration. First and second current sources are coupled to the third and fourth transistors. A second filter is coupled between a second input and the control electrodes of the third and fourth transistors, wherein the first and second filters are coupled together.

Abstract: A power transistor has a first current electrode coupled to a first power supply terminal and a second current electrode as an output of the circuit. A driver control circuit is coupled between a first and a second internal power supply node and is coupled to a control electrode of the power transistor. A first switch selectively couples the first power supply terminal to the first internal power supply node. A second power supply terminal is coupled to the second internal power supply node. A diode has an anode coupled to the second internal power supply node. A second switch is coupled between the diode and the output of the circuit such that, when the circuit is in active mode, it selectively couples the cathode of the diode to the output of the circuit based on whether or not the second power supply terminal is coupled to an external ground.

Abstract: A switching circuit includes first and second transistors, and a driver circuit. The first transistor has a first current electrode coupled to a first power supply voltage terminal, a second current electrode, and a control electrode. The second transistor has a first current electrode coupled to the second current electrode of the first transistor, a second current electrode coupled to a second power supply voltage terminal, and a control electrode. The driver circuit has an input for receiving an input signal, and an output coupled to the control electrode of the first transistor. The driver circuit precharges the control electrode of the first transistor to a first predetermined voltage, and in response to the input signal transitioning from a first logic state to a second logic state, the driver circuit provides a second predetermined voltage to the control electrode of the first transistor to cause the first transistor to be conductive.

Abstract: A circuit has a power transistor, a driver control circuit, a variable clamp circuit and a turn-off control circuit. The power transistor has a first current electrode coupled to a first power supply terminal, a second current electrode as an output of the circuit, and a control electrode. The driver control circuit has an output coupled to the control electrode of the power transistor for controlling the power transistor during an active mode of the circuit. The variable clamp circuit is coupled between the output of circuit and the first power supply terminal. The turn-off control circuit is coupled to the variable clamp circuit and selects clamping levels of the variable clamp circuit during a transition from the active mode to an inactive mode of the circuit.

Abstract: A band-gap voltage reference circuit comprising first and second branches respectively including first and second groups of transistors of different emitter current conduction areas and current sources for running the first and second groups of transistors at different emitter current densities to generate respective base-emitter voltages, and output terminals connected to receive a regulated voltage (Vout) which is a function of the base-emitter voltages of the first and second groups of transistors. Each of the first and second groups includes at least one npn-type transistor and at least one pnp transistor connected with their emitter-collector paths in series in the respective one of the branches so as to present cumulated base-emitter voltages across the respective group.

Abstract: A low drop-out DC voltage regulator comprising an output pass element for controlling an output voltage (v) of power supplied from a power supply through the output pass element to a load (R), a source of a reference voltage (v), and a feedback loop for providing to the output pass element a control signal tending to correct error in the output voltage. The feedback loop includes a differential module responsive to relative values of the output voltage (v) and the reference voltage (v) and an intermediate module driven by the differential module for providing the control signal. The differential module presents the widest bandwidth of the modules of the regulator and the differential module presents a frequency pole that is higher than the cut-off frequency of the regulator, at which its regulation gain becomes less than one.

Abstract: A switching circuit includes a first transistor and a driver circuit. The first transistor has a first current electrode coupled to a first power supply voltage terminal to receive a first power supply voltage, a control electrode, and a second current electrode coupled to an output terminal. The driver circuit has an output coupled to the control electrode of the first transistor, the driver circuit for providing a bias current to the control electrode of the first transistor that is proportional to an inverse of a square root of a voltage between the first current electrode and the control electrode of the first transistor. A voltage at the output terminal increases linearly during a turn-on period of the first transistor.

Abstract: Electrical supply apparatus comprising a start-up circuit element coupled to an output element for ensuring reliable start-up when first connected to a source of power. The start-up circuit element comprises first and second branches with current mirror coupling therebetween. The first branch comprises first and second transistors of opposite polarities for connection in series between the source of power and ground and a leakage path to ground in parallel with the second transistor for start-up current for the first transistor of the first branch in response to application of voltage from the source of power. The current mirror coupling between the first and second branches responds to start-up of the first transistor of the first branch to start up a first transistor of the second branch and provide start-up current to the output element.

Abstract: A LIN network comprises a transmit driver for communicating on a single communication bus. A slope control module is operably coupled to a supply voltage and arranged to identify a voltage transition, and in response thereto and via control of the transmit driver selectively apply one of: a first voltage transition mode comprising a constant DV/DT slope transition, or a second voltage transition mode comprising a fixed time transition.

Abstract: The transmitter comprises a signal generator including a capacitor producing the switched signal to be applied to the line. The capacitor is charged by a charging current in response to an input signal so as to define an edge of the switched signal through a feedback loop responsive to the capacitor voltage generating a feedback current having a continuous magnitude that is a progressive function of the capacitor voltage, the charging current being a function of the feedback current. The feedback loop generates first and second feedback voltages one of which is a rising function of the capacitor voltage and the other is a falling function of the capacitor voltage. The feedback current is generated first as a function of one of the feedback voltages and subsequently as a function of the other of the feedback voltages.

Abstract: A LIN network comprises a transmit driver and a receive comparator for communicating low frequency signals on a single communication bus. The transmit driver is operably coupled to a high frequency detector to detect a high frequency component on the low frequency signal. In response to detecting the high frequency component the LIN network is arranged to perform one or both of the following: route the low frequency signal having a high frequency component through a low pass filter; and/or bypass the low frequency signal having a high frequency component from passing through an active device operably coupled between the transmit driver and the single communication bus.

Abstract: A receiver for receiving a switched signal on a communication line (1), such as a LIN bus, the signal varying between first and second voltage levels (sup, ground). The receiver comprises a comparator (31, 54) responsive to the relative values of the received signal voltage level (Vlin) and an input reference voltage level (Vsup). The comparator (31, 54) comprises a current generator (40, 41) selectively operatble when the recieved signal is asserted to produce an input current (Iin) which is a function of the received signal voltage level (Vlin) and a reference current (Isup) which is a function of the input reference voltage level (Vsup), and output means (28, 32, 31; 55, 56) responsive to the relative values of the input current (Iin) and the reference current (Isup). The output means (28, 32, 31; 56) is supplied with power at a voltage (VDD) substantially lower than the difference between the first and second voltage levels (Vsup, ground).

Abstract: A low drop-out voltage regulator (300) and method comprising: a differential transistor arrangement (Q1–Q2) for receiving a reference voltage and in dependence thereon producing a regulatred output voltage; an output stage (Q3) for coupling to a load; and a control loop (310) coupled to the differential transistor arrangement for providing a dominant pole. Since a load capacitance is not used for dominant pole, stability of operation may be obtained with a lower load capacitance. The output stage is preferably a closed-loop unity gain amplifier providing a low impedance output. This provides the following advantages: 1—The output capacitor can be dramatically reduced or removed (a low dominant pole, allows the regulator to worth with 0nF output capacitor). 2—internal power consumption can be reduced, improving regulator efficiency. 3—Low output impedance is provided, with very low DC output resistance. 4—The load capacitor can have zero ESR (equivalent serial resistance).

Abstract: A low drop-out voltage regulator (300) and method comprising: a differential transistor arrangement (Q1-Q2) for receiving a reference voltage and in dependence thereon producing a regulatred output voltage; an output stage (Q3) for coupling to a load; and a control loop (310) coupled to the differential transistor arrangement for providing a dominant pole. Since a load capacitance is not used for dominant pole, stability of operation may be obtained with a lower load capacitance. The output stage is preferably a closed-loop unity gain amplifier providing a low impedance output. This provides the following advantages: 1—The output capacitor can be dramatically reduced or removed (a low dominant pole, allows the regulator to worth with 0nF output capacitor). 2—internal power consumption can be reduced, improving regulator efficiency. 3—Low output impedance is provided, with very low DC output resistance. 4—The load capacitor can have zero ESR (equivalent serial resistance).

Abstract: A receiver for receiving a switched signal on a communication line (1), such as a LIN bus, the signal varying between first and second voltage levels (sup, ground). The receiver comprises a comparator (31,54) responsive to the relative values of the received signal voltage level (Vlin) and an input reference voltage level (Vsup). The comparator (31, 54) comprises a current generator (40,41) selectively operatble when the recieved signal is asserted to produce an input current (Iin) which is a function of the received signal voltage level (Vlin) and a reference current (Isup) which is a function of the input reference voltage level (Vsup), and output means (28, 32, 31; 55, 56) responsive to the relative values of the input current (Iin) and the reference current (Isup). The output means (28, 32, 31; 56) is supplied with power at a voltage (VDD) substantially lower than the difference bwtween the first and second voltage levels (Vsup, ground).

Abstract: A transmitter (4) for a controlled-shape switched signal on a communication line (1) comprises a signal generator including a capacitor (19) producing the switched signal to be applied to the line. The capacitor is charged by a charging current (IC) in response to an input signal (TX) so as to define an edge of the switched signal. The charging means (24, 25) comprises a feedback loop responsive to the capacitor voltage (VO) for generating a feedback current (IE) having a continuous magnitude that is a progressive function of the capacitor voltage, the charging current (IC) being a function of the feedback current (IE) Resistors (R; R1, R2) define an RC circuit with the capacitor (19) enabling the time constant of the feedback current to be controlled. Preferably, the feedback loop generates first and second feedback voltages (VH, VL) one of which is a rising function of the capacitor voltage (VO) and the other is a falling function of the capacitor voltage (VO).