Patents by Inventor Thomas Basler
Thomas Basler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20200243509Abstract: A semiconductor device is operable a forward current mode and a reverse current mode and comprises a semiconductor region, and a controllable charge carrier injector, and a gate. A method includes detecting, in the reverse current mode, if the present load current in the reversed direction does not exceed a threshold value, providing a gate signal such that the gate electrode causes the charge carrier injector to induce a first charge carrier density within the semiconductor region so as to conduct a nominal load current in the reverse direction; if the present load current in the reverse direction does exceed the threshold value, operating the semiconductor device in an overload state by providing the gate signal with a voltage that causes the semiconductor region to conduct an overload current in the reverse direction, wherein the second charge carrier density is higher than the first charge carrier density.Type: ApplicationFiled: April 9, 2020Publication date: July 30, 2020Inventors: Johannes Georg Laven, Roman Baburske, Thomas Basler, Philip Christoph Brandt, Maria Cotorogea
-
Publication number: 20200185906Abstract: A power inverter includes a bridge circuit including a first half-bridge and a second half-bridge, each half-bridge including a high-side device and a low-side device, and a gate driver circuit connected with each gate of the high-side device and low-side power device of the first and second half-bridges and operable to provide each gate with a respective voltage to control operation of the respective power device. The gate driver is operable to provide a first voltage which is higher than a first threshold voltage of the respective power device, and a second voltage which is higher than a surge threshold of the respective power device. The surge threshold is higher than the first threshold and defines the onset of a surge current operation area of the respective power device at which the power device becomes conducts a surge current that is larger than the rated current of the device.Type: ApplicationFiled: February 14, 2020Publication date: June 11, 2020Inventors: Johannes Georg Laven, Thomas Basler, Hans-Joachim Schulze
-
Patent number: 10680523Abstract: In accordance with an embodiment, at least one switching circuit includes a voltage clamping element, and a half-bridge with a high-side switch and a low side-switch, wherein the high-side switch and the low-side switch each comprise a control node and a load path, and wherein the load paths of the high-side switch and the low side switch are connected in series. The voltage clamping element is connected in parallel with the half-bridge such that a first overall inductance of first conductors connecting the high-side switch and the low-side switch and connecting the voltage clamping element with the half-bridge is less than 20 nH.Type: GrantFiled: August 6, 2018Date of Patent: June 9, 2020Assignee: INFINEON TECHNOLOGIES AUSTRIA AGInventors: Jan Fuhrmann, Thomas Basler, Hans-Guenter Eckel
-
Patent number: 10651165Abstract: A semiconductor device includes a semiconductor region having charge carriers of a first conductivity type, a transistor cell in the semiconductor region, and a semiconductor channel region in the transistor cell and having a first doping concentration of charge carriers of a second conductivity type. A semiconductor auxiliary region in the semiconductor region has a second doping concentration of charge carriers of the second conductivity type, which is at least 30% higher than the first doping concentration. A pn-junction between the semiconductor auxiliary region and the semiconductor region is positioned as deep or deeper in the semiconductor region as a pn-junction between the semiconductor channel region and the semiconductor region. The semiconductor auxiliary region is positioned closer to the semiconductor channel region than any other semiconductor region having charge carriers of the second conductivity type and that forms a further pn-junction with the semiconductor region.Type: GrantFiled: December 16, 2015Date of Patent: May 12, 2020Assignee: Infineon Technologies AGInventors: Johannes Georg Laven, Roman Baburske, Thomas Basler, Philip Christoph Brandt, Maria Cotorogea
-
Patent number: 10644496Abstract: A power device includes an active area having at least two switchable regions with different threshold voltages.Type: GrantFiled: December 19, 2015Date of Patent: May 5, 2020Assignee: Infineon Technologies AGInventors: Johannes Georg Laven, Thomas Basler, Hans-Joachim Schulze
-
Publication number: 20200098869Abstract: A silicon carbide device includes a transistor cell with a front side doping region, a body region, and a drift region. The body region includes a first portion having a first average net doping concentration and a second portion having a second average net doping concentration. The first portion and the second portion have an extension of at least 50 nm in a vertical direction. The first average net doping concentration is at least two times the second average net doping concentration, and the first average net doping concentration is at least 1ยท1017 cm?3.Type: ApplicationFiled: September 19, 2019Publication date: March 26, 2020Inventors: Hans-Joachim SCHULZE, Thomas BASLER, Andre Rainer STEGNER
-
Publication number: 20200013723Abstract: A silicon carbide device includes a silicon carbide substrate, a contact layer including nickel, silicon and aluminum, a barrier layer structure including titanium and tungsten, and a metallization layer including copper. The contact layer is located on the silicon carbide substrate. The contact layer is located between the silicon carbide substrate and at least a part of the barrier layer structure. The barrier layer structure is located between the silicon carbide substrate and the metallization layer.Type: ApplicationFiled: June 26, 2019Publication date: January 9, 2020Inventors: Edward Fuergut, Ravi Keshav Joshi, Ralf Siemieniec, Thomas Basler, Martin Gruber, Jochen Hilsenbeck, Dethard Peters, Roland Rupp, Wolfgang Scholz
-
Publication number: 20190386093Abstract: A power electronic arrangement includes a semiconductor switch structure configured to assume a forward conducting state. A steady-state current carrying capability of the semiconductor switch structure in the forward conducting state is characterized by a nominal current. The semiconductor switch structure is configured to conduct, in the forward conducting state, at least a part of a forward current in a forward current mode of the power electronic arrangement. A diode structure electrically connected in antiparallel to the semiconductor switch structure is configured to conduct at least a part of a reverse current in a reverse mode of the power electronic arrangement. A thyristor structure electrically connected in antiparallel to the semiconductor switch structure has a forward breakover voltage than a diode on-state voltage of the diode structure at a critical diode current value, the critical diode current value amounting to at most five times the nominal current.Type: ApplicationFiled: June 4, 2019Publication date: December 19, 2019Inventors: Frank Dieter Pfirsch, Thomas Basler
-
Publication number: 20190355815Abstract: The disclosure relates to a semiconductor component having an SiC semiconductor body and a first load terminal on a first surface of the SiC semiconductor body. A second load terminal is formed on a second surface of the SiC semiconductor body opposite the first surface. The semiconductor component has a drift zone of a first conductivity type in the SiC semiconductor body and a first semiconductor area of a second conductivity type which is electrically connected to the first load terminal. A pn junction between the drift zone and the first semiconductor area defines a voltage blocking strength of the semiconductor component.Type: ApplicationFiled: May 17, 2019Publication date: November 21, 2019Inventors: Thomas Basler, Rudolf Elpelt, Hans-Joachim Schulze
-
Patent number: 10475909Abstract: An electric assembly includes a bipolar switching device and a transistor circuit. The transistor circuit is electrically connected in parallel with the bipolar switching device and includes a normally-on wide bandgap transistor.Type: GrantFiled: May 30, 2017Date of Patent: November 12, 2019Assignee: Infineon Technologies, AGInventors: Thomas Basler, Roman Baburske, Daniel Domes, Johannes Georg Laven, Roland Rupp
-
Publication number: 20190341447Abstract: A semiconductor component has a gate structure that extends from a first surface into an SiC semiconductor body. A body area in the SiC semiconductor body adjoins a first side wall of the gate structure. A first shielding area and a second shielding area of the conductivity type of the body area have at least twice as high a level of doping as the body area. A diode area forms a Schottky contact with a load electrode between the first shielding area and the second shielding area.Type: ApplicationFiled: May 6, 2019Publication date: November 7, 2019Inventors: Ralf Siemieniec, Thomas Aichinger, Thomas Basler, Wolfgang Bergner, Rudolf Elpelt, Romain Esteve, Michael Hell, Daniel Kueck, Caspar Leendertz, Dethard Peters, Hans-Joachim Schulze
-
Patent number: 10461739Abstract: Transistor devices are provided. A transistor device includes a unipolar transistor coupled between a first terminal and a second terminal; and a bipolar transistor coupled in parallel to the unipolar transistor between the first terminal and the second terminal. The bipolar transistor is configured to carry a majority of a current flowing through the transistor device when at least one of the current or a control voltage controlling the unipolar transistor and the bipolar transistor exceeds a predetermined threshold. The bipolar transistor is further configured to have a threshold voltage higher than a threshold voltage of the unipolar transistor, and a difference between the threshold voltage of the bipolar transistor and the threshold voltage of the unipolar transistor is at least 1 V.Type: GrantFiled: March 15, 2018Date of Patent: October 29, 2019Assignee: Infineon Technologies Austria AGInventors: Thomas Basler, Roman Baburske, Johannes Georg Laven, Franz-Josef Niedernostheide, Hans-Joachim Schulze
-
Patent number: 10404250Abstract: Transistor devices are described that include a first transistor and a second transistor coupled in parallel between a first terminal and a second terminal. The second transistor is based on a wide bandgap semiconductor material. The second transistor has a breakthrough voltage lower than a breakthrough voltage of the first transistor over a predetermined operating range. The predetermined operating range comprises at least an operating range for which the transistor device is specified.Type: GrantFiled: March 15, 2018Date of Patent: September 3, 2019Assignee: Infineon Technologies AGInventors: Thomas Basler, Roman Baburske, Johannes Georg Laven, Franz-Josef Niedernostheide, Hans-Joachim Schulze
-
Publication number: 20190259863Abstract: A chip includes a semiconductor body coupled to a first and a second load terminal. The semiconductor body includes an active region including a plurality of breakthrough cells, each of the breakthrough cells includes: an insulation structure; a drift region; an anode region, the anode region being electrically connected to the first load terminal and disposed in contact with the first load terminal; a first barrier region arranged in contact with each of the anode region and the insulation structure, where the first barrier region of the plurality of breakthrough cells forms a contiguous semiconductor layer; a second barrier region separating each of the anode region and at least a part of the first barrier region from the drift region; and a doped contact region arranged in contact with the second load terminal, where the drift region is positioned between the second barrier region and the doped contact region.Type: ApplicationFiled: May 3, 2019Publication date: August 22, 2019Applicant: Infineon Technologies Austria AGInventors: Markus BINA, Thomas BASLER, Matteo DAINESE, Hans-Joachim SCHULZE
-
Publication number: 20190259842Abstract: A semiconductor component includes a field effect transistor structure in a SiC semiconductor body having a gate structure at a first surface of the SiC semiconductor body and a drift zone of a first conductivity type. A zone of the first conductivity type is formed in a vertical direction between a semiconductor region of a second conductivity type and the drift zone. The zone is spaced apart from the gate structure and is at a maximal distance of 1 ?m from the semiconductor region in the vertical direction.Type: ApplicationFiled: February 21, 2019Publication date: August 22, 2019Inventors: Thomas Basler, Hans-Joachim Schulze, Ralf Siemieniec
-
Patent number: 10355116Abstract: A power semiconductor device includes: a semiconductor body coupled to a first load terminal and a second load terminal, and includes: a first doped region of a second conductivity type electrically connected to the first load terminal; a recombination zone arranged at least within the first doped region; an emitter region of the second conductivity type electrically connected to the second load terminal; and a drift region of a first conductivity type arranged between the first doped region and the emitter region. The drift region and the first doped region enable the power semiconductor device to operate in: a conducting state during which a load current between the load terminals is conducted along a forward direction; in a forward blocking state during which a forward voltage applied between the load terminals is blocked; and in a reverse blocking state during which a reverse voltage applied between the terminals is blocked.Type: GrantFiled: March 20, 2018Date of Patent: July 16, 2019Assignee: Infineon Technologies Austria AGInventors: Markus Bina, Thomas Basler, Matteo Dainese, Hans-Joachim Schulze
-
Patent number: 10340264Abstract: Semiconductor device is provided with a semiconductor body that includes a clamping structure including a first pn junction diode and a second pn junction diode serially connected back to back between a first contact and a second contact. A breakdown voltage of the first pn junction diode is greater than 100 V, and a breakdown voltage of the second pn junction diode is greater than 10 V.Type: GrantFiled: February 28, 2018Date of Patent: July 2, 2019Assignee: Infineon Technologies Austria AGInventors: Stephan Voss, Roman Baburske, Thomas Basler, Thomas Kimmer, Hans-Joachim Schulze
-
Publication number: 20190198355Abstract: A method of manufacturing a semiconductor power package includes: embedding a power semiconductor chip in an encapsulation, the encapsulation forming a housing of the semiconductor power package; and extending a layer of a covering material over at least a part of an outer main surface of the encapsulation. The covering material has a thermal conductivity greater than a thermal conductivity of the material of the encapsulation and/or a temperature stability greater than a temperature stability of the pre-molded chip housing.Type: ApplicationFiled: March 5, 2019Publication date: June 27, 2019Inventors: Thomas Basler, Edward Fuergut, Christian Kasztelan, Ralf Otremba
-
Patent number: 10333387Abstract: An electric assembly includes a semiconductor switching device with a maximum breakdown voltage rating across two load terminals in an off-state. A clamping diode is electrically connected to the two load terminals and parallel to the switching device. A semiconductor body of the clamping diode is made of silicon carbide. An avalanche voltage of the clamping diode is lower than the maximum breakdown voltage rating of the switching device.Type: GrantFiled: October 21, 2016Date of Patent: June 25, 2019Assignee: Infineon Techonologies AGInventors: Thomas Basler, Roman Baburske, Johannes Georg Laven
-
Patent number: 10256119Abstract: A method of manufacturing a semiconductor power package includes: providing a pre-molded chip housing and an electrically conducting chip carrier cast-in-place in the pre-molded chip housing; bonding a power semiconductor chip on the electrically conducting chip carrier; and applying a covering material so as to embed the power semiconductor chip. The covering material has an elastic modulus less than an elastic modulus of a material of the pre-molded chip housing and/or a thermal conductivity greater than a thermal conductivity of the material of the pre-molded chip housing and/or a temperature stability greater than a temperature stability of the pre-molded chip housing.Type: GrantFiled: December 1, 2017Date of Patent: April 9, 2019Assignee: Infineon Technologies Austria AGInventors: Thomas Basler, Edward Fuergut, Christian Kasztelan, Ralf Otremba