Patents by Inventor Thomas Zettler

Thomas Zettler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240123038
    Abstract: The present invention relates to PTH prodrugs, pharmaceutical compositions comprising such PTH prodrugs and their uses.
    Type: Application
    Filed: September 8, 2023
    Publication date: April 18, 2024
    Inventors: Kennett Sprogøe, Felix Cleemann, Guillaume Maitro, Mathias Krusch, Thomas Wegge, Joachim Zettler
  • Patent number: 11918628
    Abstract: The present invention relates to a controlled-release parathyroid hormone (PTH) compound in which PTH(1-34) is reversibly conjugated to a branched polyethylene glycol. The invention further relates to a pharmaceutical composition of the compound. The compound or pharmaceutical composition is useful for treatment, control, delay or prevention of a condition that can be treated, controlled, delayed or prevented with PTH.
    Type: Grant
    Filed: July 19, 2023
    Date of Patent: March 5, 2024
    Assignee: ASCENDIS PHARMA BONE DISEASES A/S
    Inventors: Kennett Sprogøe, Felix Cleemann, Guillaume Maitro, Mathias Krusch, Thomas Wegge, Joachim Zettler
  • Publication number: 20240027184
    Abstract: The present invention relates to a method and an apparatus for measuring the thickness d of a transparent layer (10), and in particular to a method and an apparatus for measuring the thickness d of glass plates during wet-chemical glass thinning in the manufacturing process. The method for measuring the thickness d of a transparent layer (10) includes: determining an approximate thickness dFFT based on a precisely known dispersion n(l) of the material of the layer (10) by performing Fast Fourier Transformation, FFT, analysis on Fabry-Pérot oscillation, FPO, from the layer (10) in a spectral reflectance measurement (900); and performing a FPO full-spectral fitting procedure (910-0) with the approximated thickness dFFT as starting value d0,0 to determine an initial local best fitting thickness dFPO,0.
    Type: Application
    Filed: July 19, 2023
    Publication date: January 25, 2024
    Inventors: Joerg-Thomas Zettler, Johannes Kristian Zettler
  • Patent number: 11821935
    Abstract: In some examples, this disclosure describes a method of operating a circuit. The method may comprise performing a circuit function under normal operating conditions, wherein performing the circuit function under the normal operating conditions includes performing at least a portion of the circuit functions via a characteristic circuit, performing at least the portion of the circuit function under enhanced stress conditions via a characteristic circuit replica, and predicting a potential future problem with the circuit function under the normal conditions based on an evaluation of operation of the characteristic circuit relative to operation of the characteristic circuit replica.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: November 21, 2023
    Assignee: Infineon Technologies AG
    Inventors: Dirk Hammerschmidt, Bernhard Gstoettenbauer, Rafael Zalman, Thomas Zettler, Georg Georgakos, Ludwig Rossmeier, Veit Kleeberger
  • Patent number: 11733288
    Abstract: In some examples, a method of operating a circuit may comprise performing a circuit function under normal conditions, performing the circuit function under aggravated conditions, predicting a potential future problem with the circuit function under the normal conditions based on an output of the circuit function under the aggravated conditions, and outputting a predictive alert based on predicting the potential future problem.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: August 22, 2023
    Assignee: Infineon Technologies AG
    Inventors: Bernhard Gstoettenbauer, Georg Georgakos, Dirk Hammerschmidt, Veit Kleeberger, Ludwig Rossmeier, Rafael Zalman, Thomas Zettler
  • Patent number: 11669384
    Abstract: A fault detection system includes a sensor configured to measure a physical quantity and generate a measurement of the physical quantity; a first processor configured to receive the measurement, execute a first firmware based on the measurement, and output a first result of the executed first firmware; a second processor configured to receive the measurement from the sensor, execute a second firmware based on the measurement, and output a second result of the executed second firmware, wherein the first firmware and the second firmware provide a same nominal function in a diverse manner for calculating the first result and the second result, respectively, such that the first result and the second result are expected to be within a predetermined margin; and a fault detection circuit configured to detect a fault when the first result and the second result are not within the predetermined margin.
    Type: Grant
    Filed: November 19, 2021
    Date of Patent: June 6, 2023
    Assignee: Infineon Technologies AG
    Inventors: Thomas Zettler, Dirk Hammerschmidt, Friedrich Rasbornig, Michael Strasser, Akos Hegedus, Wolfgang Granig
  • Publication number: 20230168293
    Abstract: In some examples, a method of operating a circuit may comprise performing a circuit function under normal conditions, performing the circuit function under aggravated conditions, predicting a potential future problem with the circuit function under the normal conditions based on an output of the circuit function under the aggravated conditions, and outputting a predictive alert based on predicting the potential future problem.
    Type: Application
    Filed: December 1, 2021
    Publication date: June 1, 2023
    Inventors: Bernhard Gstoettenbauer, Georg Georgakos, Dirk Hammerschmidt, Veit Kleeberger, Ludwig Rossmeier, Rafael Zalman, Thomas Zettler
  • Publication number: 20230168294
    Abstract: In some examples, this disclosure describes a method of operating a circuit. The method may comprise performing a circuit function under normal operating conditions, wherein performing the circuit function under the normal operating conditions includes performing at least a portion of the circuit functions via a characteristic circuit, performing at least the portion of the circuit function under enhanced stress conditions via a characteristic circuit replica, and predicting a potential future problem with the circuit function under the normal conditions based on an evaluation of operation of the characteristic circuit relative to operation of the characteristic circuit replica.
    Type: Application
    Filed: December 1, 2021
    Publication date: June 1, 2023
    Inventors: Dirk Hammerschmidt, Bernhard Gstoettenbauer, Rafael Zalman, Thomas Zettler, Georg Georgakos, Ludwig Rossmeier, Veit Kleeberger
  • Publication number: 20230169250
    Abstract: In some examples, a method of operating a circuit is described. The method may include performing a circuit function and estimating a probability of failure of the circuit based on one or more stress origination metrics, one or more stress victim events, and one or more initial state conditions.
    Type: Application
    Filed: December 1, 2021
    Publication date: June 1, 2023
    Inventors: Veit Kleeberger, Rafael Zalman, Georg Georgakos, Dirk Hammerschmidt, Bernhard Gstoettenbauer, Ludwig Rossmeier, Thomas Zettler
  • Publication number: 20230168295
    Abstract: In some examples, a circuit comprises a function unit configured to perform a circuit function, and one or more in situ monitors configured to measure internal data associated with the circuit. The circuit may further comprise a memory configured to store one or more limit values associated with the one or more in situ monitors, and a lifetime model unit configured to determine whether the circuit has reached an end-of-life threshold based on the measured internal data from the one or more in situ monitors and the limit values.
    Type: Application
    Filed: December 1, 2021
    Publication date: June 1, 2023
    Inventors: Georg Georgakos, Bernhard Gstoettenbauer, Dirk Hammerschmidt, Veit Kleeberger, Ludwig Rossmeier, Rafael Zalman, Thomas Zettler
  • Publication number: 20230169249
    Abstract: In some examples, a method comprises performing a circuit function via a circuit; and estimating a remaining life of the circuit. Moreover, estimating the remaining life of the circuit may include measuring one or more circuit parameters over a period of time during operation of the circuit, and estimating the remaining life of the circuit based on the one or more measured circuit parameters over the period of time during operation of the circuit.
    Type: Application
    Filed: December 1, 2021
    Publication date: June 1, 2023
    Inventors: Thomas Zettler, Rafael Zalman, Georg Georgakos, Dirk Hammerschmidt, Ludwig Rossmeier, Bernhard Gstoettenbauer, Veit Kleeberger
  • Patent number: 11609265
    Abstract: In some examples, a circuit may be configured to perform a method that includes performing a circuit function via a circuit function unit of a circuit, receiving sensor data from one or more sensors associated with the circuit function unit, and estimating a remaining life of the circuit based on an accelerated reliability model and the sensor data, wherein the sensor data comprises input to the accelerated reliability model. The circuit itself may include a dedicated circuit unit that estimates the remaining life of the circuit based on an accelerated reliability model and the sensor data, and the circuit may output one or more predictive alerts or predictive faults when the remaining life is below a threshold, which may prompt the system for predictive maintenance on the circuit.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: March 21, 2023
    Assignee: Infineon Technologies AG
    Inventors: Ludwig Rossmeier, Georg Georgakos, Bernhard Gstoettenbauer, Dirk Hammerschmidt, Veit Kleeberger, Rafael Zalman, Thomas Zettler
  • Patent number: 11438017
    Abstract: An apparatus (100) for providing an joint error correction code (140) for a combined data frame (254) comprising first data (112) of a first data channel and second data (122) of a second data channel comprises a first error code generator (110) configured to provide, based on a linear code, information on a first error correction code (114a, 114b) using the first data (112). The apparatus further comprises a second error code generator (120) configured to provide, based on the linear code, information on a second error correction code (124) using the second data (122). The apparatus is configured to provide the joint error correction code (140) using the information on the first error correction code (114a, 114b) and the information on the second error correction code (124).
    Type: Grant
    Filed: February 19, 2021
    Date of Patent: September 6, 2022
    Assignee: Infineon Technologies AG
    Inventors: Dirk Hammerschmidt, Friedrich Rasbornig, Wolfgang Scheibenzuber, Wolfgang Scherr, Thomas Zettler
  • Publication number: 20220075680
    Abstract: A fault detection system includes a sensor configured to measure a physical quantity and generate a measurement of the physical quantity; a first processor configured to receive the measurement, execute a first firmware based on the measurement, and output a first result of the executed first firmware; a second processor configured to receive the measurement from the sensor, execute a second firmware based on the measurement, and output a second result of the executed second firmware, wherein the first firmware and the second firmware provide a same nominal function in a diverse manner for calculating the first result and the second result, respectively, such that the first result and the second result are expected to be within a predetermined margin; and a fault detection circuit configured to detect a fault when the first result and the second result are not within the predetermined margin.
    Type: Application
    Filed: November 19, 2021
    Publication date: March 10, 2022
    Applicant: Infineon Technologies AG
    Inventors: Thomas Zettler, Dirk Hammerschmidt, Friedrich Rasbornig, Michael Strasser, Akos Hegedus, Wolfgang Granig
  • Publication number: 20210381899
    Abstract: The invention relates to a method and to a device for the in-situ determination of the temperature ? of a sample, in particular to a method and to a device for the surface-corrected determination of the temperature ? of a sample by means of the band-edge method. It is provided that, for the in-situ determination of the temperature ? of a sample (10) when growing a layer stack (12) in a deposition system, a surface-corrected transmission spectrum T?(?) is calculated by determining the quotient of the transmission spectrum T(?) and a correction function K(?), the correction function K(?) being calculated from a determined reflection spectrum R(?). Subsequently, the spectral position of the band-edge ?BE is determined from the transmission spectrum T?(?), and the temperature ? is determined from the spectral position of the band-edge ?BE by means of a known dependency ?(?BE).
    Type: Application
    Filed: June 3, 2021
    Publication date: December 9, 2021
    Inventors: Joerg-Thomas Zettler, Christian Kaspari
  • Patent number: 11188410
    Abstract: Fault detection devices, systems, and methods are provided which implement identical processors. A first processor is configured to receive a first measurement, execute a first firmware based on the first measurement, and output a first result of the executed first firmware. A second processor is configured to receive a second measurement, execute a second firmware based on the second measurement, and output a second result of the executed second firmware. The first firmware and the second firmware provide a same nominal function in a diverse manner for calculating the first result and the second result, respectively, such that the first result and the second result are expected to be within a predetermined margin.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: November 30, 2021
    Inventors: Thomas Zettler, Dirk Hammerschmidt, Friedrich Rasbornig, Michael Strasser, Akos Hegedus, Wolfgang Granig
  • Patent number: 11046350
    Abstract: An installation device is used to install a steering wheel onto a steering column having a plurality of column splines, wherein the steering wheel includes a plate with a central opening and a plurality of wheel splines configured to engage the plurality of column splines. The installation device includes a frame including a base and a cover removably coupled to the base. The installation device also includes a first magnification lens coupled to the frame, and a first pair of posts coupled to the base. The first pair of posts are configured for insertion into a pair of corresponding openings on the steering wheel such that the first pair of posts position the first magnification lens a first predetermined distance from the steering wheel to focus the first magnification lens on the plurality of wheel splines.
    Type: Grant
    Filed: February 12, 2020
    Date of Patent: June 29, 2021
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Michael J. Maure, Benjamin B. MacArthur, Thien Phung, Matthew Gowthorpe, Tyler John Edward Thomas Zettler, Matthew Peter Gleeson
  • Publication number: 20210175906
    Abstract: An apparatus (100) for providing an joint error correction code (140) for a combined data frame (254) comprising first data (112) of a first data channel and second data (122) of a second data channel comprises a first error code generator (110) configured to provide, based on a linear code, information on a first error correction code (114a, 114b) using the first data (112). The apparatus further comprises a second error code generator (120) configured to provide, based on the linear code, information on a second error correction code (124) using the second data (122). The apparatus is configured to provide the joint error correction code (140) using the information on the first error correction code (114a, 114b) and the information on the second error correction code (124).
    Type: Application
    Filed: February 19, 2021
    Publication date: June 10, 2021
    Inventors: Dirk HAMMERSCHMIDT, Friedrich RASBORNIG, Wolfgang SCHEIBENZUBER, Wolfgang SCHERR, Thomas ZETTLER
  • Patent number: 10931314
    Abstract: An apparatus (100) for providing an joint error correction code (140) for a combined data frame (254) comprising first data (112) of a first data channel and second data (122) of a second data channel comprises a first error code generator (110) configured to provide, based on a linear code, information on a first error correction code (114a, 114b) using the first data (112). The apparatus further comprises a second error code generator (120) configured to provide, based on the linear code, information on a second error correction code (124) using the second data (122). The apparatus is configured to provide the joint error correction code (140) using the information on the first error correction code (114a, 114b) and the information on the second error correction code (124).
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: February 23, 2021
    Assignee: Infineon Technologies AG
    Inventors: Dirk Hammerschmidt, Friedrich Rasbornig, Wolfgang Scheibenzuber, Wolfgang Scherr, Thomas Zettler
  • Patent number: 10705132
    Abstract: A method including feeding a test signal into a first end of a conductor track of a semiconductor chip, wherein the conductor track crosses an indentation of a substrate of the semiconductor chip; and detecting the test signal at a second ends of the conductor track, which wherein the detected test signal is indicative of fracture of the substrate of the semiconductor chip at the indentation.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: July 7, 2020
    Assignee: Infineon Technologies AG
    Inventors: Thomas Zettler, Dirk Hammerschmidt, Friedrich Rasbornig, Wolfgang Scheibenzuber, Hans-Joerg Wagner