Abstract: An inverter includes: a PMOS comprising: a p-type source region, a p-type drain region, a p-channel region between the p-type source region and the p-type drain region, and a PMOS metal gate region; a NMOS, comprising: an n-type source region, an n-type drain region, an n-channel region between the n-type source region and the n-type drain region, and a NMOS metal gate region; an insulating layer above the p-channel region and the n-channel region, wherein the PMOS metal gate region and the NMOS metal gate region are above the insulating layer; and a gate contact between the NMOS metal gate region and the PMOS metal gate region.

Abstract: The present disclosure describes a conductive fastener assembly, system, and method, wherein the fastener assembly comprises a nut having a counterbore formed therein. The counterbore is formed to maintain a sufficient gap between the nut and the protruding end of a fastener sleeve. The nut with the counterbore improves the conductive fastener system such that the need for a solid copper grid and a cap seal is reduced or eliminated.

Abstract: The present disclosure describes a conductive fastener assembly, system, and method, wherein the fastener assembly comprises a fastener, a fastener sleeve, a nut, and a lubricant coating. The lubricant coating is deposited on a distal portion of a fastener shank and is omitted from the rest of the fastener. To overcome the stresses placed on the fastener sleeve by the insertion of the fastener shank largely devoid of a lubricant coating, the fastener sleeve is reinforced by one or more of an increased thickness, a high-strength alloy, and a soft metal coating.

Abstract: Compositions and methods related to the removal of acidic gas. In particular, the present disclosure relates to a composition and method for the removal of acidic gas from a gas mixture using a solvent comprising a blend of piperazine and at least one diamine or triamine.

Abstract: A composite abrasive wheel comprises primary and secondary abrasive portions. The primary abrasive portion comprises shaped ceramic abrasive particles retained in a first organic binder. The secondary abrasive portion is bonded to the primary abrasive portion, and comprises secondary crushed abrasive particles retained in a second organic binder. The primary abrasive portion comprises a larger volume percentage of the shaped ceramic abrasive particles than the secondary abrasive portion. A central aperture extends through the composite abrasive wheel.

Abstract: A circuit is powered through a transistor whose thermal instability behavior is to be evaluated in a stress test. The transistor is stressed during a stress phase of the stress test with a sensor circuit powered off and the Vds of the transistor is zero. The sensor circuit is powered on through the transistor during an evaluate phase of the stress test.

Abstract: A circuit for modeling capacitive coupling comprising a victim line to be tested, a first aggressor line, running alongside the victim line, creating a coupling capacitance between the victim line and the first aggressor line, and a sensor circuit coupled to the victim line, to detect effects of the first aggressor line on the victim line, the sensor circuit measuring timing effects in pseudo-real time.

Abstract: A circuit skew compensation trigger system comprises a voltage divider including a P-transistor and an N-transistor and a center node in the voltage divider pulled to a first level. The circuit skew compensation trigger system further comprising a trigger to activate when a skew between the P-transistor and the N-transistor is above a threshold. The trigger to initiate a compensator to adjust for the skew.

Abstract: Static random access memory (SRAM) circuits are used in most digital integrated circuits to store representations of data bits. To handle multiple concurrent memory requests, an efficient dual-port six transistor (6T) SRAM bit cell is proposed. The dual-port 6T SRAM cell uses independent word lines and bit lines such that the true/data side and the false/data-complement side of the SRAM bit cell may be accessed independently. Single-ended reads allow the two independent word lines and bit lines to handle two independent read operations in a single cycle using spatial domain multiplexing. Single-ended writes are enabled by adjusting the VDD power voltage supplied to a memory cell when writes are performed such that a single word line and bit line pair can be used write either a logical “0” or logical “1” into either side of the SRAM bit cell.

Abstract: Static random access memory (SRAM) circuits are used in most digital integrated circuits to store representations of data bits. To handle multiple concurrent memory requests, an efficient dual-port six transistor (6T) SRAM bit cell is proposed. The dual-port 6T SRAM cell uses independent word lines and bit lines such that the true/data side and the false/data-complement side of the SRAM bit cell may be accessed independently. Single-ended reads allow the two independent word lines and bit lines to handle two independent read operations in a single cycle using spatial domain multiplexing. Single-ended writes are enabled by adjusting the VDD power voltage supplied to a memory cell when writes are performed such that a single word line and bit line pair can be used write either a logical “0” or logical “1” into either side of the SRAM bit cell. Thus, spatial domain multiplexing with a voltage assist allows single-ended writes to handle two independent write operations to be handled in a single cycle.

Abstract: Multi-port memory circuits are often required within modern digital integrated circuits to store data. Multi-port memory circuits allow multiple memory users to access the same memory cell simultaneously. Multi-port memory circuits are generally custom-designed in order to obtain the best performance or synthesized with logic synthesis tools for quick design. However, these two options for creating multi-port memory give integrated circuit designers a stark choice: invest a large amount of time and money to custom design an efficient multi-port memory system or allow logic synthesis tools to inefficiently create multi-port memory. An intermediate solution is disclosed that allows an efficient multi-port memory array to be created largely using standard circuit cell components and register transfer level hardware design language code.

Abstract: Apparatuses, systems and methods for separating heavy hydrocarbons from a solvent stream are disclosed. The heavy hydrocarbons and solvent can be recovered and processed further.

Abstract: A conductive sleeved fastener assembly includes an electrically-conductive fastener having a fastener head and a fastener shank extending from the fastener head and an electrically-conductive fastener sleeve receiving the fastener shank of the fastener and a fastener sleeve flange provided on the fastener sleeve and disposed in direct contact with the fastener head of the fastener. A method of preparing a conductive sleeved fastener for use is also disclosed.

Abstract: Multi-port memory circuits are often required within modern digital integrated circuits to store data. Multi-port memory circuits allow multiple memory users to access the same memory cell simultaneously. Multi-port memory circuits are generally custom-designed in order to obtain the best performance or synthesized with logic synthesis tools for quick design. However, these two options for creating multi-port memory give integrated circuit designers a stark choice: invest a large amount of time and money to custom design an efficient multi-port memory system or allow logic synthesis tools to inefficiently create multi-port memory. An intermediate solution is disclosed that allows an efficient multi-port memory array to be created largely using standard circuit cell components and register transfer level hardware design language code.

Abstract: A conductive sleeved fastener assembly includes an electrically-conductive fastener having a fastener head and a fastener shank extending from the fastener head and an electrically-conductive fastener sleeve receiving the fastener shank of the fastener and a fastener sleeve flange provided on the fastener sleeve and disposed in direct contact with the fastener head of the fastener. A method of preparing a conductive sleeved fastener for use is also disclosed.

Abstract: Compositions and methods related to the removal of acidic gas. In particular, the present disclosure relates to a composition and method for the removal of acidic gas from a gas mixture using a solvent comprising a blend of piperazine and at least one diamine or triamine.

Abstract: An inverter includes: a PMOS comprising: a p-type source region, a p-type drain region, a p-channel region between the p-type source region and the p-type drain region, and a PMOS metal gate region; a NMOS, comprising: an n-type source region, an n-type drain region, an n-channel region between the n-type source region and the n-type drain region, and a NMOS metal gate region; an insulating layer above the p-channel region and the n-channel region, wherein the PMOS metal gate region and the NMOS metal gate region are above the insulating layer; and a gate contact between the NMOS metal gate region and the PMOS metal gate region.

Abstract: Static random access memory (SRAM) circuits are used in most digital integrated circuits to store representations of data bits. To handle multiple concurrent memory requests, an efficient dual-port six transistor (6T) SRAM bit cell is proposed. The dual-port 6T SRAM cell uses independent word lines and bit lines such that the true/data side and the false/data-complement side of the SRAM bit cell may be accessed independently. Single-ended reads allow the two independent word lines and bit lines to handle two independent read operations in a single cycle using spatial domain multiplexing. Single-ended writes are enabled by adjusting the VDD power voltage supplied to a memory cell when writes are performed such that a single word line and bit line pair can be used write either a logical “0” or logical “1” into either side of the SRAM bit cell. Thus, spatial domain multiplexing with a voltage assist allows single-ended writes to handle two independent write operations to be handled in a single cycle.

Abstract: The invention relates to a method for functionalizing a thermoset, crosslinked isocyanate-based polymeric solid material which is made of isocyanate and isocyanate reactive components, at least one of which comprises an anchor component which has at least one anchor group. The anchor groups on the solid material are formed by terminal alkene and/or alkyne groups. To functionalize this polymeric solid material it is brought in contact with a solution which contains at least one functional component. This functional component comprises at least one thiol group and is allowed to bind covalently to the polymeric solid material by a free-radical addition reaction between the thiol groups on the functional component and the terminal alkene and/or alkyne anchor groups on the undissolved solid material. An effective functionalization of the polymeric material can thus be achieved notwithstanding the heterogeneous reaction conditions.

Abstract: Static random access memory (SRAM) circuits are used in most digital integrated circuits to store data. To handle multiple memory users, an efficient dual port six transistor (6T) SRAM memory cell is proposed. The dual port 6T SRAM cell uses independent word lines and bit lines such that the true side and the false side of the SRAM cell may be accessed independently. Single-ended reads allow the two independent word lines and bit lines to handle two reads in a single cycle using spatial domain multiplexing. Writes can be handled faster that read operations such that two writes can be handled in a single cycle using time division multiplexing. To further improve the operation of the dual port 6T SRAM cell a number of algorithmic techniques are used to improve the operation of the memory system.