Patents by Inventor Till Schloesser

Till Schloesser has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10700061
    Abstract: A semiconductor device includes a first transistor and a second transistor in a semiconductor substrate. The first transistor includes a first drain contact electrically connected to a first drain region, the first drain contact including a first drain contact portion and a second drain contact portion. The first drain contact portion includes a drain conductive material in direct contact with the first drain region. The second transistor includes a second source contact electrically connected to a second source region. The second source contact includes a first source contact portion and a second source contact portion. The first source contact portion includes a source conductive material in direct contact with the second source region.
    Type: Grant
    Filed: November 15, 2016
    Date of Patent: June 30, 2020
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Dirk Ahlers, Till Schloesser
  • Publication number: 20200127121
    Abstract: A method of manufacturing a semiconductor device includes: forming a trench in a first side of a semiconductor layer, the semiconductor layer including a drift zone of a first conductivity; forming a drain region of the first conductivity type in the first side of the semiconductor layer and laterally adjoining the drift zone; forming a body region of a second conductivity type opposite the first conductivity type and laterally adjoining the drift zone at a side of the drift zone opposite the drain region; and forming source regions of the first conductivity type and body contact regions of the second conductivity type in a sidewall of the trench and arranged in an alternating manner along a length of the trench, using a dopant diffusion process which includes diffusing dopants of both conductivity types from oppositely-doped dopant source layers which are in contact with different regions of the sidewall.
    Type: Application
    Filed: October 18, 2019
    Publication date: April 23, 2020
    Inventors: Andreas Meiser, Till Schloesser
  • Patent number: 10629690
    Abstract: A semiconductor device includes a transistor in a semiconductor substrate. The transistor includes a drift zone of a first conductivity type adjacent to a drain region, and a first field plate and a second field plate adjacent to the drift zone. The second field plate is arranged between the first field plate and the drain region. The second field plate is electrically connected to a contact portion arranged in the drift zone. The transistor further includes an intermediate portion of the first conductivity type at a lower doping concentration than the drift zone. A distance between the intermediate portion and the drain region is smaller than the distance between the contact portion and the drain region.
    Type: Grant
    Filed: June 6, 2017
    Date of Patent: April 21, 2020
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Franz Hirler, Till Schloesser
  • Patent number: 10582580
    Abstract: A switch comprises a field effect transistor in a semiconductor substrate having a first main surface. The field effect transistor comprises a source region, a drain region, a body region, and a gate electrode at the body region, the gate electrode being configured to control a conductivity of a channel formed in the body region. The gate electrode is disposed in gate trenches. The body region is disposed along a first direction between the source region and the drain region, the first direction being parallel to the first main surface. The body region has a shape of a ridge extending along the first direction. The body region is adjacent to the source region and the drain region. The switch further comprises a source contact and a body contact portion, the source contact being electrically connected to a source terminal. The body contact portion is in contact with the source contact and is electrically connected to the body region.
    Type: Grant
    Filed: April 27, 2016
    Date of Patent: March 3, 2020
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Till Schloesser
  • Publication number: 20200027969
    Abstract: A method for producing a semiconductor component includes: providing a semiconductor body having a first dopant of a first conductivity type; forming a first trench in the semiconductor body starting from a first side; filling the first trench with a semiconductor filler material; forming a superjunction structure by introducing a second dopant of a second conductivity type into the semiconductor body, the semiconductor filler material being doped with the second dopant; forming a second trench in the semiconductor body starting from the first side; and forming a trench structure in the second trench.
    Type: Application
    Filed: July 17, 2019
    Publication date: January 23, 2020
    Inventors: Till Schloesser, Christian Kampen, Andreas Meiser
  • Publication number: 20190371882
    Abstract: The disclosure relates to a semiconductor device, including a semiconductor substrate of a first conductivity type and a semiconductor layer of a second conductivity type on the semiconductor substrate, the second conductivity type being different than the first conductivity type. The semiconductor device also includes an isolation structure electrically isolating a first region of the semiconductor layer from a second region of the semiconductor layer. A shallow trench isolation structure vertically extends from a surface of the semiconductor layer into the first region of the semiconductor layer. An electrical resistor is formed on the shallow trench isolation structure.
    Type: Application
    Filed: May 28, 2019
    Publication date: December 5, 2019
    Inventors: Andreas Meiser, Grzegorz Kozlowski, Till Schloesser
  • Publication number: 20190348525
    Abstract: The disclosure relates to a method for producing a semiconductor device. The method includes providing a semiconductor body having first dopants of a first conductivity type and second dopants of a second conductivity type. The method also includes forming a first trench in the semiconductor body via a first mask, and filling the first trench with a semiconductor filling material. The method further includes forming a superjunction structure by introducing a portion of the first dopants from a region of the semiconductor body into the semiconductor filling material, forming a second trench in the semiconductor body via a second mask, which is formed in a manner self-aligned with respect to the first mask, and forming a trench structure in the second trench.
    Type: Application
    Filed: May 10, 2019
    Publication date: November 14, 2019
    Inventors: Andreas Meiser, Till Schloesser
  • Patent number: 10468405
    Abstract: An electric circuit includes a semiconductor device. The semiconductor device includes a first transistor and a second transistor in a common semiconductor substrate. The first transistor is of the same conductivity type as the second transistor. A first source region of the first transistor is electrically connected to a first source terminal via a first main surface of the semiconductor substrate. A second drain region of the second transistor is electrically connected to a second drain terminal via a first main surface of the semiconductor substrate. A first drain region of the first transistor and a second source region of the second transistor are electrically connected to an output terminal via a second main surface of the semiconductor substrate. The electric circuit further includes a control circuit operable to control a first gate electrode of the first transistor and a second gate electrode of the second transistor.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: November 5, 2019
    Assignee: Infineon Technologies AG
    Inventors: Rainald Sander, Till Schloesser
  • Publication number: 20190287804
    Abstract: A method includes: forming first and second trenches in a semiconductor body; forming a first material layer on the semiconductor body in the first and second trenches such that a first residual trench remains in the first trench and a second residual trench remains in the second trench; removing the first material from the second trench; and forming a second material layer on the first material layer in the first residual trench and on the semiconductor body in the second trench. The first material layer includes dopants of a first doping type and the second material layer includes dopants of a second doping type. The method further includes diffusing dopants from the first material layer in the first trench into the semiconductor body to form a first doped region, and from the second material layer in the second trench into the semiconductor body to form a second doped region.
    Type: Application
    Filed: March 12, 2019
    Publication date: September 19, 2019
    Inventors: Rolf Weis, Thomas Gross, Hermann Gruber, Franz Hirler, Andreas Meiser, Markus Rochel, Till Schloesser, Detlef Weber
  • Patent number: 10381477
    Abstract: A semiconductor device in a semiconductor substrate having a first main surface includes a transistor array and a termination region. The transistor array includes a source region, a drain region, a body region, a drift zone, and a gate electrode at the body region. The gate electrode is configured to control a conductivity of a channel in the body region. The body region and the drift zone are disposed along a first horizontal direction between the source region and the drain region. The transistor array further includes first field plate trenches in the drift zone. A longitudinal axis of the first field plate trenches extends in the first horizontal direction. The semiconductor device further includes a second field plate trench, a longitudinal axis of the second field plate trench extending in a second horizontal direction perpendicular to the first direction.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: August 13, 2019
    Assignee: Infineon Technologies AG
    Inventors: Andreas Peter Meiser, Till Schloesser
  • Patent number: 10381475
    Abstract: A semiconductor device and a method of manufacturing the same is provided. The semiconductor device including a transistor cell in a semiconductor substrate having a first main surface. The transistor cell includes a gate electrode in a gate trench in the first main surface adjacent to a body region. A longitudinal axis of the gate trench extends in a first direction parallel to the first main surface. A source region, a body region and a drain region are disposed along the first direction. A source contact comprises a first source contact portion and a second source contact portion. The second source contact portion is disposed at a second main surface of the semiconductor substrate. The first source contact portion includes a source conductive material in direct contact with the source region and a portion of the semiconductor substrate arranged between the source conductive material and the second source contact portion.
    Type: Grant
    Filed: October 17, 2017
    Date of Patent: August 13, 2019
    Assignee: Infineon Technologies Dresden GmbH
    Inventors: Andreas Meiser, Karl-Heinz Gebhardt, Till Schloesser, Detlef Weber
  • Patent number: 10355087
    Abstract: A semiconductor device includes a transistor in a semiconductor substrate having a main surface. The transistor includes a source region, a drain region, a channel region, a drift zone, a gate electrode, and a gate dielectric adjacent to the gate electrode. The gate electrode is disposed adjacent to at least two sides of the channel region. The channel region and the drift zone are disposed along a first direction parallel to the main surface between the source region and the drain region. The gate dielectric has a thickness that varies at different positions of the gate electrode.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: July 16, 2019
    Assignee: Infineon Technologies AG
    Inventors: Martin Vielemeyer, Andreas Meiser, Till Schloesser, Franz Hirler, Martin Poelzl
  • Patent number: 10246325
    Abstract: A method for producing a MEMS device comprises forming a semiconductor layer stack, the semiconductor layer stack comprising at least a first monocrystalline semiconductor layer, a second monocrystalline semiconductor layer and a third monocrystalline semiconductor layer, the second monocrystalline semiconductor layer formed between the first and third monocrystalline semiconductor layers. A semiconductor material of the second monocrystalline semiconductor layer is different from semiconductor materials of the first and third monocrystalline semiconductor layers. After forming the semiconductor layer stack, at least a portion of each of the first and third monocrystalline semiconductor layers is concurrently etched.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: April 2, 2019
    Assignee: Infineon Technologies AG
    Inventors: Stefan Kolb, Andreas Meiser, Till Schloesser, Wolfgang Werner
  • Patent number: 10205016
    Abstract: A method of forming an integrated circuit includes forming gate trenches in the first main surface of a semiconductor substrate, the gate trenches being formed so that a longitudinal axis of the gate trenches runs in a first direction parallel to the first main surface. The method further includes forming a source contact groove running in a second direction parallel to the first main surface, the second direction being perpendicular to the first direction, the source contact groove extending along the plurality of gate trenches, forming a source region including performing a doping process to introduce dopants through a sidewall of the source contact groove, and filling a sacrificial material in the source contact groove. The method also includes, thereafter, forming components of the logic circuit element, thereafter, removing the sacrificial material from the source contact groove, and filling a source conductive material in the source contact groove.
    Type: Grant
    Filed: April 11, 2017
    Date of Patent: February 12, 2019
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Till Schloesser, Detlef Weber, Karl-Heinz Gebhardt
  • Patent number: 10170615
    Abstract: A semiconductor device includes a source region and a drain region of a first conductivity type. The source region and the drain region are arranged in a first direction parallel to a first main surface of a semiconductor substrate. The semiconductor device further includes a layer stack having a drift layer of the first conductivity type and a compensation layer of a second conductivity type. The drain region is electrically connected with the drift layer. The semiconductor device also includes a connection region of the second conductivity type extending into the semiconductor substrate, the connection region being electrically connected with the compensation layer, wherein the buried semiconductor portion does not fully overlap with the drift layer.
    Type: Grant
    Filed: January 26, 2017
    Date of Patent: January 1, 2019
    Assignee: Infineon Technologies Austria AG
    Inventors: Franz Hirler, Anton Mauder, Andreas Meiser, Till Schloesser
  • Patent number: 10109734
    Abstract: A semiconductor device comprises a transistor in a semiconductor body having a first main surface. The transistor comprises a source region of a first conductivity type, a drain region, a body region of a second conductivity type, different from the first conductivity type, and a gate electrode disposed in gate trenches extending in a first direction parallel to the first main surface. The source region, the body region and the drain region are arranged along the first direction. The body region comprises first ridges extending along the first direction, the first ridges being disposed between adjacent gate trenches in the semiconductor body. The body region further comprises a second ridge. A width of the second ridge is larger than a width of the first ridges, the widths being measured in a second direction perpendicular to the first direction.
    Type: Grant
    Filed: April 11, 2016
    Date of Patent: October 23, 2018
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Till Schloesser
  • Patent number: 10002959
    Abstract: A semiconductor device includes a transistor in a semiconductor substrate having a first main surface. The transistor includes a source region, a source contact, the source contact including a first and second source contact portion, and a gate electrode in a gate trench in the first main surface adjacent to a body region. The body region and a drift zone are disposed along a first direction parallel to the first main surface between the source region and a drain region. The second source contact portion is disposed at a second main surface of the semiconductor substrate. The first source contact portion includes a source conductive material in direct contact with the source region, the first source contact portion further including a portion of the semiconductor substrate between the source conductive material and the second source contact portion. The semiconductor device further includes a temperature sensor in the semiconductor substrate.
    Type: Grant
    Filed: February 10, 2017
    Date of Patent: June 19, 2018
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Till Schloesser
  • Patent number: 9941403
    Abstract: A semiconductor device includes a transistor including a source region, a drain region, and a gate electrode. The gate electrode is disposed in a first trench arranged in a top surface of the semiconductor substrate. The device further includes a control electrode. The control electrode is disposed in a second trench arranged in the top surface of the semiconductor substrate. The second trench has a second shape that is different from a first shape of the first trench.
    Type: Grant
    Filed: September 26, 2012
    Date of Patent: April 10, 2018
    Assignee: Infineon Technologies AG
    Inventors: Till Schloesser, Markus Zundel
  • Patent number: 9917163
    Abstract: A semiconductor device comprises a field effect transistor in a semiconductor substrate having a first main surface. The field effect transistor comprises a source region, a drain region, a body region, and a gate electrode at the body region. The gate electrode is configured to control a conductivity of a channel formed in the body region, and the gate electrode is disposed in gate trenches. The body region is disposed along a first direction between the source region and the drain region, the first direction being parallel to the first main surface. The body region has a shape of a ridge extending along the first direction, the body region being adjacent to the source region and the drain region. The semiconductor device further comprises a source contact and a body contact, the source contact being electrically connected to a source terminal, the body contact being electrically connected to the source contact and to the body region.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: March 13, 2018
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Till Schloesser
  • Patent number: 9893178
    Abstract: A semiconductor device includes a transistor formed in a semiconductor substrate having a main surface. The transistor includes a source region of a first conductivity type, a drain region of the first conductivity type, a channel region of a second conductivity type, a gate trench adjacent to a first sidewall of the channel region, a gate conductive material disposed in the gate trench, the gate conductive material being connected to a gate terminal, and a channel separation trench adjacent to a second sidewall of the channel region. The second sidewall faces the first sidewall via the channel region. The channel separation trench is filled with an insulating separation trench filling consisting of an insulating material in direct contact with the channel region. The source region and the drain region are disposed along a first direction. The first direction is parallel to the main surface.
    Type: Grant
    Filed: June 21, 2016
    Date of Patent: February 13, 2018
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Till Schloesser, Franz Hirler