Patents by Inventor Till Schloesser

Till Schloesser has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160308044
    Abstract: A semiconductor device comprises a transistor in a semiconductor body having a first main surface. The transistor comprises a source region of a first conductivity type, a drain region, a body region of a second conductivity type, different from the first conductivity type, and a gate electrode disposed in gate trenches extending in a first direction parallel to the first main surface. The source region, the body region and the drain region are arranged along the first direction. The body region comprises first ridges extending along the first direction, the first ridges being disposed between adjacent gate trenches in the semiconductor body. The body region further comprises a second ridge. A width of the second ridge is larger than a width of the first ridges, the widths being measured in a second direction perpendicular to the first direction.
    Type: Application
    Filed: April 11, 2016
    Publication date: October 20, 2016
    Inventors: Andreas Meiser, Till Schloesser
  • Publication number: 20160307891
    Abstract: A semiconductor device comprises a transistor in a semiconductor body having a main surface. The transistor comprises a source region, a drain region, a body region, a drift zone, and a gate electrode at the body region. The body region and the drift zone are disposed along a first direction between the source region and the drain region, the first direction being parallel to the main surface. The gate electrode is disposed in a trench extending in the first direction. The semiconductor device further comprises a source contact electrically connected to the source region and to a source terminal. The source contact is disposed in a source contact opening in the main surface. The semiconductor device further comprises a body contact portion electrically connected to the source terminal and to the body region. The body contact portion vertically overlaps with the source region.
    Type: Application
    Filed: April 12, 2016
    Publication date: October 20, 2016
    Inventors: Andreas Meiser, Till Schloesser
  • Publication number: 20160300944
    Abstract: A semiconductor device includes a transistor formed in a semiconductor substrate having a main surface. The transistor includes a source region of a first conductivity type, a drain region of the first conductivity type, a channel region of a second conductivity type, a gate trench adjacent to a first sidewall of the channel region, a gate conductive material disposed in the gate trench, the gate conductive material being connected to a gate terminal, and a channel separation trench adjacent to a second sidewall of the channel region. The second sidewall faces the first sidewall via the channel region. The channel separation trench is filled with an insulating separation trench filling consisting of an insulating material in direct contact with the channel region. The source region and the drain region are disposed along a first direction. The first direction is parallel to the main surface.
    Type: Application
    Filed: June 21, 2016
    Publication date: October 13, 2016
    Inventors: Andreas Meiser, Till Schloesser, Franz Hirler
  • Patent number: 9450085
    Abstract: A semiconductor device includes a semiconductor substrate having first regions of a first conductivity type and body regions of the first conductivity type, which are arranged in a manner adjoining the first region and overlap the latter in each case on a side of the first region which faces a first surface of the semiconductor substrate, and having a multiplicity of drift zone regions arranged between the first regions and composed of a semiconductor material of a second conductivity type, which is different than the first conductivity type. The first regions and the drift zone regions are arranged alternately and form a superjunction structure. The semiconductor device further includes a gate electrode formed in a trench in the semiconductor substrate.
    Type: Grant
    Filed: November 20, 2014
    Date of Patent: September 20, 2016
    Assignee: Infineon Technologies AG
    Inventors: Till Schloesser, Andreas Meiser
  • Publication number: 20160268423
    Abstract: A semiconductor device includes a transistor in a semiconductor substrate having a first main surface. The transistor includes a source region, a drain region, a channel region, a drift zone, and a gate electrode adjacent to at least two sides of the channel region. The gate electrode is disposed in trenches extending in a first direction parallel to the first main surface. The gate electrode is electrically coupled to a gate terminal. The channel region and the drift zone are disposed along the first direction between the source region and the drain region. The semiconductor device further includes a conductive layer beneath the gate electrode and insulated from the gate electrode. The conductive layer is electrically connected to the gate terminal.
    Type: Application
    Filed: March 12, 2015
    Publication date: September 15, 2016
    Inventors: Karoline Koepp, Andreas Meiser, Till Schloesser
  • Publication number: 20160268397
    Abstract: A method of manufacturing a semiconductor device includes forming a transistor in a semiconductor substrate having a first main surface. The transistor is formed by forming a source region, forming a drain region, forming a channel region, forming a drift zone, and forming a gate electrode adjacent to at least two sides of the channel region. The channel region and the drift zone are disposed along a first direction parallel to the first main surface, between the source region and the drain region. Forming the semiconductor device further includes forming a conductive layer, a portion of the conductive layer being disposed beneath the gate electrode and insulated from the gate electrode.
    Type: Application
    Filed: May 20, 2016
    Publication date: September 15, 2016
    Inventors: Andreas Meiser, Till Schloesser, Thorsten Meyer
  • Publication number: 20160240661
    Abstract: A semiconductor device formed in a semiconductor substrate having a first main surface comprises a transistor array and a termination region. The transistor array comprises a source region, a drain region, a body region, a drift zone, and a gate electrode at the body region. The gate electrode is configured to control a conductivity of a channel formed in the body region. The gate electrode is disposed in first trenches. The body region and the drift zone are disposed along a first direction between the source region and the drain region, the first direction being parallel to the first main surface. The body region has a shape of a first ridge extending along the first direction. The termination region comprises a termination trench, a portion of the termination trench extending in the first direction, a length of the termination trench being larger than a length of the first trenches, the length being measured along the first direction.
    Type: Application
    Filed: February 10, 2016
    Publication date: August 18, 2016
    Inventors: Andreas Meiser, Franz Hirler, Till Schloesser
  • Patent number: 9401399
    Abstract: A semiconductor device includes a transistor formed in a semiconductor substrate including a main surface. The transistor includes a source region, a drain region, a channel region, and a gate electrode. The source region and the drain region are disposed along a first direction, the first direction being parallel to the main surface. The channel region has a shape of a ridge extending along the first direction, the ridge including a top side and a first and a second sidewalls. The gate electrode is disposed at the first sidewall of the channel region, and the gate electrode is absent from the second sidewall of the channel region.
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: July 26, 2016
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Till Schloesser, Franz Hirler
  • Patent number: 9397092
    Abstract: A semiconductor device in a semiconductor substrate includes a trench in a first main surface of the semiconductor substrate. The trench includes a first trench portion extending in a first direction and a second trench portion extending in the first direction. The first trench portion is connected with the second trench portion in a lateral direction. The first trench portion and the second trench portion are arranged one after the other along the first direction. The semiconductor device further includes a trench conductive structure having a conductive material disposed in the first trench portion, and a trench capacitor structure having a capacitor dielectric and a first capacitor electrode disposed in the second trench portion. The first capacitor electrode includes a layer lining a sidewall of the second trench portion.
    Type: Grant
    Filed: July 30, 2015
    Date of Patent: July 19, 2016
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Markus Zundel, Till Schloesser
  • Publication number: 20160204219
    Abstract: A semiconductor device comprises a first and second circuit element. The first circuit element comprises a first electrode structure including a first high-k dielectric layer, the first high-k dielectric layer having a first thickness and comprising hafnium. The second circuit element comprises a second electrode structure that includes a second high-k dielectric layer having a ferroelectric behavior, wherein the second high-k dielectric layer has a second thickness and comprises hafnium, and wherein the second thickness is greater than the first thickness.
    Type: Application
    Filed: March 22, 2016
    Publication date: July 14, 2016
    Inventors: Till Schloesser, Peter Baars
  • Publication number: 20160190256
    Abstract: A semiconductor device includes a transistor in a semiconductor substrate having a main surface. The transistor includes a source region, a drain region, a channel region, a drift zone, a gate electrode, and a gate dielectric adjacent to the gate electrode. The gate electrode is disposed adjacent to at least two sides of the channel region. The channel region and the drift zone are disposed along a first direction parallel to the main surface between the source region and the drain region. The gate dielectric has a thickness that varies at different positions of the gate electrode.
    Type: Application
    Filed: March 7, 2016
    Publication date: June 30, 2016
    Inventors: Martin Vielemeyer, Andreas Meiser, Till Schloesser, Franz Hirler, Martin Poelzl
  • Publication number: 20160190241
    Abstract: An embodiment of a semiconductor device comprises a first load terminal contact area at a first side of a semiconductor body. A second load terminal contact area is at a second side of the semiconductor body opposite to the first side. A control terminal contact area is at the second side of the semiconductor body. An isolation structure extends through the semiconductor body between the first and second sides. The isolation structure electrically isolates a first part of the semiconductor body from a second part of the semiconductor body. A first thickness of the first part of the semiconductor body is smaller than a second thickness of the second part of the semiconductor body.
    Type: Application
    Filed: December 21, 2015
    Publication date: June 30, 2016
    Inventors: Christoph Kadow, Till Schloesser
  • Publication number: 20160181402
    Abstract: A method of manufacturing a semiconductor device includes providing dielectric stripe structures extending from a first surface into a semiconductor substrate between semiconductor fins. A first mask is provided that covers a first area including first stripe sections of the dielectric stripe structures and first fin sections of the semiconductor fins. The first mask exposes a second area including second stripe and second fin sections. A channel/body zone is formed in the second fin sections by introducing impurities, wherein the first mask is used as an implant mask. Using an etch mask that is based on the first mask, recess grooves are formed at least in the second stripe sections.
    Type: Application
    Filed: March 1, 2016
    Publication date: June 23, 2016
    Inventors: Martin Poelzl, Till Schloesser, Andreas Meiser
  • Patent number: 9349842
    Abstract: Ferroelectric circuit elements, such as field effect transistors or capacitors, may be formed on the basis of hafnium oxide, which may also be used during the fabrication of sophisticated high-k metal gate electrode structures of fast transistors. To this end, the hafnium-based oxide having appropriate thickness and material composition may be patterned at any appropriate manufacturing stage, without unduly affecting the overall process flow for fabricating a sophisticated high-k metal gate electrode structure.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: May 24, 2016
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Till Schloesser, Peter Baars
  • Patent number: 9349834
    Abstract: A method of manufacturing a semiconductor device includes forming a transistor in a semiconductor substrate having a first main surface. The transistor is formed by forming a source region, forming a drain region, forming a channel region, forming a drift zone, and forming a gate electrode adjacent to at least two sides of the channel region. The channel region and the drift zone are disposed along a first direction parallel to the first main surface, between the source region and the drain region. Forming the semiconductor device further includes forming a conductive layer, a portion of the conductive layer being disposed beneath the gate electrode and insulated from the gate electrode.
    Type: Grant
    Filed: July 9, 2015
    Date of Patent: May 24, 2016
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Till Schloesser, Thorsten Meyer
  • Patent number: 9324829
    Abstract: A method includes forming a trench extending from a first surface of a semiconductor body into the semiconductor body such that a first trench section and at least one second trench section adjoin the first trench section, wherein the first trench section is wider than the second trench section. A first electrode is formed, in the at least one second trench section, and dielectrically insulated from semiconductor regions of the semiconductor body by a first dielectric layer. An inter-electrode dielectric layer is formed, in the at least one second trench section, on the first electrode. A second electrode is formed, in the at least one second trench section on the inter-electrode dielectric layer, and in the first trench section, such that the second electrode at least in the first trench section is dielectrically insulated from the semiconductor body by a second dielectric layer.
    Type: Grant
    Filed: March 25, 2013
    Date of Patent: April 26, 2016
    Assignee: Infineon Technologies AG
    Inventors: Andreas Meiser, Till Schloesser, Markus Zundel
  • Patent number: 9324854
    Abstract: A semiconductor device includes a high-k metal gate electrode structure that is positioned above an active region, has a top surface that is positioned at a gate height level, and includes a high-k dielectric material and an electrode metal. Raised drain and source regions are positioned laterally adjacent to the high-k metal gate electrode structure and connect to the active region, and a top surface of each of the raised drain and source regions is positioned at a contact height level that is below the gate height level. An etch stop layer is positioned above the top surface of the raised drain and source regions and a contact element connects to one of the raised drain and source regions, the contact element extending through the etch stop layer and a dielectric material positioned above the high-k metal gate electrode structure and the raised drain and source regions.
    Type: Grant
    Filed: March 26, 2014
    Date of Patent: April 26, 2016
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Till Schloesser, Peter Baars, Frank Jakubowski
  • Patent number: 9306058
    Abstract: An integrated circuit includes a transistor in a semiconductor substrate having a main surface. The transistor includes a source region, a drain region, a channel region, a drift zone, a gate electrode, and a gate dielectric adjacent to the gate electrode. The gate electrode is disposed adjacent to at least two sides of the channel region. The channel region and the drift zone are disposed along a first direction parallel to the main surface between the source region and the drain region. The gate dielectric has a thickness that varies at different positions of the gate electrode.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: April 5, 2016
    Assignee: Infineon Technologies AG
    Inventors: Martin Vielemeyer, Andreas Meiser, Till Schloesser, Franz Hirler, Martin Poelzl
  • Publication number: 20160093731
    Abstract: A method of manufacturing a semiconductor device including a transistor comprises forming field plate trenches in a main surface of a semiconductor substrate, a drift zone being defined between adjacent field plate trenches, forming a field dielectric layer in the field plate trenches, thereafter, forming gate trenches in the main surface of the semiconductor substrate, a channel region being defined between adjacent gate trenches, and forming a conductive material in at least some of the field plate trenches and in at least some of the gate trenches. The method further comprising forming a source region and forming a drain region in the main surface of the semiconductor substrate.
    Type: Application
    Filed: September 29, 2015
    Publication date: March 31, 2016
    Inventors: Andreas Meiser, Till Schloesser
  • Publication number: 20160093529
    Abstract: A semiconductor device is manufactured at least partially in a semiconductor substrate. The substrate has first and second opposing main surfaces. The method includes forming a cell field portion and a contact area, the contact area being electrically coupled to the cell field portion, and forming the cell field portion by at least forming a transistor. The method further includes insulating a part of the semiconductor substrate from other substrate portions to form a connection substrate portion, forming an electrode adjacent to the second main surface so as to be in contact with the connection substrate portion, forming an insulating layer over the first main surface, forming a metal layer over the insulating layer, forming a trench in the first main surface, and filling the trench with a conductive material, and electrically coupling the connection substrate portion to the metal layer via the trench.
    Type: Application
    Filed: December 8, 2015
    Publication date: March 31, 2016
    Inventors: Andreas Meiser, Till Schloesser, Martin Poelzl