Abstract: An inventive programmable circuit stores a bit (i.e., a "1"or a "0") as the result of one of a pair of anti-fuses of the circuit connected in series between a supply voltage V.sub.cc and ground V.sub.ss being blown. If the anti-fuse connected to the supply voltage V.sub.cc is blown, the supply voltage V.sub.cc passes through the anti-fuse to a node between the series-connected anti-fuses. If, instead, the anti-fuse connected to ground V.sub.ss is blown, the node between the anti-fuses is connected to ground through the blown anti-fuse. The voltage on the node (i.e., V.sub.cc or V.sub.ss) may then be output from the programmable circuit as being representative of the bit stored in the circuit. Because only one of the anti-fuses is blown, no direct path exists between the supply voltage V.sub.cc and ground V.sub.ss, so the programmable circuit does not waste current as prior circuits are known to do.

Abstract: Disclosed is a method and apparatus for connecting the wordlines of memory arrays to respective row decoders in a manner which reduces the physical space required for implementing a memory device. The wordlines of a first memory array are connected directly to an adjacent row decoder. Metal straps, which connect across every other wordline of the first memory array, are used to connect the row decoder to the wordlines of another memory array not adjacent to the row decoder. By utilizing the same row decoders for multiple arrays via the metal straps, the number of row decoders required for a memory bank can be reduced, thereby reducing the overall physical space necessary for implementation of the memory device. The use of metal for the straps provides minimal effect on the access timing of the wordlines connected to the row decoders via the metal straps, and the strapping of only every other wordline of each array provides sufficient space between the straps to prevent them from shorting together.

Abstract: The present invention is embodied in a method and apparatus which permits the testing of a memory device by utilizing normally unused data write lines to conduct the results of the memory test operations to a memory controller or processor. The data read from a specific memory cell is input into a comparator through a data sense amplifier and compared to the data from another memory cell. When the data is not coincident, a switch is enabled causing a data write line to change states. The change of state of the data write line disables a buffer, causing it to output a tri-state signal. A controller detects and interprets the tri-state signal output from the buffer as improper memory functioning.

Abstract: A memory device includes an array of memory cells that are arranged in row and columns. A row latch receives a row address and a latch signal and stores the row address in response to a transition of the latch signal. A row decoder is coupled between the latch and the array. In response to a transition of a row address strobe, which occurs a first predetermined time after the transition of the latch signal, the row decoder fires a row of the memory cells that are identified by the row address.

Abstract: An integrated circuit memory device is described which can operate at high data speeds. The memory device can either store or retrieve data from the memory in a burst access operation. The burst operations latch a memory address from external address lines and internally generates additional memory addresses. The integrated circuit memory can output data in a continuous stream while new rows of the memory are accessed. A method and circuit are described for outputting a burst of data stored in a first row of the memory while accessing a second row of the memory.

Abstract: In a microcircuit device such as a memory chip, where a bank of fuse-controlled latch pulse routing-circuits are used to program redundant circuits or other programming options with every memory cycle or multiple thereof, the amount of current drawn by every fuse-control circuit is reduced by controlling each bank of circuits with a bank-enabling, fuse-programmed circuit between the latch pulse source and the bank of fuse-controlled programing circuits, and by adding a second fuse into each programming circuit; whereby, the bank of programming circuits can be enabled by alternately blowing one of two fuses in the bank-enabling circuit, and each programing logic can be set by alternately blowing one of its pair of fuses, thus cutting off any current path through the programming circuit regardless of the programming state of the circuit.

Abstract: In a microcircuit device such as a memory chip, where a bank of fuse-controlled latch pulse routing-circuits are used to program redundant circuits or other programming options with every memory cycle or multiple thereof, the amount of current drawn by every fuse-control circuit is reduced by controlling each bank of circuits with a bank-enabling, fuse-programmed circuit between the latch pulse source and the bank of fuse-controlled programing circuits, and by adding a second fuse into each programing circuit; whereby, the bank of programming circuits can be enabled by alternately blowing one of two fuses in the bank-enabling circuit, and each programming logic can set by alternately blowing one of its pair of fuses thus cutting off any current path through the programing circuit regardless of the programing state of the circuit.

Abstract: In a microcircuit device such as a memory chip, where a bank of fuse-controlled latch pulse routing-circuits are used to program redundant circuits or other programming options with every memory cycle or multiple thereof, the amount of current drawn by every fuse-control circuit is reduced by controlling each bank of circuits with a bank-enabling, fuse-programmed circuit between the latch pulse source and the bank of fuse-controlled programming circuits, and by adding a second fuse into each programming circuit; whereby, the bank of programing circuits can be enabled by alternately blowing one of two fuses in the bank-enabling circuit, and each programming logic can set by alternately blowing one of its pair of fuses thus cutting off any current path through the programming circuit regardless of the programming state of the circuit.