Patents by Inventor Timothy J. Dupuis

Timothy J. Dupuis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030206058
    Abstract: A method and apparatus is provided for use in power amplifiers for reducing the peak voltage that transistors are subjected to. A power amplifier is provided with first and second switching devices and an inductor connected between the switching devices. The switching devices are driven such that the switching devices are turned on and off during the same time intervals.
    Type: Application
    Filed: May 30, 2003
    Publication date: November 6, 2003
    Inventors: Susanne A. Paul, Timothy J. Dupuis
  • Publication number: 20030179045
    Abstract: A method and apparatus is provided for use in power amplifiers for reducing the peak voltage that transistors are subjected to. A power amplifier is provided with first and second switching devices and an inductor connected between the switching devices. The switching devices are driven such that the switching devices are turned on and off during the same time intervals.
    Type: Application
    Filed: March 18, 2003
    Publication date: September 25, 2003
    Inventors: Susanne A. Paul, Timothy J. Dupuis
  • Publication number: 20030091140
    Abstract: A digital direct access arrangement (DAA) circuitry may be used to terminate the telephone connections at the user's end that provides a communication path for signals to and from the phone lines. Briefly described, the DAA provides a programmable means for the DC termination for a variety of international phone standards. The invention may also be utilized with means for transmitting and receiving a signal across a capacitive isolation barrier. More particularly, a DC holding circuit is provided in which a programmable DC current limiting mode is available. In the current limiting mode, power may be dissipated in devices external to a DAA integrated circuit. Moreover, much of the power may be dissipated in external passive devices, such as resistors.
    Type: Application
    Filed: November 12, 2002
    Publication date: May 15, 2003
    Applicant: Silicon Laboratories Inc.
    Inventors: Timothy J. Dupuis, George Tyson Tuttle, Jeffrey W. Scott, Navdeep S. Sooch, David R. Welland
  • Patent number: 6549071
    Abstract: A method and apparatus is provided for use in power amplifiers for reducing the peak voltage that transistors are subjected to. A power amplifier is provided with first and second switching devices and an inductor connected between the switching devices. The switching devices are driven such that the switching devices are turned on and off during the same time intervals.
    Type: Grant
    Filed: September 12, 2000
    Date of Patent: April 15, 2003
    Assignee: Silicon Laboratories, Inc.
    Inventors: Susanne A. Paul, Timothy J. Dupuis
  • Patent number: 6516024
    Abstract: A digital direct access arrangement (DAA) circuitry may be used to terminate the telephone connections at the user's end that provides a communication path for signals to and from the phone lines. Briefly described, the DAA provides a programmable means for the DC termination for a variety of international phone standards. The invention may also be utilized with means for transmitting and receiving a signal across a capacitive isolation barrier. More particularly, a DC holding circuit is provided in which a programmable DC current limiting mode is available. In the current limiting mode, power may be dissipated in devices external to a DAA integrated circuit. Moreover, much of the power may be dissipated in external passive devices, such as resistors. Further, the current limiting mode includes a distortion adjustment circuit to limit distortion at a crossover point at which current limiting effects occur.
    Type: Grant
    Filed: June 16, 1998
    Date of Patent: February 4, 2003
    Assignee: Silicon Laboratories Inc.
    Inventors: Timothy J. Dupuis, George Tyson Tuttle, Jeffrey W. Scott, Navdeep S. Sooch, David R. Welland
  • Patent number: 6504864
    Abstract: A digital direct access arrangement (DAA) circuitry may be used to terminate the telephone connections at the user's end that provides a communication path for signals to and from the phone lines. Briefly described, the DAA provides a programmable means for the DC termination for a variety of international phone standards. The invention may also be utilized with means for transmitting and receiving a signal across a capacitive isolation barrier. More particularly, a DC holding circuit is provided that is a second order circuit. The use of a second order circuit provides improved distortion characteristics, particularly at low frequencies.
    Type: Grant
    Filed: June 16, 1998
    Date of Patent: January 7, 2003
    Assignee: Silicon Laboratories Inc.
    Inventors: Timothy J. Dupuis, George Tyson Tuttle, Jeffrey W. Scott, Navdeep S. Sooch, David R. Welland
  • Patent number: 6498825
    Abstract: A digital direct access arrangement (DAA) circuitry may be used to terminate the telephone connections at the user's end that provides a communication path for signals to and from the phone lines. Briefly described, the DAA provides a programmable means for the DC termination for a variety of international phone standards. The invention may also be utilized with means for transmitting and receiving a signal across a capacitive isolation barrier. More particularly, a DC holding circuit is provided in which a programmable DC current limiting mode is available. In the current limiting mode, power may be dissipated in devices external to a DAA integrated circuit. Moreover, much of the power may be dissipated in external passive devices, such as resistors.
    Type: Grant
    Filed: June 16, 1998
    Date of Patent: December 24, 2002
    Assignee: Silicon Laboratories Inc.
    Inventors: Timothy J. Dupuis, George Tyson Tuttle, Jeffrey W. Scott, Navdeep S. Sooch, David R. Welland
  • Patent number: 6480602
    Abstract: Ring-detect interface circuit is disclosed for digital DAA circuitry to provide a plurality of selectable signals, including a ring monitor signal, on a ring-detect output pin. The interface circuitry allows the digital DAA circuitry to interface with advanced controllers, such as advanced DSPs, while still being compatible with older controllers that expect only a ring monitor signal on the ring-detect pin. The interface circuitry may include a multiplexer that receives multiple status bits or signals, including the ring monitor signal, and that has its output controlled by a multiple-bit control register. In addition, the ring monitor signal may be communicated as a digital signal across an isolation barrier from phone line side circuitry to powered side circuitry and ultimately made available on the ring-detect output pin. Corresponding methods for improving compatibility of digital DAA circuitry through the ring-detect interface circuit are also disclosed.
    Type: Grant
    Filed: March 4, 1998
    Date of Patent: November 12, 2002
    Assignee: Silicon Laboratories, Inc.
    Inventors: Timothy J. Dupuis, Bradley J. Fluke, Jeffrey W. Scott, Navdeep S. Sooch, David R. Welland
  • Publication number: 20020150151
    Abstract: An improved digital capacitive isolation barrier system is provided that is suitable for use in a telephone or modem where the locally powered circuits must be effectively isolated from the public telephone system, while permitting data transfer across the barrier. In particular, an automatic ADC offset calibration system is provided for determining the magnitude of the ADC offset signal required in the system during a calibration operation, and for providing the calibrated ADC offset signal during normal operation of the isolation barrier system. A modified hybrid circuit is provided for isolating the system input from the telephone line during calibration, and for completing the calibration loop. Fixed bias signals are also provided for the ADC and for a DAC in the system. In a preferred embodiment, the ADC is located on the isolated side of the isolation barrier, while the integrator and register that determine and hold the offset signal are located on the powered side of the isolation barrier.
    Type: Application
    Filed: June 4, 2002
    Publication date: October 17, 2002
    Applicant: Silicon Laboratories Inc.
    Inventors: Andrew W. Krone, Timothy J. Dupuis, Jeffrey W. Scott, Navdeep S. Sooch, David R. Welland
  • Patent number: 6462620
    Abstract: An RF power amplifier is provided for use with wireless transmission systems such as cellular phones. An RF power amplifier includes direct drive amplifier circuitry operating in a push-pull scheme. The RF power amplifier includes a pair of switching devices driven by a pair of mutually coupled inductive devices. The inductive devices may be magnetically or capacitively coupled together. The RF power amplifier may be formed on a single integrated circuit and include an on-chip bypass capacitor. The RF power amplifier may utilize a voltage regulator for providing a regulated voltage source. The RF power amplifier may be provided using a dual oxide gate device resulting in an improved amplifier. The RF power amplifier may be packaged using flip chip technology and multi-layer ceramic chip carrier technology.
    Type: Grant
    Filed: September 12, 2000
    Date of Patent: October 8, 2002
    Assignee: Silicon Laboratories, Inc.
    Inventors: Timothy J. Dupuis, Susanne A. Paul
  • Patent number: 6448847
    Abstract: A method and apparatus is provided for use in power amplifiers for reducing the peak voltage that transistors are subjected to. A power amplifier is provided with first and second switching devices and an inductor connected between the switching devices. The switching devices are driven such that the switching devices are turned on and off during the same time intervals.
    Type: Grant
    Filed: September 12, 2000
    Date of Patent: September 10, 2002
    Assignee: Silicon Laboratories, Inc.
    Inventors: Susanne A. Paul, Timothy J. Dupuis
  • Patent number: 6442213
    Abstract: An improved digital capacitive isolation barrier system is provided that is suitable for use in a telephone or modem where the locally powered circuits must be effectively isolated from the public telephone system, while permitting data transfer across the barrier. In particular, an automatic ADC offset calibration system is provided for determining the magnitude of the ADC offset signal required in the system during a calibration operation, and for providing the calibrated ADC offset signal during normal operation of the isolation barrier system. A modified hybrid circuit is provided for isolating the system input from the telephone line during calibration, and for completing the calibration loop. Fixed bias signals are also provided for the ADC and for a DAC in the system. In a preferred embodiment, the ADC is located on the isolated side of the isolation barrier, while the integrator and register that determine and hold the offset signal are located on the powered side of the isolation barrier.
    Type: Grant
    Filed: March 4, 1998
    Date of Patent: August 27, 2002
    Assignee: Silicon Laboratories Inc.
    Inventors: Andrew W. Krone, Timothy J. Dupuis, Jeffrey W. Scott, Navdeep S. Sooch, David R. Welland
  • Patent number: 6442271
    Abstract: A method and apparatus are provided for maintaining communication across an isolation barrier even if the external circuitry to which it is connected enters a low-power mode. In normal operation the isolation barrier local clock is synchronized with a clock signal provided by the external circuitry. If the external circuitry enters a low-power mode, its clock signal often slows or stops. In that case, the local clock in the isolation barrier switches to a free-running mode, wherein a VCO voltage input is provided by a bias voltage generator instead of by a PLL circuit. The VCO thus continues to provide a local clock signal in order to allow communication of information across the isolation barrier even if the external circuitry is not active. This enables the isolation barrier to receive and process an external signal, such as a ring signal, in low-power mode.
    Type: Grant
    Filed: March 4, 1998
    Date of Patent: August 27, 2002
    Assignee: Silicon Laboratories, Inc.
    Inventors: George Tyson Tuttle, Jerrell P. Hein, Timothy J. Dupuis, Jeffrey W. Scott, Navdeep S. Sooch, David R. Welland
  • Patent number: 6392488
    Abstract: An RF power amplifier is provided for use with wireless transmission systems such as cellular phones. An RF power amplifier includes direct drive amplifier circuitry operating in a push-pull scheme. The RF power amplifier includes a pair of switching devices driven by a pair of mutually coupled inductive devices. The inductive devices may be magnetically or capacitively coupled together. The RF power amplifier may be formed on a single integrated circuit and include an on-chip bypass capacitor. The RF power amplifier may utilize a voltage regulator for providing a regulated voltage source. The RF power amplifier may be provided using a dual oxide gate device resulting in an improved amplifier. The RF power amplifier may be packaged using flip chip technology and multi-layer ceramic chip carrier technology.
    Type: Grant
    Filed: September 12, 2000
    Date of Patent: May 21, 2002
    Assignee: Silicon Laboratories, Inc.
    Inventors: Timothy J. Dupuis, Susanne A. Paul
  • Patent number: 6389134
    Abstract: A call progress monitor circuit is disclosed for a digital DAA in which digital information is transmitted across an isolation barrier from phone line side circuitry to powered side circuitry. In particular, the call progress monitor circuit of the present invention converts oversampled digital transmit and receive data into analog transmit and receive signals and then combines them to produce a call progress signal that is provided to be fed to a speaker driver circuit. In addition, the call progress signal in one embodiment is filtered with a low pass filter. The call progress monitor circuit in one embodiment includes oversampled digital-to-analog converters, a summing circuit, and a low pass filter. Corresponding methods for monitoring the progress of a call utilizing oversampled digital transmit and receive signals are also disclosed.
    Type: Grant
    Filed: March 4, 1998
    Date of Patent: May 14, 2002
    Assignee: Silicon Laboratories, Inc.
    Inventors: Timothy J. Dupuis, George Tyson Tuttle, Jeffrey W. Scott, Navdeep S. Sooch, David R. Welland
  • Publication number: 20020044018
    Abstract: A method and apparatus is provided for detecting the output power of an RF power amplifier for purposes of controlling the output power. A circuit for generating an output power control signal includes a power detector to detect the output power of an RF power amplifier. A variable gain amplifier is coupled to the power detector for amplifying the output of the power detector. The value of the generated control signal is a function of the gain of the variable gain amplifier.
    Type: Application
    Filed: April 26, 2001
    Publication date: April 18, 2002
    Inventors: Timothy J. Dupuis, David R. Welland, Ali M. Niknejad, Susanne A. Paul
  • Patent number: 6362606
    Abstract: An RF power amplifier is provided for use with wireless transmission systems such as cellular phones. An RF power amplifier includes direct drive amplifier circuitry operating in a push-pull scheme. The RF power amplifier includes a pair of switching devices driven by a pair of mutually coupled inductive devices. The inductive devices may be magnetically or capacitively coupled together. The RF power amplifier may be formed on a single integrated circuit and include an on-chip bypass capacitor. The RF power amplifier may utilize a voltage regulator for providing a regulated voltage source. The RF power amplifier may be provided using a dual oxide gate device resulting in an improved amplifier. The RF power amplifier may be packaged using flip chip technology and multi-layer ceramic chip carrier technology.
    Type: Grant
    Filed: September 12, 2000
    Date of Patent: March 26, 2002
    Assignee: Silicon Laboratories, INC
    Inventors: Timothy J. Dupuis, Susanne A. Paul
  • Patent number: 6323796
    Abstract: A digital capacitive isolation barrier system is provided that is suitable for use in a telephone or modem where the locally powered circuits must be effectively isolated from the public telephone system, while permitting data transfer across the barrier. In particular, an automatic ADC offset calibration system is provided for determining the magnitude of the ADC offset signal required in the system during a calibration operation, and for providing the ADC offset signal during normal operation of the isolation barrier system. Fixed bias signals are also provided for the ADC and for a DAC in the system. In a preferred embodiment, the ADC is located on the isolated side of the isolation barrier, while the integrator and register that determine and hold the offset signal are located on the powered side of the isolation barrier.
    Type: Grant
    Filed: March 1, 2000
    Date of Patent: November 27, 2001
    Assignee: Silicon Laboratories, Inc.
    Inventors: Andrew W. Krone, Timothy J. Dupuis, Jeffery W. Scott, Navdeep S. Sooch, David R. Welland
  • Patent number: 6307891
    Abstract: A method and apparatus are provided for suspending or freezing outputs from an isolation barrier system, which may be a digital capacitive isolation barrier system, during the occurrence of events that may disrupt proper operation of the system. Examples of such disruptive events are data rate changes during modem baud rate negotiations, transition to low-power mode, and going off-hook in a telephony system. In each of these cases, the master circuit anticipates the disruption and sends a freeze signal to the isolated circuit. The freeze signal instructs the isolated circuit to enter freeze mode, and no data is sent through the isolation system. Internal control signals are generated and used to establish synchronization and framing after the disruption, and to restore normal operation of the isolation system. In preferred embodiments, the duration of the freeze period may be determined by a timer or by circuitry that detects framing lock or the presence of transients in the system.
    Type: Grant
    Filed: March 4, 1998
    Date of Patent: October 23, 2001
    Assignee: Silicon Laboratories, Inc.
    Inventors: Jerrell P. Hein, Timothy J. Dupuis, George Tyson Tuttle, Jeffrey W. Scott, Navdeep S. Sooch, David R. Welland
  • Patent number: 6304597
    Abstract: An improved modem architecture and associated method are disclosed that integrate modem functionality and line-side isolation functionality while allowing control of modem processing so that it may be bypassed if raw data, such as raw pulse-code-modulated (PCM) data, is desired to be transmitted or received.
    Type: Grant
    Filed: January 10, 2000
    Date of Patent: October 16, 2001
    Assignee: Silicon Laboratories, Inc.
    Inventors: Timothy J. Dupuis, Andrew W. Krone, Mitchell Reid