Patents by Inventor Timothy J. Dupuis

Timothy J. Dupuis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7224232
    Abstract: A method and apparatus is provided for use in power amplifiers for reducing the peak voltage that transistors are subjected to. A power amplifier is provided with first and second switching devices and an inductor connected between the switching devices. The switching devices are driven such that the switching devices are turned on and off during the same time intervals.
    Type: Grant
    Filed: November 8, 2004
    Date of Patent: May 29, 2007
    Assignee: Silicon Laboratories Inc.
    Inventors: Susanne A. Paul, Timothy J. Dupuis, John Blake Pavelka
  • Patent number: 7215206
    Abstract: A method and apparatus provides techniques for electrically isolating switching devices in a stacked RF power amplifier, which prevents the switching devices from being subjected to high breakdown voltages. The isolation provided allows the power amplifier to be implemented on an integrated circuit.
    Type: Grant
    Filed: March 10, 2006
    Date of Patent: May 8, 2007
    Assignee: Silicon Laboratories Inc.
    Inventors: Timothy J. Dupuis, Susanne A. Paul
  • Patent number: 7173491
    Abstract: A method and apparatus is provided for dynamically changing the biasing conditions of a voltage regulator to overcome the problems caused by various conditions. The invention includes a detector and a bias control circuit for applying bias current to the voltage regulator to compensate for a detected condition.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: February 6, 2007
    Assignee: Silicon Laboratories Inc.
    Inventors: Ryan M. Bocock, Timothy J. Dupuis
  • Patent number: 7161423
    Abstract: A method and apparatus is provided for use in power amplifiers where multiple parallel power amplifiers provide various output power levels. By selectively enabling and disabling the parallel power amplifiers and combining their outputs, a desired output power can be realized, while choosing a combination of power amplifiers that provide a high efficiency.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: January 9, 2007
    Assignee: Silicon Laboratories Inc.
    Inventors: Susanne A. Paul, Timothy J. Dupuis
  • Patent number: 7161427
    Abstract: A method and apparatus provides an input structure for a power amplifier. In one example, the input structure has an input network and a predriver circuit to provide an input signal to the power amplifier. The input network includes a transformer for helping to maintain a constant input impedance. The predriver includes a limiting amplifier that provides isolation between the power amplifier and the RF input. A DC feedback circuit is used by the predriver that maintains the DC level of the inverters to a desired level.
    Type: Grant
    Filed: December 22, 2003
    Date of Patent: January 9, 2007
    Assignee: Silicon Laboratories Inc.
    Inventors: Alan L. Westwick, Timothy J. Dupuis, Susanne A. Paul
  • Patent number: 7145396
    Abstract: A method and apparatus are provided for use with a power amplifier for protecting active devices on the power amplifier. A peak detector is used by control circuitry to detect the presence of a peak voltage that exceeds a threshold voltage. In response to the detection of a peak voltage, the gain of the power amplifier is reduced.
    Type: Grant
    Filed: September 29, 2003
    Date of Patent: December 5, 2006
    Assignee: Silicon Laboratories, Inc.
    Inventor: Timothy J. Dupuis
  • Patent number: 7113045
    Abstract: A method and apparatus provides an input structure for a power amplifier. In one example, the input structure has an input network and a predriver circuit to provide an input signal to the power amplifier. The input network includes a transformer for helping to maintain a constant input impedance. The predriver includes a limiting amplifier that provides isolation between the power amplifier and the RF input. A DC feedback circuit is used by the predriver that maintains the DC level of the inverters to a desired level.
    Type: Grant
    Filed: December 22, 2003
    Date of Patent: September 26, 2006
    Assignee: Silicon Laboratories Inc.
    Inventors: Alan L. Westwick, Timothy J. Dupuis, Susanne A. Paul
  • Patent number: 7106137
    Abstract: A method and apparatus is provided for use with a power amplifier to provide a regulated supply to the power amplifier. The invention uses a combination of voltage and current regulation to overcome the problems encountered in the prior art. In one example, voltage regulation is used at high power levels, while current regulation is used at low power levels.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: September 12, 2006
    Assignee: Silicon Laboratories Inc.
    Inventors: Timothy J. Dupuis, Ryan M. Bocock
  • Patent number: 7053718
    Abstract: A method and apparatus provides techniques for electrically isolating switching devices in a stacked RF power amplifier, which prevents the switching devices from being subjected to high breakdown voltages. The isolation provided allows the power amplifier to be implemented on an integrated circuit.
    Type: Grant
    Filed: September 25, 2003
    Date of Patent: May 30, 2006
    Assignee: Silicon Laboratories Inc.
    Inventors: Timothy J. Dupuis, Susanne A. Paul
  • Patent number: 7050509
    Abstract: An improved digital capacitive isolation barrier system is provided that is suitable for use in a telephone or modem where the locally powered circuits must be effectively isolated from the public telephone system, while permitting data transfer across the barrier. In particular, an automatic ADC offset calibration system is provided for determining the magnitude of the ADC offset signal required in the system during a calibration operation, and for providing the calibrated ADC offset signal during normal operation of the isolation barrier system. A modified hybrid circuit is provided for isolating the system input from the telephone line during calibration, and for completing the calibration loop. Fixed bias signals are also provided for the ADC and for a DAC in the system. In a preferred embodiment, the ADC is located on the isolated side of the isolation barrier, while the integrator and register that determine and hold the offset signal are located on the powered side of the isolation barrier.
    Type: Grant
    Filed: June 4, 2002
    Date of Patent: May 23, 2006
    Assignee: Silicon Laboratories Inc.
    Inventors: Andrew W. Krone, Timothy J. Dupuis, Jeffrey W. Scott, Navdeep S. Sooch, David R. Welland
  • Patent number: 7046755
    Abstract: A digital direct access arrangement (DAA) circuitry may be used to terminate the telephone connections at the user's end that provides a communication path for signals to and from the phone lines. Briefly described, the DAA provides a programmable means for the DC termination for a variety of international phone standards. The invention may also be utilized with means for transmitting and receiving a signal across a capacitive isolation barrier. More particularly, a DC holding circuit is provided in which a programmable DC current limiting mode is available. In the current limiting mode, power may be dissipated in devices external to a DAA integrated circuit. Moreover, much of the power may be dissipated in external passive devices, such as resistors.
    Type: Grant
    Filed: October 3, 2003
    Date of Patent: May 16, 2006
    Assignee: Silicon Laboratories Inc.
    Inventors: Timothy J. Dupuis, George Tyson Tuttle, Jeffrey W. Scott, Navdeep S. Sooch, David R. Welland
  • Patent number: 7020187
    Abstract: An improved modem architecture and associated method that integrates modem and line-isolation circuitry so as to achieve modem functionality and system-side isolation functionality on a single integrated circuit while also providing a modem interface that allows synchronous modem transmission protocols to be implemented through an asynchronous serial interface is disclosed. For example, one such type of synchronous modem transmission protocol is the HDLC (high-level data link control) protocol. According to the techniques disclosed herein, data and control information of an HDLC protocol may be presented at transmit and receive pins of a modem/system side DAA through an UART even though the UART may be an asynchronous serial receiver transmitter. Thus, both transmit and receive data transfers of a serial modem protocol may be implemented through an asynchronous serial interface.
    Type: Grant
    Filed: January 10, 2000
    Date of Patent: March 28, 2006
    Assignee: Silicon Laboratories Inc.
    Inventors: Mitchell Reid, Timothy J. Dupuis
  • Patent number: 7003023
    Abstract: An improved digital capacitive isolation barrier system is provided that is suitable for use in a telephone or modem where the locally powered circuits must be effectively isolated from the public telephone system, while permitting data transfer across the barrier. In particular, an automatic ADC offset calibration system is provided for determining the magnitude of the ADC offset signal required in the system during a calibration operation, and for providing the calibrated ADC offset signal during normal operation of the isolation barrier system. A modified hybrid circuit is provided for isolating the system input from the telephone line during calibration, and for completing the calibration loop. Fixed bias signals are also provided for the ADC and for a DAC in the system. In a preferred embodiment, the ADC is located on the isolated side of the isolation barrier, while the integrator and register that determine and hold the offset signal are located on the powered side of the isolation barrier.
    Type: Grant
    Filed: September 26, 2003
    Date of Patent: February 21, 2006
    Assignee: Silicon Laboratories Inc.
    Inventors: Andrew W. Krone, Timothy J. Dupuis, Jeffrey W. Scott, Navdeep S. Sooch, David R. Welland
  • Patent number: 6969680
    Abstract: A method and apparatus if provided for shielding a capacitor structure formed in a semiconductor device. In a capacitor formed in an integrated circuit, one or more shields are disposed around layers of conductive strips to shield the capacitor. The shields confine the electric fields between the limits of the shields.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: November 29, 2005
    Assignee: Silicon Laboratories Inc.
    Inventors: Susanne A. Paul, Timothy J. Dupuis, Ali M. Niknejad
  • Patent number: 6968055
    Abstract: DC holding circuitry that may be implemented with other parts of a DAA circuit to terminate a telephone connections at the user's end. The DC holding circuitry may be implemented using a synthesized inductor circuit powered by DC termination circuitry of a DAA telephone line circuit to provide quiet current that may be mirrored to provide the DC holding. The DC holding circuitry may be further implemented to actively steer DC holding current into multiple external transistors to share the power burden, and using an op-amp gain/feedback configuration to achieve low noise and distortion without the need for expensive capacitor-based filter and high powered transistor components. Variable biasing and active current steering may be employed to permit one or more external resistor/s to help dissipate power. The disclosed DC holding circuitry may also be implemented with a fast transient network having a single stage of fast transient filtering placed in the input network.
    Type: Grant
    Filed: March 26, 2003
    Date of Patent: November 22, 2005
    Assignee: Silicon Laboratories Inc.
    Inventors: Timothy J. Dupuis, Saroj Rout
  • Patent number: 6927630
    Abstract: A method and apparatus is provided for detecting the output power of an RF power amplifier for purposes of controlling the output power. A circuit for generating an output power control signal includes a power detector to detect the output power of an RF power amplifier. A variable gain amplifier is coupled to the power detector for amplifying the output of the power detector. The value of the generated control signal is a function of the gain of the variable gain amplifier.
    Type: Grant
    Filed: September 29, 2003
    Date of Patent: August 9, 2005
    Assignee: Silicon Laboratories Inc.
    Inventors: Timothy J. Dupuis, David R. Welland, Ali M. Niknejad, Susanne A. Paul
  • Patent number: 6917245
    Abstract: A method and apparatus is provided for detecting the output power of a power amplifier. The output power is detected by detecting the absolute values of the voltage and current at the output of the amplifier and mixing the detected voltage and current to generate a signal related to the output power.
    Type: Grant
    Filed: March 13, 2002
    Date of Patent: July 12, 2005
    Assignee: Silicon Laboratories, Inc.
    Inventors: Timothy J. Dupuis, David R. Welland, Susanne A. Paul, Ali M. Niknejad
  • Patent number: 6897730
    Abstract: A method and apparatus is provided for use with a power amplifier to provide a regulated supply to the power amplifier. The invention uses a combination of voltage and current regulation to overcome the problems encountered in the prior art. In one example, voltage regulation is used at high power levels, while current regulation is used at low power levels.
    Type: Grant
    Filed: March 4, 2003
    Date of Patent: May 24, 2005
    Assignee: Silicon Laboratories Inc.
    Inventors: Timothy J. Dupuis, Ryan M. Bocock
  • Patent number: 6894565
    Abstract: A method and apparatus is provided for dynamically changing the biasing conditions of a voltage regulator to overcome the problems caused by various conditions. The invention includes a detector and a bias control circuit for applying bias current to the voltage regulator to compensate for a detected condition.
    Type: Grant
    Filed: December 3, 2002
    Date of Patent: May 17, 2005
    Assignee: Silicon Laboratories, Inc.
    Inventors: Ryan M. Bocock, Timothy J. Dupuis
  • Patent number: 6828859
    Abstract: A method and apparatus are provided for use with a power amplifier for protecting active devices on the power amplifier. A peak detector is used by control circuitry to detect the presence of a peak voltage that exceeds a threshold voltage. In response to the detection of a peak voltage, the gain of the power amplifier is reduced.
    Type: Grant
    Filed: August 17, 2001
    Date of Patent: December 7, 2004
    Assignee: Silicon Laboratories, Inc.
    Inventor: Timothy J. Dupuis