Abstract: An electrical device and an operation control method are provided. The electronic device includes a touch module and a processor. The touch module includes a touchable region. The touchable region is divided into at least a first touchable region and a second touchable region. The first touchable region is configured to implement a first function. The second touchable region is configured to implement the first function and a second function. The processor is electrically connected to the touch module. When at least one first touch point is detected in the first touchable region, at least one second touch point is detected in the second touchable region, and the processor determines that a distance between the first touch point and the second touch point is within a predetermined distance, the second touchable region is switched to implementing the first function.

Abstract: A buffer circuit includes an input terminal configured to receive an input signal, an output terminal, an inverter, and a resistor-capacitor (RC) circuit coupled in series with the inverter between the input terminal and the output terminal. The RC circuit includes an NMOS transistor coupled between an RC circuit output terminal and a reference node, a resistor coupled between the RC circuit output terminal and a power supply node, and a capacitor coupled between the RC circuit output terminal and one of the power supply node or the reference node, and the inverter and the RC circuit are configured to generate an output signal at the output terminal based on the input signal.

Abstract: This application provides a live streaming processing method performed by an electronic device. The method includes: displaying a live streaming room, the live stream room having a host account, a host sub-account and multiple viewer accounts, the host sub-account being used for assisting the host account of the live streaming room in operation; receiving real-time live streaming data of the live streaming room, and displaying a live streaming content on a live streaming room page according to the real-time live streaming data, the real-time live streaming data collected from the host account and the viewer accounts; and displaying, in response to a live streaming room operation of the host sub-account, an operation result of the live streaming room operation of the host sub-account in the live streaming room, wherein the operation result of the live streaming room operation updates the live streaming content on the live streaming room page.

Abstract: A method for forming a gate all around transistor includes forming a plurality of semiconductor nanosheets. The method includes forming a cladding inner spacer between a source region of the transistor and a gate region of the transistor. The method includes forming sheet inner spacers between the semiconductor nanosheets in a separate deposition process from the cladding inner spacer.

Abstract: An antenna structure is provided, which includes a substrate, an antenna unit and a metal ground. The substrate includes a first surface and a second surface; the antenna unit disposed on the first surface includes a radiation part, a feeding part and a feeding line, where the feeding line includes a first transmission line and a second transmission line that are perpendicular to each other and connected to each other, and the first transmission line is connected to the radiation part via the feeding part; and the metal ground disposed on the second surface has an edge which is perpendicular to projection of the radiation part to the metal ground; and a resonance slot is disposed on the metal ground, and its position corresponds between projection of the second transmission line to the metal ground and the edge.

Abstract: An electrostatic discharge clamp is shown, which includes a clamping circuit, a driving circuit, a capacitor and resistor network, and a bias circuit. The clamping circuit has a plurality of transistors connected in a cascode configuration. The driving circuit is coupled to the gates of the transistors of the clamping circuit. The capacitor and resistor network introduces an RC delay in response to an electrostatic discharge event to control the driving circuit to turn on the transistors of the clamping circuit for electrostatic discharging. The bias circuit biases the driving circuit to turn off the transistors of the clamping circuit when the capacitor and resistor network does not detect the electrostatic discharge event.

Abstract: A method of exposing a wafer to a high-tilt angle ion beam and an apparatus for performing the same are disclosed. In an embodiment, a method includes forming a patterned mask layer over a wafer, the patterned mask layer including a patterned mask feature; exposing the wafer to an ion beam, a surface of the wafer being tilted at a tilt angle with respect to the ion beam; and moving the wafer along a scan line with respect to the ion beam, a scan angle being defined between the scan line and an axis perpendicular to an axis of the ion beam, a difference between the tilt angle and the scan angle being less than 50°.

Abstract: The present disclosure describes an apparatus with a local interconnect structure. The apparatus can include a first transistor, a second transistor, a first interconnect structure, a second interconnect structure, and a third interconnect structure. The local interconnect structure can be coupled to gate terminals of the first and second transistors and routed at a same interconnect level as reference metal lines coupled to ground and a power supply voltage. The first interconnect structure can be coupled to a source/drain terminal of the first transistor and routed above the local interconnect structure. The second interconnect structure can be coupled to a source/drain terminal of the second transistor and routed above the local interconnect structure. The third interconnect structure can be routed above the local interconnect structure and at a same interconnect level as the first and second interconnect structures.

Abstract: According to an exemplary embodiment, a method of forming a vertical device is provided. The method includes: providing a protrusion over a substrate; forming an etch stop layer over the protrusion; laterally etching a sidewall of the etch stop layer; forming an insulating layer over the etch stop layer; forming a film layer over the insulating layer and the etch stop layer; performing chemical mechanical polishing on the film layer and exposing the etch stop layer; etching a portion of the etch stop layer to expose a top surface of the protrusion; forming an oxide layer over the protrusion and the film layer; and performing chemical mechanical polishing on the oxide layer and exposing the film layer.

Abstract: An electronic device includes a host, a display, a sliding plate, and a keyboard. The host has an operating surface. The display is pivoted to the host. The sliding plate is slidably disposed in the host, where the display is mechanically coupled to the sliding plate, and the sliding plate includes a plat portion and a recess portion that are arranged side by side. The keyboard is integrated to the host. The keyboard includes a key structure, where the key structure includes a key cap and a reciprocating element, and the key cap is exposed from the operating surface of the host. The reciprocating element is disposed between the key cap and the sliding plate and has a first end connected to the key cap and a second end contacting the sliding plate. The second end is located on a sliding path of the plat portion and the recess portion.

Abstract: A centrifugal heat dissipation fan including a housing and an impeller disposed in the housing on an axis is provided. The housing has at least one inlet on the axis and has a plurality of outlets in different radial directions. A heat dissipation system of an electronic device is also provided.

Abstract: An example electronic device includes a controller to determine a user touch detection by a power adaptor coupled to the electronic device to operate the electronic device in an AC power mode. The power adaptor may comprise a proximity sensor to detect a user touch for detachment of the power adaptor from the electronic device, and a control circuit to operate a configuration pin in a low output mode to signal user touch detection. The controller may initiate central processing unit (CPU) throttling to reduce power consumption by the electronic device. The controller may further stop CPU throttling in response to detecting that the power adaptor has been detached from the electronic device. Further, the controller may switch the electronic device to a DC power mode to operate using DC power supplied by a battery of the electronic device in response to power adaptor detachment.

Abstract: A backside illumination (BSI) image sensor and a method of forming the same are provided. A device includes a substrate and a plurality of photosensitive regions in the substrate. The substrate has a first side and a second side opposite to the first side. The device further includes an interconnect structure on the first side of the substrate, and a plurality of recesses on the second side of the substrate. The plurality of recesses extend into a semiconductor material of the substrate.

Abstract: A device includes a substrate, a gate structure over the substrate, gate spacers on opposite sidewalls of the gate structure, source/drain structures over the substrate and on opposite sides of the gate structure, and a self-assemble monolayer (SAM) in contact with an inner sidewall of one of the gate spacer and in contact with a top surface of the gate structure.

Abstract: A stacked integrated circuit (IC) device and a method are disclosed. The stacked IC device includes a first semiconductor element. The first substrate includes a dielectric block in the first substrate; and a plurality of first conductive features formed in first inter-metal dielectric layers over the first substrate. The stacked IC device also includes a second semiconductor element bonded on the first semiconductor element. The second semiconductor element includes a second substrate and a plurality of second conductive features formed in second inter-metal dielectric layers over the second substrate. The stacked IC device also includes a conductive deep-interconnection-plug coupled between the first conductive features and the second conductive features. The conductive deep-interconnection-plug is isolated by dielectric block, the first inter-metal-dielectric layers and the second inter-metal-dielectric layers.

Abstract: A semiconductor device includes a substrate and a gate structure. The gate structure is disposed on the substrate, and the gate structure includes a titanium nitride barrier layer a titanium aluminide layer, and a middle layer. The titanium aluminide layer is disposed on the titanium nitride barrier layer, and the middle layer is disposed between the titanium aluminide layer and the titanium nitride barrier layer. The middle layer is directly connected with the titanium aluminide layer and the titanium nitride barrier layer, and the middle layer includes titanium and nitrogen. A concentration of nitrogen in the middle layer is gradually decreased in a vertical direction towards an interface between the middle layer and the titanium aluminide layer.

Abstract: A method of protecting a device (protected device) (in a semiconductor system from an electrostatic discharge (ESD)) includes: coupling the protected device between a first node and a first reference voltage; coupling an ESD device between the first node and the first reference voltage; and selectively and actively coupling an input of the ESD device to a second reference voltage thereby selectively and actively turning on the ESD device.

Abstract: A resistive memory apparatus including a memory cell array, at least one dummy transistor and a control circuit is provided. The memory cell array includes a plurality of memory cells. Each of the memory cells includes a resistive switching element. The dummy transistor is electrically isolated from the resistive switching element. The control circuit is coupled to the memory cell array and the dummy transistor. The control circuit is configured to provide a first bit line voltage, a source line voltage and a word line voltage to the dummy transistor to drive the dummy transistor to output a saturation current. The control circuit is further configured to determine a value of a second bit line voltage for driving the memory cells according to the saturation current. In addition, an operating method and a memory cell array of the resistive memory apparatus are also provided.

Abstract: An optical fingerprint sensing module includes an image sensing device, a light source and a light shielding structure. The image sensing device is configured to sense light transmitted from a fingerprint of a finger on a display panel. The image sensing device includes a light sensing plane having a first geometric center. The light source includes a light emitting plane having a second geometric center. The first geometric center is separated from the second geometric center by a distance from 2 mm to 20 mm. The light shielding structure is disposed between the image sensing device and the light source. In examples, the optical fingerprint sensing module further includes a field angle controller to constrain light pass there through with a field angle of 5-60 degrees. A display device including an optical fingerprint sensing module is disclosed herein as well.

Abstract: A semiconductor structure includes a substrate and a stack of p-n junction structures embedded in the substrate. The semiconductor structure includes a semiconductor fin protruding from the substrate. The semiconductor structure includes a pair of source/drain structures disposed in the semiconductor fin. The semiconductor structure includes a gate structure over a channel region of the semiconductor fin and interposed between the pair of source/drain structures.