Patents by Inventor Ting Li

Ting Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240119283
    Abstract: A method of performing automatic tuning on a deep learning model includes: utilizing an instruction-based learned cost model to estimate a first type of operational performance metrics based on a tuned configuration of layer fusion and tensor tiling; utilizing statistical data gathered during a compilation process of the deep learning model to determine a second type of operational performance metrics based on the tuned configuration of layer fusion and tensor tiling; performing an auto-tuning process to obtain a plurality of optimal configurations based on the first type of operational performance metrics and the second type of operational performance metrics; and configure the deep learning model according to one of the plurality of optimal configurations.
    Type: Application
    Filed: October 6, 2023
    Publication date: April 11, 2024
    Applicant: MEDIATEK INC.
    Inventors: Jui-Yang Hsu, Cheng-Sheng Chan, Jen-Chieh Tsai, Huai-Ting Li, Bo-Yu Kuo, Yen-Hao Chen, Kai-Ling Huang, Ping-Yuan Tseng, Tao Tu, Sheng-Je Hung
  • Publication number: 20240120932
    Abstract: Embodiments of the disclosure provide a circuit, chip, system, and method for eliminating random perturbation. The circuit includes a weight calculating module for receiving digital signals and random perturbation digital quantity, using least mean square error algorithm to calculate weight deviation iteration coefficient based on digital signal and digital quantity, and updating perturbation weight in real-time according to weight deviation iteration coefficient; and a perturbation eliminating module for eliminating perturbation signal in output digital signal of quantizer according to perturbation weight updated in real-time and updating perturbation weight in real-time according to weight deviation iteration coefficient, and then calculating current perturbation weight in real time to realize self-calibration of perturbation weight.
    Type: Application
    Filed: December 3, 2023
    Publication date: April 11, 2024
    Applicant: Chongqing GigaChip Technology Co., Ltd.
    Inventors: Yabo NI, Yong ZHANG, Xiaofeng SHEN, Ting LI, Lu LIU, Can ZHU, Jiahao PENG, Liang LI, Dongbing FU, Jianan WANG
  • Publication number: 20240116126
    Abstract: An ultrasonic transducer includes an elongated transducer body with an aperture for mounting a piezoelectric driver stack for driving the ultrasonic transducer to operate at a first resonant frequency, a mounting flange for mounting the transducer body to a wire bonding machine, a rigid connecting member having first and second ends which are respectively connected to the mounting flange and the transducer body at a first nodal vibration region of the transducer body when the ultrasonic transducer is operated at the first resonant frequency and a flexible connecting member extending between the mounting flange and the transducer body at a second nodal vibration region of the transducer body when the ultrasonic transducer is operated at the first resonant frequency.
    Type: Application
    Filed: October 11, 2022
    Publication date: April 11, 2024
    Inventors: Tsz Kit YU, Ka Shing KWAN, Hoi Ting LAM, Hing Leung LI
  • Publication number: 20240116127
    Abstract: An ultrasonic transducer that is configured to selectively operate at first or second resonant frequency during wire bonding operations includes an elongated transducer body an aperture for mounting a piezoelectric driver stack for driving the ultrasonic transducer to operate at the first or second resonant frequency and a mounting flange connected to the transducer body at a first nodal vibration region of the transducer body when the ultrasonic transducer is operated at the first resonant frequency. The elongated transducer has a length substantially equal to two wavelengths of a first oscillatory wave that is transmitted along the length of the transducer body when the transducer is operated at the first resonant frequency, and substantially equal to a half wavelength of a second oscillatory wave that is transmitted along the length of the transducer body when the transducer is operated at the second resonant frequency.
    Type: Application
    Filed: August 2, 2023
    Publication date: April 11, 2024
    Inventors: Tsz Kit YU, Ka Shing KWAN, Hoi Ting LAM, Hing Leung LI
  • Publication number: 20240115627
    Abstract: The present disclosure relates to use of a Clostridium ghonii spore combined with pembrolizumab in cancer treatment. It is found for the first time that the Clostridium ghonii spore combined with pembrolizumab can significantly improve a curative effect of colon cancer and reduce a dose of the pembrolizumab, and thus is efficient and low-toxic. Oncolysis by Clostridium ghonii can affect immunogenicity of a tumor microenvironment (TME) by various ways, converts an immunosuppressive state of the TME into an immune-activated state, adjusts the immunosuppressive TME, and breaks an immune tolerance. An optimal combination of the Clostridium ghonii spore and the pembrolizumab thoroughly removes about 20% of mouse tumor tissues. A benefit range of patients with tumors treated by a PD-1 antibody is expanded. The combination even has an obvious curative effect on patients failed the treatment by the PD-1 antibody.
    Type: Application
    Filed: October 9, 2022
    Publication date: April 11, 2024
    Inventors: Yong Wang, Hong Zhu, Wenhua Zhang, Yanqiu Xing, Dan Wang, Yuanyuan Liu, Shaopeng Wang, Jiahui Zheng, Rong Zhang, Xiaonan Li, Xinglu Xu, Shengbiao Jiang, Lichao Xing, Yuxia Gao, Shili Shao, Ting Han
  • Patent number: 11955423
    Abstract: Methods for forming dummy under-bump metallurgy structures and semiconductor devices formed by the same are disclosed. In an embodiment, a semiconductor device includes a first redistribution line and a second redistribution line over a semiconductor substrate; a first passivation layer over the first redistribution line and the second redistribution line; a second passivation layer over the first passivation layer; a first under-bump metallurgy (UBM) structure over the first redistribution line, the first UBM structure extending through the first passivation layer and the second passivation layer and being electrically coupled to the first redistribution line; and a second UBM structure over the second redistribution line, the second UBM structure extending through the second passivation layer, the second UBM structure being electrically isolated from the second redistribution line by the first passivation layer.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ting-Li Yang, Po-Hao Tsai, Ming-Da Cheng, Yung-Han Chuang, Hsueh-Sheng Wang
  • Patent number: 11951725
    Abstract: The present disclosure provides a method of manufacturing a bonding structural test block with defects. The method of manufacturing the bonding structural test block with defects includes: providing a first plate and a second plate; applying an adhesive on an upper surface of the first plate to form an adhesive layer; heating and curing at least partial region of the adhesive layer for the first time; placing the second plate on the adhesive layer; and heating and curing the adhesive layer for the second time to form a boding structural test block. According to the present disclosure, the at least partial region of the adhesive layer is heated and cured for the first time and chemical reaction occurs, so that the at least partial region forms a defect, and controllable manufacturing of the defect is realized. The test block with the defect is subjected to mechanical detection to simulate the actual defective product.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: April 9, 2024
    Assignee: AECC Commercial Aircraft Engine Co., Ltd.
    Inventors: Ting Zhang, Aihua Huang, Xiangqian Li
  • Patent number: 11955240
    Abstract: A neural-network-based-implemented ophthalmologic intelligent consultation method includes: performing correction filtering on a consultation voice of a patient, framing the voice into a consultation voice frame sequence, generating a consultation text corresponding to the consultation voice frame sequence based on phoneme recognition and phoneme transcoding, and extracting an ophthalmologically-described disease; performing gray-level filtering, primary picture segmentation, and size equalization operation on an eye picture set of the to-be-diagnosed patient to acquire a standard eyeball picture group; extracting eye white features, pupil features and blood vessel features from the standard eyeball picture group, performing lesion feature analysis on the eye white features, the pupil features and the blood vessel features to acquire an ophthalmologically-observed disease, and based on the ophthalmologically-observed disease and the ophthalmologically-described disease, generating a consultation result.
    Type: Grant
    Filed: September 12, 2023
    Date of Patent: April 9, 2024
    Assignee: Renmin Hospital of Wuhan University (Hubei General Hospital)
    Inventors: Xuan Xiao, Xiang Gao, Ting Chen, Ting Su, Xuejie Li
  • Patent number: 11955587
    Abstract: A light emitting diode (LED) package structure includes a glass substrate, conductive through holes, active elements, an insulating layer, LEDs and pads. The glass substrate has an upper surface and a lower surface. The conductive through holes penetrate the glass substrate and connect the upper and the lower surfaces. The active elements are disposed on the upper surface of the glass substrate and electrically connected to the conductive through holes. The insulating layer is disposed on the upper surface and covers the active elements. The LEDs are disposed on the insulating layer and electrically connected to at least one of the active elements. The pads are disposed on the lower surface of the glass substrate and electrically connected to the conductive through holes. A source of at least one active elements is directly electrically connected to at least one of the corresponding pads through the corresponding conductive through hole.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: April 9, 2024
    Assignee: Unimicron Technology Corp.
    Inventors: Jeng-Ting Li, Chi-Hai Kuo, Cheng-Ta Ko, Pu-Ju Lin
  • Publication number: 20240114718
    Abstract: A display panel and a display device are provided. The display panel includes a first optical refraction layer and a second optical refraction layer. The first optical refraction layer includes a plurality of openings. The second refraction layer is filled in the plurality of openings. A refractive index of the second optical refraction layer is greater than a refractive index of the first optical refraction layer. Furthermore, nanoparticles are further disposed in the second optical refraction layer. When light passes through, the first optical refraction layer and the second optical refraction layer can effectively improve transmittance rates of the light. Meanwhile, the nanoparticles can further act on the light, thereby effectively increasing a light extraction rate of the display panel and improving display effect of the display panel.
    Type: Application
    Filed: October 30, 2022
    Publication date: April 4, 2024
    Applicant: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventors: Zhiyuan YIN, Jinchuan LI, Ting SHI
  • Patent number: 11944970
    Abstract: A microfluidic detection unit comprises at least one fluid injection section, a fluid storage section and a detection section. Each fluid injection section defines a fluid outlet; the fluid storage section is in gas communication with the atmosphere and defines a fluid inlet; the detection section defines a first end in communication with the fluid outlet and a second end in communication with the fluid inlet. A height difference is defined between the fluid outlet and the fluid inlet along the direction of gravity. When a first fluid is injected from the at least one fluid injection section, the first fluid is driven by gravity to pass through the detection section and accumulate to form a droplet at the fluid inlet, such that a state of fluid pressure equilibrium of the first fluid is established.
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: April 2, 2024
    Assignees: INSTANT NANOBIOSENSORS, INC., INSTANT NANOBIOSENSORS CO., LTD.
    Inventors: Yu-Chung Huang, Yi-Li Sun, Ting-Chou Chang, Jhy-Wen Wu, Nan-Kuang Yao, Lai-Kwan Chau, Shau-Chun Wang, Ying Ting Chen
  • Patent number: 11947321
    Abstract: Disclosed are a mold assembly for making alkali metal wax packets, a method for preparing same, and a method for using same. The mold assembly comprises a silicon substrate (10), the silicon substrate (10) comprising a mold isolator (11) at the edge of the silicon substrate (10) and a silicon substrate central portion (18). The upper surface of the silicon substrate central portion (18) is indented to form a plurality of wax packet receiving cavities (12). A cavity isolator (13) locates between adjacent wax packet receiving cavities (12). A release sacrificial layer (15) is formed on the upper surface of the silicon substrate (10), and a paraffin layer (16) is formed on the upper surface of the release sacrificial layer (15) away from the silicon substrate (10). Cavities (121) for containing alkali metal are formed on a side of the paraffin layer (16) away from the release sacrificial layer (15). The mold isolator (11) is provided with corrosion release holes (14).
    Type: Grant
    Filed: November 26, 2020
    Date of Patent: April 2, 2024
    Assignee: BEIJING VACUUM ELECTONICS RESEARCH INSTITUTE
    Inventors: Xinghui Li, Ting Du, Haijun Chen, Zhongzheng Liu, Shunlu Xiao
  • Publication number: 20240101956
    Abstract: The present disclosure discloses a novel strain of Glutamicibacter, derived from insects, which efficiently degrades bifenthrin, belonging to the field of microbial strains. The Glutamicibacter CCTCC NO: M20221445 of the present disclosure was isolated from the intestinal tract of bifenthrin-resistant Ectropis grisescens Warren larvae. It exhibits unique genomic characteristics, growth and phenotypic traits, physiological and biochemical characteristics, as well as the ability to utilize and degrade bifenthrin efficiently. Specifically, it can effectively degrade bifenthrin. Based on phenotypic features, physiological and biochemical characteristics, chemical composition, and molecular biology-based polyphasic classification, Glutamicibacter CCTCC NO: M20221445 is identified as a new species. This bacterium possesses the capability to efficiently degrade bifenthrin, laying the foundation for biological control of E. grisecens and offering new microbial resources to address pesticide residue problems.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 28, 2024
    Inventors: Yanhua LONG, Xiayu Li, Ting Fang, Hao Gui, Meiqi Wang, Haiyue Wang, Yanru Bao, Anqi Shi, Yuhan Pan, Linlin Zhou, Xiaochun Wan, Yunqiu Yang
  • Publication number: 20240100068
    Abstract: In certain aspects, disclosed herein are methods of treating cancer in a subject, comprising administration to the subject of (1) one or more glucocorticoid receptor agonists and (2) one or more inhibitors of calcineurin. In some embodiments, the administration of the one or more glucocorticoid receptor agonists and the one or more inhibitors of calcineurin results in restoration of contact inhibition, increased formation of intercellular junctions, reduced cell proliferation, and/or increased vacuolization of cells growing in multilayer zones. Included herein are methods for identification of novel compounds that restore contact inhibition in cancer cells.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 28, 2024
    Inventors: Dun Yang, Thaddeus Allen, Jing Zhang, Shenqiu Zhang, Qiong Shi, Yan Long, Ting Zhang, Zhengchi He, Hongmei Li, Chenglu Yang
  • Patent number: 11942550
    Abstract: A method for manufacturing a nanosheet semiconductor device includes forming a poly gate on a nanosheet stack which includes at least one first nanosheet and at least one second nanosheet alternating with the at least one first nanosheet; recessing the nanosheet stack to form a source/drain recess proximate to the poly gate; forming an inner spacer laterally covering the at least one first nanosheet; and selectively etching the at least one second nanosheet.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien-Chang Su, Yan-Ting Lin, Chien-Wei Lee, Bang-Ting Yan, Chih Teng Hsu, Chih-Chiang Chang, Chien-I Kuo, Chii-Horng Li, Yee-Chia Yeo
  • Patent number: 11942398
    Abstract: A semiconductor device includes a substrate, at least one via, a liner layer and a conductive layer. The substrate includes an electronic circuitry. The at least one via passes through the substrate. The at least one via includes a plurality of concave portions on a sidewall thereof. The liner layer fills in the plurality of concave portions of the at least one via. The conductive layer is disposed on the sidewall of the at least one via, covers the liner layer, and extends onto a surface of the substrate. The thickness of the conductive layer on the sidewall of the at least one via is varied.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ting-Li Yang, Wen-Hsiung Lu, Jhao-Yi Wang, Fu Wei Liu, Chin-Yu Ku
  • Publication number: 20240094902
    Abstract: A method for selecting an application and associated operational guidance to utilize on a mobile device is disclosed. In one embodiment, such a method identifies a selected environment of interest. Within the selected environment, the method identifies one or more applications that are commonly utilized by users within the selected environment and documents the one or more applications. The method detects physical entry of a particular user into the selected environment and, in response to detecting the entry, automatically notifies the particular user of the one or more applications that are commonly utilized within the selected environment. In certain embodiments, the method enables the user to quickly launch the one or more applications and/or provides operational guidance to the user with regard to using the one or more applications. A corresponding system and computer program product are also disclosed.
    Type: Application
    Filed: September 20, 2022
    Publication date: March 21, 2024
    Applicant: International Business Machines Corporation
    Inventors: Xiang Wei Li, Dong Chen, Ye Chuan Wang, Ting Ting Zhan, Ju Ling Liu, Yu An, Wei Yan
  • Publication number: 20240096986
    Abstract: A method includes forming a first gate spacer and a second gate spacer on a sidewall of a first gate structure. The first gate spacer is between the second gate spacer and the first gate structure. A first interlayer dielectric (ILD) layer is formed to surround the first gate spacer, the second gate spacer, and the first gate structure. A portion of the second gate spacer and a portion of the first ILD layer are removed simultaneously. A top surface of the second gate spacer is lower than a top surface of the first ILD layer.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 21, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chung-Ting LI, Jen-Hsiang LU, Chih-Hao CHANG
  • Publication number: 20240096958
    Abstract: An embodiment is a semiconductor structure. The semiconductor structure includes a fin on a substrate. A gate structure is over the fin. A source/drain is in the fin proximate the gate structure. The source/drain includes a bottom layer, a supportive layer over the bottom layer, and a top layer over the supportive layer. The supportive layer has a different property than the bottom layer and the top layer, such as a different material, a different natural lattice constant, a different dopant concentration, and/or a different alloy percent content.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Jung-Chi Tai, Chii-Horng Li, Pei-Ren Jeng, Yen-Ru Lee, Yan-Ting Lin, Chih-Yun Chin
  • Publication number: 20240096827
    Abstract: In an embodiment, a device includes: a passivation layer on a semiconductor substrate; a first redistribution line on and extending along the passivation layer; a second redistribution line on and extending along the passivation layer; a first dielectric layer on the first redistribution line, the second redistribution line, and the passivation layer; and an under bump metallization having a bump portion and a first via portion, the bump portion disposed on and extending along the first dielectric layer, the bump portion overlapping the first redistribution line and the second redistribution line, the first via portion extending through the first dielectric layer to be physically and electrically coupled to the first redistribution line.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 21, 2024
    Inventors: Chen-Shien Chen, Ting-Li Yang, Po-Hao Tsai, Chien-Chen Li, Ming-Da Cheng