Patents by Inventor Ting Li
Ting Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12230242Abstract: Provided are a sound gathering device for voiceprint monitoring and a preparation method. The sound gathering device is a cone structure and includes a front end portion (1) and a rear end portion (2), the front end portion (1) is trumpet-shaped, an inner wall surface of the front end portion (1) is present a pattern array of a microstructure (3), and the microstructure (3) presenting the pattern array is formed through laser etching. A sound wave frequency monitored by the sound gathering device is 50 Hz˜10 kHz, and a sound wave enters the sound gathering device from an entrance of the front end portion (1), is reflected through the pattern array of the microstructure (3) on the inner wall surface of the front end portion (1), and is transmitted from an exit of the rear end portion (2), and a sound pressure of the exit of the rear end portion (2) is 4 times˜8 times a sound pressure of the entrance of the front end portion (1).Type: GrantFiled: July 20, 2023Date of Patent: February 18, 2025Assignee: State Grid Jiangsu Taizhou Power Supply CompanyInventors: Yong Li, Ting Chen, Ling Ju, Jijing Yin, Ze Zhang, Xingchun Xu, Beibei Weng, Zhenguo Chuai, Yan Wu, Li Chen, Yang Cheng, Tianyu He, Le Yuan, Jie Qian, Debao Tang, Yanquan Zhu, Anqi Ding, Kaiming Bian, Wen Chen, Wanjian Hu, Hongbo Dai, Weijun Shi
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Patent number: 12224285Abstract: An integrated circuit includes a set of active regions, a first contact, a set of gates, a first and second conductive line and a first and second via. The set of active regions extends in a first direction, and is on a first level. The first contact extends in a second direction, is on a second level, and overlaps at least a first active region. The set of gates extends in the second direction, overlaps the set of active regions, and is on a third level. The first conductive line and the second conductive line extend in the first direction, overlap the first contact, and are on a fourth level. The first via electrically couples the first contact and the first conductive line together. The second via electrically couples the first contact and the second conductive line together.Type: GrantFiled: May 31, 2022Date of Patent: February 11, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chin-Wei Hsu, Shun Li Chen, Ting Yu Chen, Hui-Zhong Zhuang, Chih-Liang Chen
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Patent number: 12224298Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit (IC) chip in which a bond pad structure extends to a columnar structure with a high via density. For example, an interconnect structure is on a frontside of a substrate and comprises a first bond wire, a second bond wire, and bond vias forming the columnar structure. The bond vias extend from the first bond wire to the second bond wire. The bond pad structure is inset into a backside of the substrate, opposite the frontside, and extends to the first bond wire. A projection of the first or second bond wire onto a plane parallel to a top surface of the substrate has a first area, and a projection of the bond vias onto the plane has a second area that is 10% or more of the first area, such that via density is high.Type: GrantFiled: August 2, 2021Date of Patent: February 11, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yu-Hsien Li, Yen-Ting Chiang, Shyh-Fann Ting, Jen-Cheng Liu, Dun-Nian Yaung
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Patent number: 12222616Abstract: Provided are a display substrate, a display module and a display device. The display substrate has a display region and a test pad region, and includes: a base; at least one pad on the base and in the test pad region; a first spacing layer on a side of the pad away from the base; multiple support parts and at least one test signal line in the test pad region and on a side of the first spacing layer away from the base, each test signal line has one end connected to one pad and another end connected to an array test device; at least two of the support parts are arranged along a first direction intersecting a direction pointing to the test pad region from the display region, each support part has a support end projecting from a surface of the test signal line away from the base.Type: GrantFiled: October 26, 2021Date of Patent: February 11, 2025Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Ting Li, Wenhua Song, Bo Wu, Zhengdong Zhang, Pengcheng Zang, Yadong Zhang
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Patent number: 12221475Abstract: Provided are a chimeric antigen receptor and an application thereof; said chimeric antigen receptor contains a domain which identifies any one of, or a combination of at least two of, the malarial protein VAR2CSA, a protein tag on malarial protein VAR2CSA, or a compound capable of labeling the malarial protein VAR2CSA. The chimeric antigen receptor can identify the VAR2CSA protein or the recombinant protein (rVAR2) of any one of, or at least two of, the domains of the VAR2CSA protein which can bind to placental-like chondroitin sulfate A (pl-CSA). The VAR2CSA protein or rVAS2 protein is capable of targeting several different types of tumor cells by means of binding to the pl-CSA on the surface of the tumor cell.Type: GrantFiled: November 29, 2017Date of Patent: February 11, 2025Assignee: CAS Lamvac (Guangzhou) Biomedical Technology Co., Ltd.Inventors: Wen Hu, Yongchao Yao, Wenzhong Guo, Yinbo Jiang, Shuozhou Huang, Ting Jiang, Jiaojiao Li, Zhu Tao, Yanli Gu, Huihui Zhang, Li Qin, Xiaoping Chen
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Publication number: 20250046686Abstract: A capacitive coupling package structure includes a first package member, a second package member, a first conductive component, a second conductive component, a first chip, and a second chip. The first package member has two first sides and two second sides that are opposite and connected to the two first sides. The first package member is covered by the second package member. The first conductive component and the second conductive component are disposed in the first package member. Portions of the first conductive component and the second conductive component extend through the two first sides to the outside of the second package member. Other portions of the first conductive component and the second conductive component are flush with the two second sides. The first chip and the second chip establish a capacitive coupling relationship through the first conductive component and the second conductive component.Type: ApplicationFiled: October 18, 2024Publication date: February 6, 2025Inventors: YOU-FA WANG, CHUN-FATT CHAN, TING-WEI KAO, GUANG-LI SONG
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Patent number: 12216901Abstract: A method for selecting an application and associated operational guidance to utilize on a mobile device is disclosed. In one embodiment, such a method identifies a selected environment of interest. Within the selected environment, the method identifies one or more applications that are commonly utilized by users within the selected environment and documents the one or more applications. The method detects physical entry of a particular user into the selected environment and, in response to detecting the entry, automatically notifies the particular user of the one or more applications that are commonly utilized within the selected environment. In certain embodiments, the method enables the user to quickly launch the one or more applications and/or provides operational guidance to the user with regard to using the one or more applications. A corresponding system and computer program product are also disclosed.Type: GrantFiled: September 20, 2022Date of Patent: February 4, 2025Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Xiang Wei Li, Dong Chen, Ye Chuan Wang, Ting Ting Zhan, Ju Ling Liu, Yu An, Wei Yan
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Patent number: 12218241Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate and a gate structure over the substrate. The semiconductor device structure also includes a spacer element covering a first sidewall of the gate structure. The semiconductor device structure further includes a source/drain portion in the substrate, and the spacer element is between the source/drain portion and the gate structure. In addition, the semiconductor device structure includes an etch stop layer covering the source/drain portion. The etch stop layer includes a first nitride layer covering the source/drain portion and having a second sidewall, and the second sidewall is in direct contact with the spacer element. The etch stop layer also includes a first silicon layer covering the first nitride layer and having a third sidewall, and the third sidewall is in direct contact with the spacer element.Type: GrantFiled: March 28, 2022Date of Patent: February 4, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chung-Ting Ko, Bo-Cyuan Lu, Jr-Hung Li, Chi-On Chui
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Publication number: 20250034277Abstract: The present invention relates to a method for preventing and/or treating thromboembolic diseases, comprising the following step: administering a coagulation factor XI (FXI) binding protein to a subject in need thereof, which binding protein can comprise at least one immunoglobulin single variable domain capable of specifically binding to FXI, wherein the at least one immunoglobulin single variable domain may comprise CDR1, CDR2, and CDR3 in a VHH as shown in any one of SEQ ID NOs: 4, 10, and 14.Type: ApplicationFiled: November 29, 2022Publication date: January 30, 2025Inventors: Ting XU, Qun YIN, Rongmei YAN, Qian LI, Yan WANG
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Publication number: 20250038359Abstract: An electrode assembly includes an electrode assembly body including positive and negative electrode plate body portions, and a separator isolating the positive electrode plate body portion from the negative electrode plate body portion, and protruding outwards at two ends of the electrode assembly body in a first direction relative to the positive and negative electrode plate body portions. Two ends of the separator in the first direction have non-contact surfaces that are not in contact with the positive or negative electrode plate body portion. The electrode assembly further includes end protective layers arranged at the two ends of the electrode assembly body in the first direction and forming an integral structure with the electrode assembly body. The end protective layer includes a separator coating portion at least partially covering the non-contact surface and directly bonded to the non-contact surface to form an integral structure with the separator.Type: ApplicationFiled: October 16, 2024Publication date: January 30, 2025Inventors: Longqing PENG, Huaichao TANG, Ting LI
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Publication number: 20250037571Abstract: An intrusion detection system and intrusion detection method are provided. The intrusion detection system includes multiple IoT devices and a central control device. The central control device is configured to obtain multiple sensing pairs from a paired combination of the multiple IoT devices; create a sensing-pair list including the multiple sensing pairs and features of each sensing pair; obtain multiple first pairs whose features satisfy a first feature condition from the sensing-pair list; dynamically schedule the multiple IoT devices to send and receive signals in a time sharing fashion to obtain a first sensing signal of each first pair; and based on a paired node of the multiple first pairs, count a first status code and a second status code of the multiple first pairs to which each paired node belongs, to determine whether any intrusion condition occurs.Type: ApplicationFiled: July 26, 2024Publication date: January 30, 2025Inventors: Chia-Lung LIU, Kuo-Hao SUNG, Hsin-Chih WANG, Ting-Wu HO, Kuei-Li HUANG
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Publication number: 20250035972Abstract: Provided is an array substrate. The array substrate us provided with a display region and a non-display region on a periphery of the display region, and includes: a base substrate; a pixel electrode and a thin-film transistor on a side of the base substrate, wherein the pixel electrode and the thin-film transistor are disposed in the display region, and the pixel electrode is disposed on a side, facing away from the base substrate, of the thin-film transistor; a first passivation layer between the pixel electrode and the thin-film transistor, wherein a plurality of first vias are defined in the first passivation layer; and a second passivation layer on a side, facing away from the base substrate, of the pixel electrode, wherein a plurality of second vias are defined in the second passivation layer.Type: ApplicationFiled: August 31, 2022Publication date: January 30, 2025Inventors: Ting WAN, Ruifang DU, Chengyong ZHAN, Na SUI, Yanlong LI
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Publication number: 20250035702Abstract: The present disclosure provides a clock control circuit and method for a circuitry. The circuitry includes a scan flip-flop circuit, an at-speed domain and a timing exception domain. The scan flip-flop circuit is configured to output data to the at-speed domain and the timing exception domain. The clock control circuit includes a first gate control circuit, a first gate circuit, a second gate control circuit and a second gate circuit. The first gate circuit is controlled by a first control signal output by the first gate control circuit, a scan enable signal and a scan mode signal to block or output a clock signal to the scan flip-flop circuit. The second gate circuit is controlled by a second control signal output by the second gate control circuit to block or output an output signal of the scan flip-flop circuit to the timing exception domain.Type: ApplicationFiled: January 18, 2024Publication date: January 30, 2025Inventors: Yu-Ting LI, Pei-Ying HSUEH, Ying-Yen CHEN
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Publication number: 20250037303Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for estimating a 3-D pose of an object of interest from image and point cloud data. In one aspect, a method includes obtaining an image of an environment; obtaining a point cloud of a three-dimensional region of the environment; generating a fused representation of the image and the point cloud; and processing the fused representation using a pose estimation neural network and in accordance with current values of a plurality of pose estimation network parameters to generate a pose estimation network output that specifies, for each of multiple keypoints, a respective estimated position in the three-dimensional region of the environment.Type: ApplicationFiled: March 22, 2024Publication date: January 30, 2025Inventors: Jingxiao Zheng, Xinwei Shi, Alexander Gorban, Junhua Mao, Andre Liang Cornman, Yang Song, Ting Liu, Ruizhongtai Qi, Yin Zhou, Congcong Li, Dragomir Anguelov
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Publication number: 20250040418Abstract: A display panel and a display device are disclosed. The display panel includes a substrate, a light-emitting element layer, a pixel defining layer, an encapsulation layer, a color filter layer, and an anti-reflection layer. The light-emitting element layer includes multiple light-emitting elements arranged in an array on the substrate. The pixel defining layer is disposed on the substrate, and every two adjacent light-emitting elements are separated by the pixel defining layer. The encapsulation layer is disposed on the light-emitting elements and the pixel defining layer. The color filter layer includes multiple color filters disposed on the encapsulation layer. The anti-reflection layer is disposed on the encapsulation layer to block external light from entering the display panel, and includes an alignment film and polarizing molecules evenly distributed within the alignment film.Type: ApplicationFiled: June 19, 2024Publication date: January 30, 2025Inventors: JING LI, Hailiang Wang, Ting Zhou, Laidi Wu, Min Huang, Tianjun Huang, Haijiang Yuan
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Publication number: 20250030126Abstract: A battery cell includes a casing, an electrode assembly, a first insulating member and a second insulating member. The inner surface of a bottom wall of the casing is connected to the inner surface of a first side wall by a first arc transition surface; a first partition portion of the first insulating member separates the electrode assembly and the first side wall; the second insulating member separates the electrode assembly and the bottom wall; in the thickness direction of the second insulating member, the separator of the electrode assembly has a stacked part located between an electrode plate and the second insulating member; and the radius R1 of the first circular arc transition surface, the thickness a1 of the first partition portion, the thickness b of the stacked part and the thickness c of the second insulating member satisfy R1?(c+b)2+4(a1)2+[(a1)*(c+b)]1/2.Type: ApplicationFiled: October 1, 2024Publication date: January 23, 2025Inventors: Lulu BAI, Ningsheng WU, Ting ZHENG, Xinxiang CHEN, Yulian ZHENG, Quankun LI
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Publication number: 20250029005Abstract: A method includes accessing a plurality of weight matrices of a machine learning model. The method also includes, for each weight matrix, decomposing the weight matrix into a U matrix, an S matrix, and a V matrix using singular value decomposition. The S matrix is a diagonal matrix, and a singular group corresponds to each element in the S matrix. The method further includes, for each weight matrix, determining an importance score of each singular group. The importance score of the singular group represents a change in loss if the singular group is removed from the machine learning model. The method also includes, for each weight matrix, ranking the singular groups across the plurality of weight matrices based on the importance scores. In addition, the method includes, for each weight matrix, identifying one or more of the singular groups to prune based on the ranking of the singular groups.Type: ApplicationFiled: May 20, 2024Publication date: January 23, 2025Inventors: Ting Hua, Xiao Li, Shangqian Gao, Yen-Chang Hsu, Yilin Shen, Hongxia Jin
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Patent number: 12203224Abstract: The present invention discloses an assembled bamboo sleeper, which is obtained by using a bamboo unit as a raw material, dried and modified at the temperature of 110-180° C., undergone coating treatment using a dopamine solution, adhesive dipping, curing and solidifying, assembling and gluing, further solidifying, further treatment using a dopamine solution, and anti-mildew and/or anti-corrosion and/or anti-insect treatment, and then fastened. The present invention further provides a preparation method for the foregoing bamboo sleeper. The bamboo sleeper prepared in the present invention is green and environmentally friendly, and applicable for ballasted tracks of railways and urban rail transit systems.Type: GrantFiled: April 18, 2019Date of Patent: January 21, 2025Assignee: HUNAN TAOHUAJIANG BAMBOO SCIENCE & TECHNOLOGY CO., LTD.Inventors: Jinbo Hu, Jian Peng, Weihong Zeng, Yanhui Xiong, Diqin Liu, Zhicheng Xue, Xianjun Li, Zhiping Wu, Shanshan Chang, Gonggang Liu, Ting Li
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Patent number: 12201076Abstract: A method for obtaining regenerated seedlings of Brassica campestris L. ssp. chinensis from embryonic tip tissues, including the following steps. A seed is inoculated to a germination medium for dark culture for 60 h. The testa, root tip, two cotyledons and middle growing point of the resultant germinated seed are removed, and an embryonic tip with a length of 3-5 mm is retained as an explant. The explant is sequentially subjected to low-temperature pre-culture in a pre-culture medium for 36 h, room-temperature shaking culture in a liquid bud induction culture medium for 10 min, and bud induction culture in a bud induction culture medium for 20 d. A regenerated plant with 5-6 leaves is transferred to a rooting medium for rooting culture for about 2 weeks, and a well-rooted plant is collected, and subjected to hardening and transplantation into a filed.Type: GrantFiled: April 30, 2024Date of Patent: January 21, 2025Assignees: Anhui Agricultural University, Yingshang Shili Ecological Agriculture Technology Co., Ltd.Inventors: Guohu Chen, Qian Yin, Ting Li, Chenggang Wang, Xiaoyan Tang, Ying Wang, Xueqing Liu, Hongwei Wen, Siwen Wu
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Patent number: 12205860Abstract: In an embodiment, a device includes: a sensor die having a first surface and a second surface opposite the first surface, the sensor die having an input/output region and a first sensing region at the first surface; an encapsulant at least laterally encapsulating the sensor die; a conductive via extending through the encapsulant; and a front-side redistribution structure on the first surface of the sensor die, the front-side redistribution structure being connected to the conductive via and the sensor die, the front-side redistribution structure covering the input/output region of the sensor die, the front-side redistribution structure having a first opening exposing the first sensing region of the sensor die.Type: GrantFiled: July 12, 2023Date of Patent: January 21, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Tsung-Hsien Chiang, Yu-Chih Huang, Ting-Ting Kuo, Chih-Hsuan Tai, Ban-Li Wu, Ying-Cheng Tseng, Chi-Hui Lai, Chiahung Liu, Hao-Yi Tsai, Chung-Shi Liu, Chen-Hua Yu