Abstract: Methods for forming under-bump metallurgy (UBM) structures having different surface profiles and semiconductor devices formed by the same are disclosed. In an embodiment, a semiconductor device includes a first redistribution line and a second redistribution line over a semiconductor substrate; a first passivation layer over the first redistribution line and the second redistribution line; a first under-bump metallurgy (UBM) structure over and electrically coupled to the first redistribution line, the first UBM structure extending through the first passivation layer, a top surface of the first UBM structure being concave; and a second UBM structure over and electrically coupled to the second redistribution line, the second UBM structure extending through the first passivation layer, a top surface of the second UBM structure being flat or convex.

Abstract: A method of forming a semiconductor device includes forming a gate structure on a semiconductor substrate. A gate spacer is formed adjacent to the gate structure. The gate spacer includes a first dielectric layer and a second dielectric layer on the first dielectric layer. A plasma treatment is performed to the second dielectric layer. After performing the plasma treatment, at least a portion of the second dielectric layer is removed such that a sidewall of the first dielectric layer is exposed. A dielectric cap is formed on the gate spacer.

Abstract: A manufacturing method of a package structure includes: forming a redistribution layer on a top surface of a glass substrate; forming a protective layer on the top surface of the glass substrate; cutting the glass substrate and the protective layer such that the glass substrate has a cutting edge, in which a crack is formed in the cutting edge of the glass substrate; and heating the protective layer such that a portion of the protective layer flows towards a bottom surface of the glass substrate to cover the cutting edge of the glass substrate and fill the crack in the cutting edge of the glass substrate.

Abstract: The present disclosure provides an array substrate and a display panel including the same. The array substrate includes a plurality of pixel units. Each of the pixel units includes a main pixel electrode, a sub-pixel electrode, a first thin film transistor (TFT) electrically connected to the sub-pixel electrode, a second TFT electrically connected to the first TFT, and a third TFT electrically connected to the main pixel electrode. The first TFT includes a first channel and a first semiconductor layer. The first channel includes two or more subchannels. The first semiconductor layer includes two or more semiconductor sublayers. Each of the semiconductor sublayers is disposed in a corresponding subchannel.

Abstract: The present disclosure provides a method for topography simulation of a physical structure under a topography-changing process. The method includes initializing a voxel mesh as a three-dimensional (3D) representation of the physical structure, generating a batch of particles, simulating a flight path of at least one of the particles with a ray-tracing method, identifying a voxel unit in the voxel mesh that intersects the flight path, determining a surface reaction between the one of the particles and the voxel unit, and adding an extra voxel unit adjacent to the voxel unit based on the determining of the surface reaction.

Abstract: The present disclosure provides a method for topography simulation of a physical structure under a topography-changing process. The method includes initializing a voxel mesh as a three-dimensional (3D) representation of the physical structure, generating a batch of particles, simulating a flight path of one of the particles with a ray-tracing method by a parallel processing thread in a hardware accelerator, identifying a surface normal of a voxel unit in the voxel mesh that intersects the flight path by the parallel processing thread, determining a surface reaction between the one of the particles and the voxel unit by a central processing unit (CPU), and updating the voxel mesh based on the determining of the surface reaction.

Abstract: A semiconductor device includes a substrate, at least one via, a liner layer and a conductive layer. The substrate includes an electronic circuitry. The at least one via passes through the substrate. The at least one via includes a plurality of concave portions on a sidewall thereof. The liner layer fills in the plurality of concave portions of the at least one via. The conductive layer is disposed on the sidewall of the at least one via, covers the liner layer, and extends onto a surface of the substrate. The thickness of the conductive layer on the sidewall of the at least one via is varied.

Abstract: A method includes forming a gate structure on a substrate; forming a gate spacer on a sidewall of the gate structure; forming a carbon-containing layer on the gate spacer; diffusing carbon from the carbon-containing layer into a portion of the substrate below the gate spacer; forming a recess in the substrate on one side of the gate spacer opposite to the gate structure; and forming an epitaxy feature in the recess of the substrate.

Abstract: A rigid-flexible coupling-driven robot for removing oxide scales on super large shaft forgings online includes a heavy-duty manipulator main body, four walking systems, a movable arm lifting system, a clamping system, a power system, two oxide scale removal systems and a visual identification system. The two oxide scale removal systems are respectively installed on the two trapezoidal plates of the clamping system. Each of the two oxide scale removal systems adopts rigid-flexible coupling drive technology, that is, the rigid drive of the overhead hydraulic cylinder, cable-stayed hydraulic cylinder, the long stroke scissor retractable bracket and the rack and pinion device is combined with the flexible drive of the wire rope, so that the retraction and the angle tilt of the parallelogram end removal device are realized, which makes the oxide scale removal more flexible and efficient, thus greatly improving the product quality of large forgings.

Abstract: A semiconductor device includes a substrate; an interconnect structure over the substrate; a first passivation layer over the interconnect structure; a first conductive pad, a second conductive pad, and a conductive line disposed over the first passivation layer and electrically coupled to conductive features of the interconnect structure; a conformal second passivation layer over and extending along upper surfaces and sidewalls of the first conductive pad, the second conductive pad, and the conductive line; a first conductive bump and a second conductive bump over the first conductive pad and the second conductive pad, respectively, where the first conductive bump and the second conductive bump extend through the conformal second passivation layer and are electrically coupled to the first conductive pad and the second conductive pad, respectively; and a dummy bump over the conductive line, where the dummy bump is separated from the conductive line by the conformal second passivation layer.

Abstract: The present invention relates to compositions comprising one or more extracts and/or compounds having retinol-like activity and properties and methods of using the compositions to treat the eye.

Abstract: A method includes forming a fin extending above an isolation region. A sacrificial gate stack having a first sidewall and a second sidewall opposite the first sidewall is formed over the fin. A first spacer is formed on the first sidewall of the sacrificial gate stack. A second spacer is formed on the second sidewall of the sacrificial gate stack. A patterned mask having an opening therein is formed over the sacrificial gate stack, the first spacer and the second spacer. The patterned mask extends along a top surface and a sidewall of the first spacer. The second spacer is exposed through the opening in the patterned mask. The fin is patterned using the patterned mask, the sacrificial gate stack, the first spacer and the second spacer as a combined mask to form a recess in the fin. A source/drain region is epitaxially grown in the recess.

Abstract: A method and a system for providing a location-based content-linking icon based on a discussion content category, and a computer-readable recording medium are provided. The system includes a server having a database and a linking-icon library. When the server receives location data from a user device, a geographic range can be determined. After querying the database according to the geographic range, one or more location-based contents correlated with a geographic location within the geographic range can be obtained. Afterwards, the linking-icon library is queried for obtaining the location-based content-linking icon that is used to be marked at the geographic location on a graphical user interface according to the category of the one or more location-based contents. The location-based content-linking icon is dynamically updated when the category of the one or more location-based contents is changed.

Abstract: The present application relates to a separator, including a porous substrate, and a coating on at least one surface of the porous substrate. The coating may include a first region and a second region, the first region including an inorganic ceramic particle and a first polymer, the second region including a second polymer, and the first region having a same thickness as the second region, where a weight content of the second polymer in the second region may be 20%-100%, based on a total weight of the second region.

Abstract: The intelligent measurement and control communication network at least includes at least one management node and at least one common node. The whole intelligent measurement and control communication network is logically divided into a control plane and a service plane. The control plane selects a routing strategy with the shortest path to cause each management node on the control plane to communicate with all common nodes. The service plane is divided into multiple task subnets according to tasks performed by each node, and each task subnet may select different routing strategies according to task requirements of this task subnet. According to the application and scenario needs of the tasks, the control plane combines externally changed parameters and utilizes machine learning to generate a new mathematical model in real time and sends a new task instruction to the service plane.

Abstract: A method includes forming a gate structure on a substrate; forming a gate spacer on a sidewall of the gate structure; forming a carbon-containing layer on the gate spacer; diffusing carbon from the carbon-containing layer into a portion of the substrate below the gate spacer; forming a recess in the substrate on one side of the gate spacer opposite to the gate structure; and forming an epitaxy feature in the recess of the substrate.

Abstract: Embodiments of the present application disclose an adhesive, a die attach film and a preparation method therefor, and relate to the technical field of chip packaging. The adhesive includes epoxy resin, phenoxy resin, an indene oligomer, filler and a curing agent; and 20-60 parts of the epoxy resin, 20-30 parts of the phenoxy resin, 5-10 parts of the indene oligomer, 15-30 parts of the filler and 1-5 parts of the curing agent are provided in parts by mass. The present application further provides the die attach film and the preparation method therefor. In the adhesive provided by the present application, the epoxy resin, the phenoxy resin and the indene oligomer are used as curable substrates to improve a thermal stress obtained after the adhesive is cured, so that the die attach film prepared therefrom is not easy to warp in a temperature change process.