Abstract: Provided are a method and apparatus for evaluating a degree of frequency regulation urgency of a generator set, a power system and a storage medium.

Abstract: An edge exposure tool may include a lens adjustment device that is capable of automatically adjusting various parameters of an edge exposure lens to account for changes in operating parameters of the edge exposure tool. In some implementations, the edge exposure tool may also include a controller that is capable of determining edge adjustment parameters for the edge exposure lens and exposure control parameters for the edge exposure tool using techniques such as big data mining, machine learning, and neural network processing. The lens adjustment device and the controller are capable of reducing and/or preventing the performance of the edge exposure tool from drifting out of tolerance, which may maintain the operation performance of the edge exposure tool and reduce the likelihood of wafer scratching, and may reduce the down-time of the edge exposure tool that would otherwise be caused by cleaning and calibration of the edge exposure lens.

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming an interconnect structure over a substrate. The method includes forming a first conductive pad and a mask layer over the interconnect structure. The mask layer covers a top surface of the first conductive pad. The method includes forming a metal oxide layer over a sidewall of the first conductive pad. The method includes forming a second conductive pad over the first conductive pad and passing through the mask layer. The first conductive pad and the second conductive pad are made of different materials.

Abstract: Embodiments are directed to probe structures, arrays, methods of using probes and arrays, and/or methods for making probes and/or arrays. In the various embodiments, probes include at least two springs separated by a movable stop while in other embodiments, three or more springs may be included with two or more movable stops. Movable stops interact with fixed stops that are either part of the probes themselves or part of separate elements that engage with the probes (such as array frame structures) that provide for the retention, longitudinal and/or lateral positioning of probes and possibly for orientation of the probes about a longitudinal axis. Fixed stops provide for controlled limits for movement of the movable stops which in turn allow for enhanced compliant or elastic performance of the probes upon increased probe compression in either one direction, in the order of tip compressions, or in both directions or tip compression orders (e.g.

Abstract: An optical fiber transmission device includes a substrate, a photonic integrated circuit, and an optical fiber assembly. The photonic integrated circuit is disposed on an area of the substrate. The substrate has a protruding structure at an interface with an edge of the photonic integrated circuit. The optical fiber assembly includes an optical fiber and a ferrule that sleeves the optical fiber. The protruding structure of the substrate is configured to abut against the ferrule to limit the position of the optical fiber assembly in a vertical direction of the substrate, such that the protruding structure is a stopper for the optical fiber assembly in the vertical direction.

Abstract: An optical fiber network device includes a fiber and a photonic integrated circuit. Fiber receives a first optical signal and transmits a second optical signal. A first wavelength of first optical signal is different from a second wavelength of second optical signal. Photonic integrated circuit includes a laser chip, a photodetector, a wavelength division multiplexing coupler, a first optical modulation element and a second optical modulation element. Laser chip is disposed on photonic integrated circuit, and is configured to generate first optical signal. Photodetector detects second optical signal. Wavelength division multiplexing coupler is configured to couple first optical signal to fiber, and receives second optical signal. First optical modulation element is coupled to wavelength division multiplexing coupler and laser chip, and is configured to modulate first optical signal.

Abstract: A memory device is provided, including an array of bit cells and a set of tracking cells. The set of tracking cells is arranged adjacent to the array of bit cells along a first direction. The set of tracking cells includes a set of first tracking cells configured to perform a read tracking operation and a set of second tracking cells configured to perform a write tracking operation and arranged adjacent to the set of first tracking cells along a second direction. First tracking cells in the set of first tracking cells are coupled in series with each other and arranged along the second direction, and second tracking cells in the set of second tracking cells are coupled in series with each other and arranged along the second direction.

Abstract: A method includes forming a pad layer. The pad layer includes a first portion over a first part of a semiconductor substrate, and a second portion over a second part of the semiconductor substrate. The first portion has a first thickness, and the second portion has a second thickness smaller than the first thickness. The semiconductor substrate is then annealed to form a first oxide layer over the first part of the semiconductor substrate, and a second oxide layer over the second part of the semiconductor substrate. The pad layer, the first oxide layer, and the second oxide layer are removed. A semiconductor layer is epitaxially grown over and contacting the first part and the second part of the semiconductor substrate.

Abstract: An optical lens structure includes an optical substrate, a predetermined processing area, an optical micro thin film and a micro thin film pattern. The optical substrate has a first surface and a second surface and rays of light passes through the optical substrate. The predetermined processing area is provided on the first surface or the second surface of the optical substrate. The micro thin optical film is formed on the predetermined processing area of the first surface or the second surface by non-contact processing with an ink liquid spot material via nozzles. The micro thin film pattern is formed from the micro thin optical film to thereby provide an optical characteristic.

Abstract: The application discloses examples of a device housing of an electronic device including a magnesium-alloy substrate. The device housing further including a treatment layer applied over the magnesium-alloy substrate and a metallic coating layer applied over the treatment layer to provide a metallic luster. Further, a paint coating layer is disposed over a first portion of the metallic coating layer. Further, a top coating layer is applied over the paint coating layer and a visible second portion of the metallic coating layer.

Abstract: The invention discloses a bamboo chip integrated material. The bamboo chip integrated material is formed by a plurality of lengthened bamboo chips which are glued and overlaid; each lengthened bamboo chip is formed by a plurality of bamboo chip units which sequentially and continuously mesh and are butted; sharp teeth and grooves are formed in the two ends in the length direction of the bamboo chip units, wherein the sharp tooth of each bamboo chip unit and the groove of the corresponding bamboo sheet unit are matched to form a meshing butt-joint part, and the meshing butt-joint parts of the adjacent lengthened bamboo chips are arranged in a staggered mode; and each bamboo chip unit has a thickness of 4-12 mm and a width of 15-50 mm.

Abstract: A semiconductor package is provided. The semiconductor package includes an encapsulating layer, a semiconductor die formed in the encapsulating layer, and an interposer structure covering the encapsulating layer. The interposer structure includes an insulating base having a first surface facing the encapsulating layer, and a second surface opposite the first surface. The interposer structure also includes insulating features formed on the first surface of the insulating base and extending into the encapsulating layer. The insulating features is arranged in a matrix and faces a top surface of the semiconductor die. The interposer structure further includes first conductive features formed on the first surface of the insulating base and extending into the encapsulating layer. The first conductive features surround the matrix of the insulating features.

Abstract: In examples, an electronic device comprises an expandable display having a primary portion and first and second auxiliary portions. The expandable display has a default mode in which the first and second auxiliary portions are hidden and an expanded mode in which the first and second auxiliary portions are visible on opposing horizontal ends of the primary portion. The electronic device includes first and second timing controllers (TCONs) to control pixels in the expandable display.

Abstract: An electrostatic sensing system configured to sense an electrostatic information of a fluid inside a fluid distribution component and including an electrostatic sensing assembly, a signal amplifier and an analog-to-digital converter. The electrostatic sensing assembly includes a sensing component, and a shield. The sensing component is configured to be disposed at the fluid distribution component. The sensing component is disposed through the fluid distribution component so as to be partially located in the fluid distribution component. The shield surrounds a part of the sensing component that is located in the fluid distribution component. At least part of the shield is located on an upstream side of the sensing component. The signal amplifier is electrically connected to the sensing component. The analog-to-digital converter is electrically connected to the signal amplifier. The shield has an opening spaced apart from the sensing component.

Abstract: The present disclosure describes an apparatus with a local interconnect structure. The apparatus can include a first transistor, a second transistor, a first interconnect structure, a second interconnect structure, and a third interconnect structure. The local interconnect structure can be coupled to gate terminals of the first and second transistors and routed at a same interconnect level as reference metal lines coupled to ground and a power supply voltage. The first interconnect structure can be coupled to a source/drain terminal of the first transistor and routed above the local interconnect structure. The second interconnect structure can be coupled to a source/drain terminal of the second transistor and routed above the local interconnect structure. The third interconnect structure can be routed above the local interconnect structure and at a same interconnect level as the first and second interconnect structures.

Abstract: Example service processing methods and apparatus are described. One example method includes obtaining a service template set by a first controller. The service template set includes one or more service templates. The first controller sends service template information corresponding to the service template set to a second controller. The first controller receives a first message sent by the second controller. The first message includes first service template information corresponding to a first service template, and the first service template information is determined by the second controller according to a requirement of a first service. The first controller performs provisioning of the first service based on the first service template that is determined based on the first service template information. The second controller determines a corresponding service template according to a service requirement, to trigger the first controller to perform service provisioning based on the service template.

Abstract: The present invention relates to the field of medical biology, and discloses a single domain antibody and derivative proteins thereof against CTLA4. In particular, the present invention discloses a CTLA4 binding protein and the use thereof, especially the use for treating and/or preventing CTLA4 relevant diseases such as tumor.

Abstract: In one example, an electronic device housing may include a substrate, an insulating adhesive layer formed on a surface of the substrate, a patterned electroless plating layer formed on the insulating adhesive layer, and a patterned electrolytic plating layer formed on the patterned electroless plating layer.

Abstract: Embodiments are directed to probe structures, arrays, methods of using probes and arrays, and/or methods for making probes and/or arrays wherein the probes include at least one flat tensional spring segment.

Abstract: An off-chip driver (OCD), including a pull-up driver and a pull-down driver, is provided. The pull-up driver and the pull-down driver are coupled to an output pad. One of the pull-up driver and the pull-down driver includes a main driving circuit, an auxiliary driving circuit, a connection circuit, and a common impedance. The main driving circuit is used to perform an output driving operation on the output pad, and the auxiliary driving circuit is used to selectively perform the output driving operation on the output pad. A first terminal of the common impedance is coupled to a driving terminal of the main driving circuit and a driving terminal of the auxiliary driving circuit through the connection circuit. A second terminal of the common impedance is coupled to the output pad.