Patents by Inventor Ting Wu

Ting Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11751591
    Abstract: A strain of Oceanobacillus picturae and applications thereof are provided, which relate to technical fields of microorganism and food processing. A strain of halophilic bacteria was screened from the brine of Xiangyang Pickled Kohlrabi and was identified as the strain of Oceanobacillus picturae by morphology, physical and chemical properties and 16S rRNA sequence. The strain is able to significantly increase the varieties and contents of volatile substances, and decrease the contents of pungent substances in pickled vegetables. The strain of Oceanobacillus picturae can improve the taste and the flavor of the pickled vegetables.
    Type: Grant
    Filed: September 5, 2020
    Date of Patent: September 12, 2023
    Assignee: Hunzhong Agricultural University
    Inventors: Xiaoyun Xu, Ting Wu, Jie Song, Siyi Pan
  • Publication number: 20230282278
    Abstract: A memory circuit includes a bias voltage generator including a first buffer configured to generate a first bias voltage based on a reference voltage and a plurality of second buffers configured to generate a plurality of second bias voltages based on the first bias voltage. The memory circuit includes a plurality of voltage clamp devices coupled to the plurality of second buffers, and each voltage clamp device is configured to apply a drive voltage to a corresponding resistance-based memory device of a plurality of resistance-based memory devices based on the corresponding second bias voltage of the plurality of second bias voltages.
    Type: Application
    Filed: May 12, 2023
    Publication date: September 7, 2023
    Inventors: Perng-Fei YUH, Shao-Ting WU, Yu-Fan LIN
  • Publication number: 20230280842
    Abstract: An input mouse may include a top button, a first wall rearward of the top button to underlie a palm of a user and a second wall forming an exterior of the input mouse. The first wall is formed from a material composition comprising a first polymer encapsulating thermally conductive particles. The second wall is formed from a thermally conductive material. A solid-state Peltier heat pump has a first face thermally coupled to the first wall and a second face thermally coupled to the second wall.
    Type: Application
    Filed: July 17, 2020
    Publication date: September 7, 2023
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Jsiao-Jou Lin, Kuan-Ting Wu, Alexander Williams
  • Publication number: 20230282260
    Abstract: A bottom-pinned spin-orbit torque magnetic random access memory (SOT-MRAM) is provided in the present invention, including a substrate, a bottom electrode layer on the substrate, a magnetic tunnel junction (MTJ) on the bottom electrode layer, a spin-orbit torque (SOT) layer on the MTJ, a capping layer on the SOT layer, and an injection layer on the capping layer, wherein the injection layer is divided into individual first part and second part, and the first part and the second part are connected respectively with two ends of the capping layer.
    Type: Application
    Filed: March 23, 2022
    Publication date: September 7, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Jian-Jhong Chen, Yi-Ting Wu, Jen-Yu Wang, Cheng-Tung Huang, Po-Chun Yang, Yung-Ching Hsieh
  • Publication number: 20230282261
    Abstract: The present invention provides a spin-orbit torque magnetic random access memory (SOT-MRAM) circuit, including a read transistor pair with two read transistors in parallel, a write transistor pair with two write transistors in parallel, a SOT memory cell with a magnetic tunnel junction (MTJ) and a SOT layer, wherein one end of the MTJ is connected to the source of the read transistor pair and the other end of the MTJ is connected to the SOT layer, and one end of the SOT layer is connected to a source line and the other of the SOT layer is connected to the source of the write transistor pair, a read bit line is connected to the drain of the read transistor pair and a write bit line is connected to the drain of the read transistor.
    Type: Application
    Filed: March 29, 2022
    Publication date: September 7, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Yen Tseng, Yu-Tse Kuo, Shu-Ru Wang, Jen-Yu Wang, Li-Ping Huang, Yi-Ting Wu, Jia-Rong Wu, Chun-Hsien Huang
  • Publication number: 20230275786
    Abstract: This application discloses a Wi-Fi communication method and a device, and relates to the field of wireless communication technologies. In the method, a first communication device is configured to: generate a first physical frame, and send the first physical frame. The first physical frame includes signaling information and a plurality of training sequences used for channel estimation, the signaling information indicates a quantity of space-time streams and a quantity of the plurality of training sequences, and the quantity of the plurality of training sequences is greater than the quantity of space-time streams. This helps improve accuracy of an algorithm such as channel estimation in a communication system, to improve a demodulation capability of a communication device, and ensure data demodulation effect.
    Type: Application
    Filed: May 10, 2023
    Publication date: August 31, 2023
    Inventors: Wei RUAN, Ting wu WANG, Qian WANG, Dan WANG, Cong CHEN
  • Publication number: 20230267035
    Abstract: Provided is a failover automation system and method comprising: obtaining, by a processor, a process inventory for a failover of an application from a first datacenter to a second data center; generating, by the processor, a data model for the failover based on the process inventor; generating, by the processor, a workflow for the failover based on the data model; assembling, by the processor, a set of one or more virtual engineers to perform the failover for the application based on the workflow; and performing, by the processor, the failover for the application with the set of one or more virtual engineers based on the workflow.
    Type: Application
    Filed: February 24, 2022
    Publication date: August 24, 2023
    Applicant: THE BANK OF NEW YORK MELLON
    Inventors: William A. HOGAN, Anil K. WELLALA, Venkata R. SUDA, Benjamin Nien-Ting WU
  • Patent number: 11736099
    Abstract: A clock detecting circuit is provided. The clock detecting circuit includes a first clock converting circuit, a second clock converting circuit and a frequency comparator. The first clock converting circuit converts an internal clock to a first clock. The second clock converting circuit converts an external clock to a second clock. The frequency comparator generates a first edge clock in response the first clock and generates a second edge clock in response the second clock. The frequency comparator generates a first sensing voltage in response to a plurality of positive pulses of the first edge clock and generate a second sensing voltage in response to a plurality of positive pulses of the second edge clock. The frequency comparator compares the first sensing voltage and the second sensing voltage to provide a frequency comparing result between the external clock and the internal clock.
    Type: Grant
    Filed: August 14, 2022
    Date of Patent: August 22, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Chang-Ting Wu
  • Publication number: 20230259179
    Abstract: The present disclosure is drawn to housings for electronic devices. In one example, a housing for an electronic device can include a rigid substrate having an exterior surface including a recessed region positioned at an opening extending through the rigid substrate connecting the recessed region to an interior surface of the rigid substrate. A conductive metal antenna is conformally carried by the recessed region and positioned at the opening.
    Type: Application
    Filed: July 27, 2020
    Publication date: August 17, 2023
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: CHI HAO CHANG, HENDRY HUANG, KUAN-TING WU
  • Publication number: 20230262969
    Abstract: The present disclosure provides a memory device, a semiconductor device, and a method of operating a memory device. A memory device includes a memory cell, a bit line, a word line, a select transistor, a fuse element, and a heater. The bit line is connected to the memory cell. The word line is connected to the memory cell. The select transistor is disposed in the memory cell. A gate of the select transistor is connected to the word line. The fuse element is disposed in the memory cell. The fuse element is connected to the bit line and the select transistor. The heater is configured to heat the fuse element.
    Type: Application
    Filed: February 16, 2022
    Publication date: August 17, 2023
    Inventors: PERNG-FEI YUH, YIH WANG, MENG-SHENG CHANG, JUI-CHE TSAI, KU-FENG LIN, YU-WEI LIN, KEH-JENG CHANG, CHANSYUN DAVID YANG, SHAO-TING WU, SHAO-YU CHOU, PHILEX MING-YAN FAN, YOSHITAKA YAMAUCHI, TZU-HSIEN YANG
  • Publication number: 20230262912
    Abstract: The present disclosure is drawn to covers for electronic devices. In one example, a cover for an electronic device can include a light metal substrate including a first surface. A first micro-arc oxidation layer may be on the first surface of the light metal substrate, the first micro-arc oxidation layer can include a cationic dye bonded to the first surface via an anionic inorganic bridging compound.
    Type: Application
    Filed: July 31, 2020
    Publication date: August 17, 2023
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: CHIEN-CHIH CHIU, HSIN-CHIEN CHU, KUAN-TING WU
  • Publication number: 20230262933
    Abstract: The present disclosure describes thermal management devices. In one example, a thermal management device can include a processing unit, a thermal grease layer directly contacting the processing unit, and a heat pipe. The heat pipe can include a heat pipe interior volume having a working fluid disposed therein, a first exterior surface directly contacting the thermal grease layer, a second exterior surface opposite from the first exterior surface, and side exterior surfaces connecting the first exterior surface and the second exterior surface. The thermal management device can also include a device cover spaced from the second exterior surface of the heat pipe by a distance from greater than 1 mm to about 5 mm, and a bracket having a clamping portion that holds the heat pipe by the side exterior surfaces of the heat pipe. The clamping portion does not extend past the first exterior surface of the heat pipe.
    Type: Application
    Filed: July 23, 2020
    Publication date: August 17, 2023
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: HENDRY HUANG, KUAN-TING WU, CHI HAO CHANG
  • Publication number: 20230253434
    Abstract: The present disclosure, in some embodiments, relates to an image sensor integrated chip. The image sensor integrated chip includes a semiconductor substrate. One or more isolation structures are arranged within one or more trenches in the semiconductor substrate. The one or more trenches are disposed along opposing sides of a photo-diode region within the semiconductor substrate. The semiconductor substrate includes an undulating exterior having rounded corners arranged laterally between neighboring ones of a plurality of flat surfaces. The rounded corners and the plurality of flat surfaces forming a plurality of triangular shaped protrusions arranged between the one or more isolation structures, as viewed along a cross-sectional view.
    Type: Application
    Filed: April 21, 2023
    Publication date: August 10, 2023
    Inventors: Tung-Ting Wu, Jhy-Jyi Sze, Yimin Huang
  • Patent number: 11721591
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a fin-shaped structure thereon; forming a single diffusion break (SDB) structure in the substrate to divide the fin-shaped structure into a first portion and a second portion; forming a first gate structure on the SDB structure; forming an interlayer dielectric (ILD) layer around the first gate structure; transforming the first gate structure into a first metal gate; removing the first metal gate to form a first recess; and forming a dielectric layer in the first recess.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: August 8, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chih-Kai Hsu, Ssu-I Fu, Chun-Ya Chiu, Chi-Ting Wu, Chin-Hung Chen, Yu-Hsiang Lin
  • Publication number: 20230243871
    Abstract: Probe array for contacting electronic components includes a plurality of probes for making contact between two electronic circuit elements and an array plate mounting and retention configuration. The probes may comprise lower retention features that protrudes from a probe body with a size and configuration that limits the longitudinal extent to which the probes can be inserted into plate probe holes of an array plate and an upper retention feature comprising at least one laterally compressible spring element at a level above the lower retention feature that, in combination with the probe body, can be made to achieve a lateral configuration that is sized to pass through the hole and thereafter elastically return to a configuration that is incapable of passing through the hole so as to retain the probe and the array plate together.
    Type: Application
    Filed: April 4, 2023
    Publication date: August 3, 2023
    Inventors: Arun S. Veeramani, Ming Ting Wu, Dennis R. Smalley
  • Publication number: 20230243872
    Abstract: Probe for making contact between two electronic circuit elements comprises a feature selected from the group consisting of: (A) at least one first tip and second tip arm supporting a shunting element that makes an electrical connection to at least one standoff while shunting current flow away from a spring element of the probe that joins a respective standoff and supports the respective tip arm, and (B) both of the first tip arm and the second tip arm support a respective shunting element that makes an electrical connection to the at least one respective standoff while shunting current flow away from a respective spring element that joins the respective standoff and supports the respective tip arm.
    Type: Application
    Filed: April 4, 2023
    Publication date: August 3, 2023
    Inventors: Arun S. Veeramani, Ming Ting Wu, Dennis R. Smalley
  • Publication number: 20230243870
    Abstract: Probe array for contacting electronic components includes a plurality of probes for making contact between two electronic circuit elements and a dual array plate mounting and retention configuration. The probes may comprise lower retention features that protrudes from a probe body with a size and configuration that limits the longitudinal extent to which the probes can be inserted into plate probe holes in the lower array plate and an upper retention feature undergoing lateral displacement relative to the upper plate probe hole such that it can no longer longitudinally pass through the extension of the upper plate probe hole in the upper array plate.
    Type: Application
    Filed: April 4, 2023
    Publication date: August 3, 2023
    Inventors: Arun S. Veeramani, Ming Ting Wu, Dennis R. Smalley
  • Publication number: 20230238961
    Abstract: The off-chip driving (OCD) device includes a signal transition detector, a front-end driver, a first main driver, a second main driver, a first resistance provider and a second resistance provider. The signal transition detector is used to detect a transition status of an input signal to generate decision information. The front-end driver generates control signals according to the decision information, and generates driving signals according to the input signal. The first main driver and the second main driver generate an output signal to a pad according to the driving signals. The first resistance provider adjusts a first resistance between the first main driver and the pad according to a first control signal. The second resistance provider adjusts a second resistance between the second main driver and the pad according to a second control signal.
    Type: Application
    Filed: January 27, 2022
    Publication date: July 27, 2023
    Applicant: NANYA TECHNOLOGY CORPORATION
    Inventor: Chang-Ting Wu
  • Publication number: 20230236154
    Abstract: A method of monitoring both liner wear and charge impact in an industrial mill uses a sensor mounted on an elongated element deployed through a shell into a liner of the mill. The elongated element wears at a same rate as the liner under conditions within the shell. Liner wear is related to a reduction in length of the elongated element as measured by travel time of an ultrasound wave, while location and strength of charge impact is related to change in amplitude of vibrations caused by the charge impact. Liner wear measurement can be improved by using shear ultrasound waves instead of conventional longitudinal ultrasound waves. A mill monitoring apparatus has a means for acquiring ultrasonic waves and audible sound waves using the same digitizer; a means for determining the angular position of the monitoring apparatus; and a means for supplying electric power to the apparatus.
    Type: Application
    Filed: June 21, 2021
    Publication date: July 27, 2023
    Inventors: Zhigang SUN, Kuo-Ting WU, Cheng HU, Silvio Elton KRÜGER
  • Patent number: 11711080
    Abstract: The off-chip driving (OCD) device includes a signal transition detector, a front-end driver, a first main driver, a second main driver, a first resistance provider and a second resistance provider. The signal transition detector is used to detect a transition status of an input signal to generate decision information. The front-end driver generates control signals according to the decision information, and generates driving signals according to the input signal. The first main driver and the second main driver generate an output signal to a pad according to the driving signals. The first resistance provider adjusts a first resistance between the first main driver and the pad according to a first control signal. The second resistance provider adjusts a second resistance between the second main driver and the pad according to a second control signal.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: July 25, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Chang-Ting Wu