Abstract: A method includes forming a fin over a substrate, forming a dummy gate structure over the fin, removing a portion of the fin adjacent the dummy gate structure to form a first recess, depositing a stressor material in the first recess, removing at least a portion of the stressor material from the first recess, and after removing the at least a portion of the stressor material, epitaxially growing a source/drain region in the first recess.

Abstract: A switch chip includes a first switch device, a first ESD protection device and a second ESD protection device. The first switch device is electrically coupled between a first pad and a second pad. The first ESD protection device is electrically coupled to a third pad which is electrically coupled to the first pad by a first bond wire. The second ESD protection device is electrically coupled to a fourth pad which is electrically coupled to the second pad by a second bond wire.

Abstract: A system for detecting molecular structures is provided. The system includes a radio frequency (RF) wireless antenna, batteryless sensor, and a network analyzer. The sensor has an ultra-high frequency dipole antenna that transmits data to the RF wireless antenna and a sensing element. The sensing element is operatively coupled to the dipolar antenna and detects molecular structures. The network analyzer receives data from the RF wireless antenna and analyzes the data to determine a concentration of molecular structures.

Abstract: The present disclosure provides an interconnect structure and a method for forming an interconnect structure. The method for forming an interconnect structure includes forming a first interlayer dielectric (ILD) layer over a substrate, forming a contact in the first ILD layer, forming a second ILD layer over the first ILD layer, forming a first opening in the second ILD layer and obtaining an exposed side surface of the second ILD layer over the contact, forming a densified dielectric layer at the exposed side surface of the second ILD layer, including oxidizing the exposed side surface of the second ILD layer by irradiating a microwave on the second ILD layer, and forming a via in contact with the densified dielectric layer.

Abstract: A battery device includes a storage battery unit, a current sensing unit, a temperature sensing unit, a storage unit and a processing unit. The current sensing unit detects load current. The temperature sensing unit detects the battery temperature of the storage battery unit. The storage unit stores a cycle number, multiple threshold intervals, and multiple charging voltage values. According to the load current, the battery temperature and the cycle number, the depth of discharge of the storage battery is acquired. The storage unit stores the load current, the battery temperature and the cycle number. The processing unit operates a charging procedure. The charging voltage value corresponding to the working threshold interval is selected to be the main charging voltage value, and the DC voltage that is identical to the main charging voltage value is used to perform a constant voltage charge for the battery unit.

Abstract: A method includes forming a fin over a substrate, forming a dummy gate structure over the fin, removing a portion of the fin adjacent the dummy gate structure to form a first recess, depositing a stressor material in the first recess, removing at least a portion of the stressor material from the first recess, and after removing the at least a portion of the stressor material, epitaxially growing a source/drain region in the first recess.

Abstract: The present invention provides a portable guidance device for cardiopulmonary resuscitation, which comprises a tri-axial gravity sensing element, a pressure sensing element, a sound output element, a visual output element and a microcontroller. The portable guidance device for cardiopulmonary resuscitation can actively connect to the medical rescue system and issue an alarm to guide the surrounding passers-by to perform real-time rescue and perform correct cardiopulmonary resuscitation, so as to improve the efficiency and accuracy of chest compressions.

Abstract: A smart battery device is provided. The smart battery device is applied to an electronic device. The smart battery device provides power for the electronic device. The smart battery device includes a battery pack, a sensing resistor, and a main management chip. The sensing resistor is configured to sense the charging and discharging of the smart battery device. The main management chip is connected to the battery pack, the sensing resistor, and the electronic device. The main management chip is configured to manage the charging and discharging of the smart battery device. When the electronic device is not turned on, if the main management chip detects a leakage event in the electronic device through the sensing resistor, the main management chip will enable the smart battery device to enter a temporary failure state, which will stop the smart battery device from discharging.

Abstract: A signal control module integrated to a low coherence interferometry including a one-dimensional (1D) array image sensor is provided. The signal control module includes an image acquisition controller and a signal controller. The image acquisition controller sends a 1D image acquisition control signal. The signal controller sends a two-dimensional (2D) image acquisition control signal, wherein the 1D and 2D image acquisition control signals are synchronized with each other. The 1D array image sensor captures 1D image information of an object-to-be-tested at different positions along a direction according to the 1D and 2D image acquisition control signals. The 1D image information constitutes 2D image information. Furthermore, a low coherence interferometry is provided.

Abstract: The present disclosure provides an interconnect structure, including a substrate having a conductive region adjacent to a gate region, a contact over the conductive region, a first interlayer dielectric layer (ILD) surrounding the contact, a via over the contact, a first densified dielectric layer surrounding the via, wherein the densified dielectric layer has a first density, and a second ILD layer over the first ILD layer and surrounding the via, wherein the second ILD layer has a second density, the first density is greater than a second density.

Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The method can include forming a fin structure over a substrate. The fin structure can include a first channel layer and a sacrificial layer. The method can further include forming a first recess structure in a first portion of the fin structure, forming a second recess structure in the sacrificial layer of a second portion of the fin structure, forming a dielectric layer in the first and second recess structures, and performing an oxygen-free cyclic etching process to etch the dielectric layer to expose the channel layer of the second portion of the fin structure.

Abstract: The battery device includes an energy storage unit, a temperature sensing unit, a storage unit, and a processing unit. The processing unit calculates the internal resistance of the energy storage unit to obtain a first increment corresponding to the internal resistance, and detects the charging voltage that is charging the battery device to obtain a second increment that corresponds to the charging voltage. The processing unit detects the discharging current of the energy storage unit to obtain a third increment corresponding to the discharging current. The processing unit further reads the cycle count from the storage unit to obtain a fourth increment that corresponds to the cycle count, reads the temperature from the temperature sensing unit to obtain a fifth increment that corresponds to the temperature, and determines the swelling rate of the battery device according to the product value of the first, second, third, fourth, and fifth increments.

Abstract: An embodiment method includes depositing a first dielectric film over and along sidewalls of a semiconductor fin, the semiconductor fin extending upwards from a semiconductor substrate. The method further includes depositing a dielectric material over the first dielectric film; recessing the first dielectric film below a top surface of the semiconductor fin to define a dummy fin, the dummy fin comprising an upper portion of the dielectric material; and forming a gate stack over and along sidewalls of the semiconductor fin and the dummy fin.

Abstract: The present invention provides a smart battery device and a charging method. The charging method includes: obtaining a battery temperature of a battery unit; determining whether the battery temperature is lower than a first preset temperature; determining whether a current capacity of the battery unit is lower than a preset capacity when the battery temperature is lower than the first preset temperature; and enabling a heating system to increase the battery temperature when the current capacity of the battery unit is lower than the preset capacity.

Abstract: A chemical mechanical planarization (CMP) system including a capacitive deionization module (CDM) for removing ions from a solution and a method for using the same are disclosed. In an embodiment, an apparatus includes a planarization unit for planarizing a wafer; a cleaning unit for cleaning the wafer; a wafer transportation unit for transporting the wafer between the planarization unit and the cleaning unit; and a capacitive deionization module for removing ions from a solution used in at least one of the planarization unit or the cleaning unit.

Abstract: A method includes forming a gate structure and an interlayer dielectric (ILD) layer over a substrate; selectively forming an inhibitor over the gate structure; performing an atomic layer deposition (ALD) process to form a dielectric layer over the ILD layer, wherein in the ALD process the dielectric layer has greater growing rate on the ILD than on the inhibitor; and performing an atomic layer etching (ALE) process to etch the dielectric layer until a top surface of the inhibitor is exposed, in which a portion of the dielectric layer remains on the ILD layer after the ALE process is complete.

Abstract: Disclosed is an apparatus for water treatment, including a membrane separator for solid-liquid separation; and a particle fractionator which has at least two exits of a fractionated solid-liquid mixture produced therein, wherein a liquor containing particles of different sizes including submicron particles is fed to the particle fractionator before a membrane separation by the membrane separator, and wherein a first fraction of the fractionated solid-liquid mixture is returned to the membrane separator from one exit of the at least two exits of the particle fractionator, the first fraction being less than the liquor in terms of content of the submicron particles. This apparatus enables a rapid achievement of suppression of membrane fouling.

Abstract: A method includes removing a dummy gate stack to form an opening between gate spacers, selectively forming an inhibitor film on sidewalls of the gate spacers, with the sidewalls of the gate spacers facing the opening, and selectively forming a dielectric layer over a surface of a semiconductor region. The inhibitor film inhibits growth of the dielectric layer on the inhibitor film. The method further includes removing the inhibitor film, and forming a replacement gate electrode in a remaining portion of the opening.

Abstract: The present disclosure provides an interconnect structure, including a substrate having a conductive region adjacent to a gate region, a contact over the conductive region, a first interlayer dielectric layer (ILD) surrounding the contact, a via over the contact, a first densified dielectric layer surrounding the via, wherein the densified dielectric layer has a first density, and a second ILD layer over the first ILD layer and surrounding the via, wherein the second ILD layer has a second density, the first density is greater than a second density.

Abstract: A chemical mechanical planarization (CMP) system including a capacitive deionization module (CDM) for removing ions from a solution and a method for using the same are disclosed. In an embodiment, an apparatus includes a planarization unit for planarizing a wafer; a cleaning unit for cleaning the wafer; a wafer transportation unit for transporting the wafer between the planarization unit and the cleaning unit; and a capacitive deionization module for removing ions from a solution used in at least one of the planarization unit or the cleaning unit.