Abstract: An embodiment method includes depositing a first dielectric film over and along sidewalls of a semiconductor fin, the semiconductor fin extending upwards from a semiconductor substrate. The method further includes depositing a dielectric material over the first dielectric film; recessing the first dielectric film below a top surface of the semiconductor fin to define a dummy fin, the dummy fin comprising an upper portion of the dielectric material; and forming a gate stack over and along sidewalls of the semiconductor fin and the dummy fin.

Abstract: Semiconductor devices and methods of forming the same are provided. A semiconductor device according to the present disclosure includes a first semiconductor channel member and a second semiconductor channel member over the first semiconductor channel member and a porous dielectric feature that includes silicon and nitrogen. In the semiconductor device, the porous dielectric feature is sandwiched between the first and second semiconductor channel members and a density of the porous dielectric feature is smaller than a density of silicon nitride.

Abstract: A semiconductor device includes a substrate, a gate structure over the substrate, gate spacers on opposite sidewalls of the gate structure, an inhibitor residue over gate structure and between the gate spacers, and source/drain structures on opposite sides of the gate structure. The inhibitor residue lines a sidewall of one of the gate spacers.

Abstract: A battery device includes a storage battery unit, a current sensing unit, a temperature sensing unit, a storage unit and a processing unit. The current sensing unit detects load current. The temperature sensing unit detects the battery temperature of the storage battery unit. The storage unit stores a cycle number, multiple threshold intervals, and multiple charging voltage values. According to the load current, the battery temperature and the cycle number, the depth of discharge of the storage battery is acquired. The storage unit stores the load current, the battery temperature and the cycle number. The processing unit operates a charging procedure. The charging voltage value corresponding to the working threshold interval is selected to be the main charging voltage value, and the DC voltage that is identical to the main charging voltage value is used to perform a constant voltage charge for the battery unit.

Abstract: The present invention relates to a thermoelectric alloy and a method for producing the same. A starting material is firstly provided, and an oxidation process is performed to the starting material to obtain an oxidized material composition. Then, the oxidized material composition and a carburizing agent are added into a quartz tube, and a sealing process is performed to the quartz tube. And then, the sealed quartz tube is subjected to a carburization process, thereby obtaining the thermoelectric alloy with excellent thermoelectric figure-of-merit.

Abstract: A method includes removing a dummy gate stack to form an opening between gate spacers, selectively forming an inhibitor film on sidewalls of the gate spacers, with the sidewalls of the gate spacers facing the opening, and selectively forming a dielectric layer over a surface of a semiconductor region. The inhibitor film inhibits growth of the dielectric layer on the inhibitor film. The method further includes removing the inhibitor film, and forming a replacement gate electrode in a remaining portion of the opening.

Abstract: A method includes performing Chemical Mechanical Polish (CMP) on a wafer, placing the wafer on a chuck, performing a post-CMP cleaning on the wafer, and determining cleanness of the wafer when the wafer is located on the chuck.

Abstract: Semiconductor devices and methods of forming the same are provided. A semiconductor device according to the present disclosure includes a first semiconductor channel member and a second semiconductor channel member over the first semiconductor channel member and a porous dielectric feature that includes silicon and nitrogen. In the semiconductor device, the porous dielectric feature is sandwiched between the first and second semiconductor channel members and a density of the porous dielectric feature is smaller than a density of silicon nitride.

Abstract: Semiconductor devices and methods of forming the same are provided. A semiconductor device according to the present disclosure includes a first semiconductor channel member and a second semiconductor channel member over the first semiconductor channel member and a porous dielectric feature that includes silicon and nitrogen. In the semiconductor device, the porous dielectric feature is sandwiched between the first and second semiconductor channel members and a density of the porous dielectric feature is smaller than a density of silicon nitride.

Abstract: A chemical mechanical planarization (CMP) system including a capacitive deionization module (CDM) for removing ions from a solution and a method for using the same are disclosed. In an embodiment, an apparatus includes a planarization unit for planarizing a wafer; a cleaning unit for cleaning the wafer; a wafer transportation unit for transporting the wafer between the planarization unit and the cleaning unit; and a capacitive deionization module for removing ions from a solution used in at least one of the planarization unit or the cleaning unit.

Abstract: Disclosed is an apparatus for water treatment, including a membrane separator for solid-liquid separation; and a particle fractionator which has at least two exits of a fractionated solid-liquid mixture produced therein, wherein a liquor containing particles of different sizes including submicron particles is fed to the particle fractionator before a membrane separation by the membrane separator, and wherein a first fraction of the fractionated solid-liquid mixture is returned to the membrane separator from one exit of the at least two exits of the particle fractionator, the first fraction being less than the liquor in terms of content of the submicron particles. This apparatus enables a rapid achievement of suppression of membrane fouling.

Abstract: A method according to some embodiments of the present disclosure includes providing a workpiece that include an opening and a top surface, depositing a dielectric material over the workpiece and into the opening to form a first dielectric layer that has a top portion over the top surface and a plug portion in the opening, treating the first dielectric layer to convert top portion into a second dielectric layer different from the first dielectric layer, and selectively removing the second dielectric layer.

Abstract: The present invention provides a smart battery device and a charging method. The charging method includes: obtaining a battery temperature of a battery unit; determining whether the battery temperature is lower than a first preset temperature; determining whether a current capacity of the battery unit is lower than a preset capacity when the battery temperature is lower than the first preset temperature; and enabling a heating system to increase the battery temperature when the current capacity of the battery unit is lower than the preset capacity.

Abstract: A method includes forming a metal layer over a substrate; forming a dielectric layer over the metal layer; removing a first portion of the dielectric layer to expose a first portion of the metal layer, while a second portion of the dielectric layer remains on the metal layer; selectively forming a first inhibitor on the second portion of the dielectric layer, while the metal layer is free of coverage by the first inhibitor; and selectively depositing a first hard mask on the exposed first portion of the metal layer, while the first inhibitor is free of coverage by the first hard mask.

Abstract: A semiconductor device includes a substrate, a gate structure over the substrate, gate spacers on opposite sidewalls of the gate structure, an inhibitor residue over gate structure and between the gate spacers, and source/drain structures on opposite sides of the gate structure. The inhibitor residue lines a sidewall of one of the gate spacers.

Abstract: A display method for reducing motion blur in a video is provided. The display method includes the following steps. Receive a video signal including multiple frames. Display the multiple frames sequentially in multiple frame intervals on a display panel, wherein each frame interval includes a vertical blanking interval and a data scan interval. Provide a backlight enable signal in each frame interval to control turning on and turning off of a backlight unit for the display panel. The backlight enable signal includes a first enable pulse and a blanking enable pulse. The first enable pulse is in the data scan interval. The blanking enable pulse is in the vertical blanking interval. The backlight unit is turned on during the first enable pulse and the blanking enable pulse.

Abstract: A crimping tool includes a base, a press handle, a slide module, a link and a fixed fix shaft. The base has two first side walls and to sliding space is defined therebetween. One end of the press handle is pivoted at an end of the base. The slide module is slidably accommodated in the sliding space and has a guiding groove. Two ends of the link are pivoted at the press handle and the slide module separately. The fix shaft is disposed across the two first side walls and inserted in the guiding groove. When the press handle drives the slide module sliding in the sliding space through the link, the guiding groove of the slide module will be guided and restricted by the fix shaft. Therefore, the guiding grooves will not be damaged and get dirt.

Abstract: A picture adjusting method includes steps of measuring a plurality of first original parameters in a first picture and measuring a plurality of second original parameters in a second picture for a plurality of color patterns; calculating a first gain factor according to the first original parameters and the second original parameters of at least one of the color patterns except a black pattern; subtracting a product of the first original parameters of the black pattern and the first gain factor from the second original parameters of the black pattern to obtain a plurality of first offset values; adding the first offset values to the first original parameters of each color pattern to obtain a plurality of first updated parameters in the first picture; and multiplying the first updated parameters by a second gain factor to obtain a plurality of first adjusted parameters in the first picture.

Abstract: A method includes forming a metal layer over a substrate; forming a dielectric layer over the metal layer; removing a first portion of the dielectric layer to expose a first portion of the metal layer, while a second portion of the dielectric layer remains on the metal layer; selectively forming a first inhibitor on the second portion of the dielectric layer, while the metal layer is free of coverage by the first inhibitor; and selectively depositing a first hard mask on the exposed first portion of the metal layer, while the first inhibitor is free of coverage by the first hard mask.

Abstract: A method includes forming a gate stack and an interlayer dielectric (ILD) over a substrate, wherein the interlayer dielectric is adjacent to the gate stack; forming an inhibitor covering the interlayer dielectric such that the gate stack is exposed from the inhibitor; performing a deposition process to form a conductive layer over the gate stack until the conductive layer starts to form on the inhibitor, in which the deposition process has a deposition selectivity for the gate stack with respect to the inhibitor; and performing an etching process to remove a portion of the conductive layer over the inhibitor.