Patents by Inventor To Hsu

To Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240173807
    Abstract: The present invention relates to a clamping and positioning module, which mainly includes a base plate, wherein the base plate has a plurality of mold cavities arranged thereon. Each mold cavity includes a clamping and positioning unit installed therein and has two air flow channels arranged therein. The base plate has two air guide ports arranged thereon, and the two air guide ports are connected with the air flow channels to control the movement of the clamping and positioning units, so that multiple clamping and positioning units can be modularly integrated on the base plate according to the demand, which can reduce the volume and weight thereof, and achieve the effect of light weight and thinning, effectively improve the overall mechanical property strength and processing precision, and simplify the assembly during the installation process.
    Type: Application
    Filed: November 24, 2022
    Publication date: May 30, 2024
    Inventor: HSU-PIN CHUANG
  • Patent number: 11996433
    Abstract: The present disclosure relates to a semiconductor structure. The semiconductor structure includes a dielectric layer having a first dielectric surface and a second dielectric surface opposite to the first dielectric surface. The dielectric layer defines a recess in the first dielectric surface, and the recess includes a sidewall of the dielectric layer. A first conductive layer contacts a bottom surface of the dielectric layer. The sidewall of the dielectric layer is directly over the first conductive layer. A second conductive layer contacts the first conductive layer and the dielectric layer. The second conductive layer vertically extends from the first conductive layer to above the dielectric layer. A third conductive layer contacts the second conductive layer. The third conductive layer is laterally separated from a sidewall of the second conductive layer that faces the third conductive layer by a non-zero distance.
    Type: Grant
    Filed: April 26, 2022
    Date of Patent: May 28, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Chun Hsu, Ching-Chun Wang, Dun-Nian Yaung, Jeng-Shyan Lin, Shyh-Fann Ting
  • Patent number: 11994727
    Abstract: A light-emitting cable structure includes a light-emitting cable, a first circuit board, second circuit board, at least one light-emitting module and a covering casing. By placing a plurality of signal groups in the light-emitting cable below a plurality of optical fibers in the light-emitting cable for a certain distance and placing the signal groups outside the vertical projection of the optical fibers towards the signal groups, the light in the optical fibers is allowed to be emitted by the vertical projection, so that users can observe the light transmitted in the optical fibers from all sides of the light-emitting cable structure, which greatly increases the attractiveness of the product to consumers.
    Type: Grant
    Filed: April 27, 2023
    Date of Patent: May 28, 2024
    Inventor: Hsu-Shen Chin
  • Patent number: 11995097
    Abstract: An energy exploration system includes a plurality of computer nodes. Each of the computer nodes includes a processor and memory coupled to the processor. The computer nodes are configured to implement a data ingestion system configured to add a data set to the energy exploration system. The data ingestion system includes a parsing subsystem, a conversion subsystem, and a publication subsystem. The parsing subsystem includes a plurality of parser instances configured to encode records of the data set as intermediate geographical object records. The conversion subsystem includes a plurality of conversion instances configured to format the intermediate geographical object records according to a sink specific specification to produce formatted geographic object records. The publication subsystem includes a plurality of publication instances configured to export the formatted geographic object records to a designated tenant.
    Type: Grant
    Filed: May 5, 2021
    Date of Patent: May 28, 2024
    Assignee: SCHLUMBERGER TECHNOLOGY CORPORATION
    Inventor: Chiao-Fang Hsu
  • Patent number: 11995691
    Abstract: Among other things, advertisements are received for brands or products of brands. Criteria for placement of the advertisements are received at online retail sites. The online retail sites are controlled independently from one another. Inventory data for the products at the online retail sites is received and stored. Data about propensities of the consumers to favor one or more of the brands or one or more products of the brands, from activities of consumers on the online retail sites, is stored. Activity data about current activities of the consumers on the online retail sites is received. One or more of the advertisements are placed on pages served to the online retail sites based on the placement data, the inventory data, the propensity data, and the activity data. Conversion data is received indicating that consumers engaged in conversion events with respect to products associated with the brands or products of brands being advertised.
    Type: Grant
    Filed: April 22, 2021
    Date of Patent: May 28, 2024
    Assignee: Jane Technologies, Inc.
    Inventors: Socrates Munaf Rosenfeld, Abraham Munaf Rosenfeld, Benjamin Aaron Green, Howard Hong, Simon James Roddy, Andrew Michael Livingston, Chunyih Hsu
  • Patent number: 11994139
    Abstract: An inflatable product includes an integrated axial-flow pump which produces a high rate of inflation. The pump includes a cover mounted to a body of the pump and selectively configurable between open and closed positions. In the open position, air is allowed to flow between the inflatable chamber and the ambient air through the pump body. When the cover is closed, the air chamber of the inflatable product is sealed with respect to the ambient air such that air is retained within the inflatable chamber when inflated. A power switch is positioned to be deactivated by the cover when the cover is mounted to the body of the pump, such that replacement of the cover during inflation or deflation of the inflatable product automatically deactivates the pump.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: May 28, 2024
    Assignee: Intex Marketing Ltd.
    Inventors: Zhi Xiong Huang, Ying Biao Zhang, Yaw Yuan Hsu
  • Patent number: 11997798
    Abstract: A package substrate and manufacturing method thereof are provided. The package substrate includes a substrate and an electronic component. The substrate includes a cavity. The electronic component is disposed in the cavity. The electronic component includes a first region and a second region, and an optical recognition rate of the first region is distinct from that of the second region.
    Type: Grant
    Filed: August 30, 2022
    Date of Patent: May 28, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wu Chou Hsu, Hsing Kuo Tien, Chih-Cheng Lee, Min-Yao Chen
  • Patent number: 11996467
    Abstract: A semiconductor device includes first and second semiconductor fins extending from a substrate and a source/drain region epitaxially grown in recesses of the first and second semiconductor fins. A top surface of the source/drain region is higher than a surface level with top surfaces of the first and second semiconductor fins. The source/drain region includes a plurality of buffer layers. Respective layers of the plurality of buffer layers are embedded between respective layers of the source/drain region.
    Type: Grant
    Filed: May 15, 2023
    Date of Patent: May 28, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tzu-Hsiang Hsu, Ting-Yeh Chen, Wei-Yang Lee, Feng-Cheng Yang, Yen-Ming Chen
  • Patent number: 11996403
    Abstract: Embodiments disclosed herein include semiconductor devices and methods of forming such devices. In an embodiment, a semiconductor device comprises a semiconductor substrate and a source. The source has a first conductivity type and a first insulator separates the source from the semiconductor substrate. The semiconductor device further comprises a drain. The drain has a second conductivity type that is opposite from the first conductivity type, and a second insulator separates the drain from the semiconductor substrate. In an embodiment, the semiconductor further comprises a semiconductor body between the source and the drain, where the semiconductor body is spaced away from the semiconductor substrate.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: May 28, 2024
    Assignee: Intel Corporation
    Inventors: Nidhi Nidhi, Rahul Ramaswamy, Walid M. Hafez, Hsu-Yu Chang, Ting Chang, Babak Fallahazad, Tanuj Trivedi, Jeong Dong Kim, Ayan Kar, Benjamin Orr
  • Patent number: 11996484
    Abstract: A semiconductor device includes a substrate, two source/drain features over the substrate, channel layers connecting the two source/drain features, and a gate structure wrapping around each of the channel layers. Each of the two source/drain features include a first epitaxial layer, a second epitaxial layer over the first epitaxial layer, and a third epitaxial layer on inner surfaces of the second epitaxial layer. The channel layers directly interface with the second epitaxial layers and are separated from the third epitaxial layers by the second epitaxial layers. The first epitaxial layers include a first semiconductor material with a first dopant. The second epitaxial layers include the first semiconductor material with a second dopant. The second dopant has a higher mobility than the first dopant.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: May 28, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Hao Lin, Chih-Hsuan Chen, Chia-Hao Pao, Chih-Chuan Yang, Chih-Yu Hsu, Hsin-Wen Su, Chia-Wei Chen
  • Patent number: 11995471
    Abstract: A resource integration method includes the following steps: a receiving module receives access information from a guest operating system on the host device; the access information is used to determine whether the frame rate is lower than a frame rate threshold; when the receiving module determines that the frame rate is lower than the frame rate threshold, the receiving module transmits an external resource request signal to the receiving module; after the receiving module receives the external resource request signal, a resource management module (which is located in the bridge module) selects an optimal external device from a specific category (among a plurality of categories in a candidate list), and a calculation operation or a storage operation corresponding to the specific category is transmitted to the optimal external device for calculation or storage by the bridge module.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: May 28, 2024
    Assignee: ACER INCORPORATED
    Inventors: Kuan-Ju Chen, Wen-Cheng Hsu, Hung-Ming Chang, Chih-Wen Huang, Chao-Kuang Yang
  • Patent number: 11996325
    Abstract: A device includes a substrate, a first dielectric layer over the substrate, a first conductive feature in the first dielectric layer, and an etch stop layer over the first dielectric layer. The etch stop layer includes metal-doped aluminum nitride. The device further includes a second dielectric layer over the etch stop layer, and a second conductive feature in the second dielectric layer. The second conductive feature extends into the etch stop layer and contacts the first conductive feature.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: May 28, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia-Ching Tsai, Yi-Wei Chiu, Li-Te Hsu
  • Patent number: 11994151
    Abstract: A guiding grid is disclosed and includes plural circumferential elements and plural radial elements. The circumferential elements are disposed concentrically relative to a central axis, spaced apart from each other in a radial direction, and form different heights relative to a bottom surface. One of the circumferential elements forms a top height relative to the bottom surface, so that the circumferential elements are divided into an outer-ring region and a central region in the radial direction. The circumferential elements located in the central region are increased in height relative to the bottom surface along the radial direction. The circumferential element located in the outer ring region are reduced in height relative to the bottom surface along the radial direction. The radial elements are connected between each of two adjacent circumferential elements. At least one of the radial elements is misaligned and discontinuous in the radial direction.
    Type: Grant
    Filed: February 24, 2023
    Date of Patent: May 28, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Wei-Ming Lai, Yi-Ta Lu, Wei-Chun Hsu
  • Patent number: 11996481
    Abstract: A semiconductor device includes a semiconductor layer. A gate structure is disposed over the semiconductor layer. A spacer is disposed on a sidewall of the gate structure. A height of the spacer is greater than a height of the gate structure. A liner is disposed on the gate structure and on the spacer. The spacer and the liner have different material compositions.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: May 28, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Huan-Chieh Su, Chih-Hao Wang, Kuo-Cheng Chiang, Wei-Hao Wu, Zhi-Chang Lin, Jia-Ni Yu, Yu-Ming Lin, Chung-Wei Hsu
  • Patent number: 11997311
    Abstract: Video processing methods and apparatuses for coding a current block generate a final predictor by combining multiple predictors of the current block. One of the predictors for the current block is a motion compensated predictor, which is generated according to one candidate selected from a first candidate list. The construction of the first candidate list includes deriving an average candidate by averaging motion information of existing candidates in the first candidate list. A second predictor for the current block is another motion compensated predictor or an intra predictor.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: May 28, 2024
    Assignee: HFI INNOVATION INC.
    Inventors: Man-Shu Chiang, Chih-Wei Hsu
  • Patent number: 11997789
    Abstract: A single-layer redistribution plate functioning as a space translator between a device under testing (“DUT”) and a testing PCB may comprise a hard ceramic plate. A DUT side of the plate may have pads configured to interface with a device under testing. Both sides of the plate may comprise traces, vias, and pads to fan out the DUT pad pattern so that the plate side opposite the DUT side has spatially translated pads configured to interface with the pads on a testing PCB. Fabricating a redistribution plate may comprise calibrating and aligning, laser milling vias, laser milling trenches and pads, copper plating, grinding and polishing, removing residual copper, and coating the copper surfaces.
    Type: Grant
    Filed: October 24, 2022
    Date of Patent: May 28, 2024
    Inventors: Dominik Schmidt, Prasanna Rao Chitturi, Jed Hsu
  • Patent number: 11996338
    Abstract: A test structure on a wafer is provided. The test structure includes a plurality of cells under test, a first output pad and a second output pad coupled to different cells, a plurality of first input pads, and a plurality of second input pads. The cells are arranged in rows and columns of a test array. Each of the first input pads is coupled to the cells in respective column of the test array. Each of the second input pads is coupled to the cells in respective row of the test array. A first voltage is applied to one of the first input pads and a second voltage is applied to one of the second input pads to turn on a cell, and a current flowing through the turned-on cell is measured.
    Type: Grant
    Filed: June 28, 2023
    Date of Patent: May 28, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jing-Yi Lin, Chih-Chuan Yang, Kuo-Hsiu Hsu, Lien-Jung Hung
  • Patent number: 11994701
    Abstract: A photosensitive module is provided, for receiving light passing through a lens in an electronic device, including a base assembly, a first plastic member, a first lead assembly, an image sensor, and an opening. The base assembly includes a substrate, an insulating layer, and a circuit layer. The substrate has a main body that includes a metal material. The first plastic member is connected to the base assembly. The first plastic member encapsulates at least part of the lead assembly. The image sensor is for receiving a light and is electrically connected to the circuit layer via the lead assembly. The opening is formed at the main body, and corresponds to the image sensor. When observed along a direction in which the light travels, the opening overlaps the image sensor.
    Type: Grant
    Filed: December 20, 2022
    Date of Patent: May 28, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chen-Er Hsu, Sin-Jhong Song
  • Patent number: D1028518
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: May 28, 2024
    Assignee: L&F Plastics, Co., Ltd.
    Inventor: Mu-Chuan Hsu
  • Patent number: D1028858
    Type: Grant
    Filed: October 5, 2021
    Date of Patent: May 28, 2024
    Assignee: Cheng Shin Rubber Industrial Co., Ltd.
    Inventors: Min-Chi Lin, Yi-Ta Lu, Yi-Zhen Huang, Ssu Yu Kuo, Yu-Hao Hsu, Jyun De Li, Yu Nan Sung, Jyun-Yi Ke