Abstract: A image coded data re-encoding apparatus for regenerated image coded data for transmission or storing by re-encoding decoded image data according to the present invention comprises an image decoder for decoding image coded data, an object for re-encoding, and an image coder for re-encoding the decoded image data, and corresponds to the configuration of international standardizing system MPEG1. The quantizer executes quantization using decoded parameters for quantization from the variable length decoder and transform coefficient inverse quantized by the inverse quantizer. The variable length coder outputs image coded data not decoded by the variable length decoder as it is. The motion compensation predictor predicts motion compensation using motion vectors decoded by the variable length decoder.

Abstract: The present invention is to provide a decoder which detects a start code in a layered coded data stream on a layer basis for improving an error detecting function to reduce possible damaging effects, and replaces a detected start code with minor error by an appropriate start code to maintain decoding.The decoder includes a unique pattern detector which detects a start code pattern in a layered coded data stream, a start code identifier which identifies the detected start code pattern based on a given condition, a similarity calculator which calculates similarity as an evaluation between the error detected start code pattern and an expected start code based on layer, and a similarity based replacement identifier which replaces the error detected start code pattern by the most appropriate replacement selected based on the similarity based evaluation, and otherwise the priority based replacement identifier which selects a replacement by the priority order.

Abstract: An interframe coding system which eliminates higher frequency components contained in an image signal effectively and adaptively with an adaptive filter provided in a coding loop. The adaptive filter eliminates the higher frequency components with the optimal filtering intensity for an image signal specified with a filtering coefficient which is decided by a filter controller. The filtering coefficient is decided by normalization of the difference between an input image signal and a predictive signal from a frame memory by the "Activity" of the input image signal or the predictive signal. The "Activity" can be based upon the sum of the absolute or squared difference values based upon the mean value of luminance intensity of pixels of the image signal.

Abstract: Data which has been decoded by a decoding portion 101 are compressed by a compressing portion 102 and stored in a prediction/display frame memory portion 103. From the data stored in the prediction/display frame memory portion 103, any data required for decoding other frames in the decoding portion 101 are decompressed through a decompressing A portion 104 and supplied to the decoding portion 101. Alternatively, data to be displayed is read from the prediction/display frame memory portion 103, decompressed at a decompressing B portion 105 and supplied to a display apparatus. Writing to and reading from the above-mentioned prediction/display frame memory portion 103 is controlled by an address controlling portion 106. Since compressed data are stored in the prediction/display frame memory portion 103, the memory capacity can be decreased.

Abstract: Data decoded by a decoding section (101) are compressed by a compressing section (102) and then stored in a forecast/display frame memory section (103). The data in the forecast/display frame memory section (103) which are required to decode the other frames in the decoding section (101) are expanded and supplied to the decoding section through an expanding A section (104). The decoding section (101) uses the data restored by the expanding operation to decode the image data subjected to the forecast encoding operation. On the other hand, the display frame is subjected to the expanding operation at an expanding B section (105) after it has been read out from the forecast/display frame memory section (103), the expanded display frame then being output and supplied to a display device. Thus, the data stored in the forecast/display frame memory section (103) can be compressed to reduce the size of memory capacity.

Abstract: A multimedia information processing system comprises an information-source coding section for generating an element packet containing coded multimedia information and additional information to specify the packet, a packet multiplexing section for generating multiplexed stream by multiplexing the element packet, and a transmission processing section for outputting the multiplexed stream as a transmission signal corresponding transmission media. In this multimedia information processing system, a processing sequence from selection of multimedia information to transmission or storage processing is classified, and the processing contents and input/output data are determined for each hierarchy. Data exchange between services such as broadcasting, communication, storage in computer and so on can be easily attained. Additionally, hardware structure of this system can be simplified, and additional functions can be easily added.

Abstract: It is an object of this invention to carry out error correcting coding for random errors and cell loss effectively and to obtain a transmitter for coding error correction codes and a receiver for decoding error correction codes on a transmission frame which minimizes transmission delay. This apparatus includes several elements. A buffer memory divides N data symbols of a data transmission cell into p blocks and stores the p data blocks for each of L cells to form a transmission frame. A check code generator carries out the error correcting coding in the unit of p blocks in a direction orthogonal to the direction of transmission. A cell composer selects a specific cell of p blocks having N data symbols and generates a transmission cell. A counter appends an identifier to the top of cells in the transmission direction. The cell with the identifier is transmitted after being replaced with a part of the coding cells as requested.

Abstract: An adaptive blocking coding system selects an effective blocking of an input image signal to be encoded in accordance with the correlation between fields, even if motion is detected between the fields. The blocking patterns include an individual field blocking, a non-interlace blocking, a split blocking and an inverted split blocking. Further, the coding system searches for motion from both odd and even fields of a frame for producing a motion compensated prediction signal in order to provide high-efficiency coding.

Abstract: A motion compensation predicting coding apparatus includes a motion detector for comparing pixel data in an image signal with pixel data of the previous image signal to generate a motion vector. The motion vector is indicative of the displacement differences between the image signal and the previous image signal. The image signal may be organized into blocks of pixel data for a single field or for multiple fields when motion detection is performed on the image signal by the motion detector. A subtracter generates a prediction compensation error signal by subtracting the pixel data in the previous image signal from the pixel data of the image signal. A coder receives the prediction compensation error signal and generates an appropriate coded output. The apparatus may also include an adaptive blocking mechanism for receiving the prediction compensation error signal and organizing the data in the signal into blocks into one of several fashions as dictated by the motion vector.

Abstract: A video codec (coder-decoder) system inputs consecutively admitted frames of sub-sampled video data obtained by sub-sampling video data in units of frames. The video data is coded in parallel by internal coding circuits. This averages the numbers of significant pixels in the sub-sampled video data to be processed. The coded video data is composed so as to comply with specifications of the receiving equipment. Upon transmission, the data is again sub-sampled depending on the number of coding circuits on the receiving side. Each block of the sub-sampled data is given a header for consecutive transmission. This allows for a certain period of time between pieces of data that arrive at the receiving side, thereby eliminating time differences in receiving and coding.

Abstract: An interframe coding system which eliminates higher frequency components contained in an image signal effectively and adaptively with an adaptive filter provided in a coding loop. The adaptive filter eliminates the higher frequency components with the optimal filtering intensity for an image signal specified with a filtering coefficient which is decided by a filter controller. The filtering coefficient is decided by normalization of the difference between an input image signal and a predictive signal from a frame memory by the "Activity" of the input image signal or the predictive signal. The "Activity" can be based upon the sum of the absolute or squared difference values based upon the mean value of luminance intensity of pixels of the image signal.

Abstract: An interframe coding system which eliminates higher frequency components contained in an image signal effectively and adaptively with an adaptive filter provided in a coding loop. The adaptive filter eliminates the higher frequency components with the optimal filtering intensity for an image signal specified with a filtering coefficient which is decided by a filter controller. The filtering coefficient is decided by normalization of the difference between an input image signal and a predictive signal from a frame memory by the "Activity" of the input image signal or the predictive signal. The "Activity" can be based upon the sum of the absolute or squared difference values based upon the mean value of luminance intensity of pixels of the image signal.

Abstract: A digital signal processor having a DMA controller adapted for image processing while transmitting data between an internal memory and an external memory. The DMA controller includes a frame horizontal size register for representing a horizontal size of a two dimensional address space and block horizontal size register for representing a horizontal size of a rectangular portion in the two dimensional address space with a block address register for indicating a head address of source area, an internal memory start address register for representing a head address of destination area, and a word register. An address calculation unit in the DMA controller generates addresses based on two horizontal size register. An external data memory connecting unit in DSP for connecting the internal memory and the external memory has two modes. One is a mode of outputting an address in two machine cycles, and the other is a mode of outputting an address in one machine cycle.

Abstract: An image coding system determines an amount a data that is output by a coder of the system and also determines a target code produced amount based on the motion of an input image. The coder of the coding system encodes the input image. A record of a data amount of past coded data is used as the inference of the target code amount. Hence, proper coding can be performed in a sending side. Further, by converting the data amount into a value with a condition to be standard, accuracy of the inference may be improved. In addition, an indication of the power amount of the data to be coded is used as a factor for determining a target code produced amount to expedite a combination of a plurality of coding modes.

Abstract: The present invention improves a digital signal processor, more particularly, calculation methods for motion compensation in reduceing a required amount of calculations when an amount of distortion between a last frame block and a current frame block; in processing a direct memory access at a higher efficiency; in processing a subdivided data calculation at a higher speed; in processing a branch instruction occurring in the pipeline process at a higher efficiency; and in processing an interruption occurring in a repeat process operation at greater convenience, and furthermore in reducing a required amount of calculations through minimum distortion searching processes hierarchized.

Abstract: A motion compensation predicting coding apparatus includes a motion detector for comparing pixel data in an image signal with pixel data of the previous image signal to generate a motion vector. The motion vector is indicative of the displacement differences between the image signal and the previous image signal. The image signal may be organized into blocks of pixel data for a single field or for multiple fields when motion detection is performed on the image signal by the motion detector. A subtracter generates a prediction compensation error signal by subtracting the pixel data in the previous image signal from the pixel data of the image signal. A coder receives the prediction compensation error signal and generates an appropriate coded output. The apparatus may also include an adaptive blocking mechanism for receiving the prediction compensation error signal and organizing the data in the signal into blocks into one of several fashions as dictated by the motion vector.

Abstract: An apparatus for decoding a received BCH code signal for correcting a combined complex error is disclosed which includes a syndrome generating circuit for generating two n-bit syndromes corresponding to the received signal, a syndrome converting circuit for converting the two n-bit syndromes to a 2n-bit syndrome, a random error correcting circuit, a burst error correcting circuit, two combining circuits and output selecting circuit. The random error correcting circuit inputs the two n-bit syndromes and outputs a random error correction signal to one of the combining circuits and the burst error correcting circuit inputs the 2n-bit syndrome and outputs a burst error correction signal to the other of the combining circuits. The combining circuits combine the correction signals to the received BCH code signal.

Abstract: The present invention improves a digital signal processor, more particularly, calculation methods for motion compensation in reduceing a required amount of calculations when an amount of distortion between a last frame block and a current frame block; in processing a direct memory access at a higher efficiency; in processing a subdivided data calculation at a higher speed; in processing a branch instruction occurring in the pipeline process at a higher efficiency; and in processing an interruption occurring in a repeat process operation at greater convenience, and furthermore in reducing a required amount of calculations through minimum distortion searching processes hierarchized.

Abstract: A .[.substrate.]. .Iadd.sub-rate .Iaddend.multimedia data transmission control system in which transmission frame bits set in a unit of a transmission frame having a repeating cycle of 8 KHz according to the present invention enables it to effect a realtime multiplexed bit allocation in the 8 kbps unit in a variable fashion such that an automatic matching of a transmission frame is achieved at an initiation of a transmission and error check bits of the error correction code are contained in a transmission frame with a satisfactory matching. In addition, the multiframe configuration according to the present invention enables it to handle in an integrated fashion the synchronizations of the voice data frame, the error correction frame, and the video data packet, which as a result minimizes the size of the buffer memories disposed to send and/or to receive motion video and which enables the transmission speed smoothing operation to be accomplished in a simple configuration through an easy control.

Abstract: An interframe video data coding and decoding apparatus utilizes a differential amplitude suppression circuit in combination with a block encoder and a motion detector to non-linearly suppress amplitude values of interframe differential block data based on a motion detection threshold value determined by an encoding control circuit. The determined threshold value is based on the amount of encoded data being stored in a transmission buffer memory. The suppressed amplitude differential block data is added to corresponding blocks in a frame memory to update the contents of the frame memory during each frame of input video data. In another embodiment, vector quantization encoders are utilized to transmit a motion vector index with encoded frame differential data.