Patents by Inventor Tokuo Kure
Tokuo Kure has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20020125207Abstract: A plasma processing method for etching a sample includes generating a plasma in a treatment chamber having a stage on which the sample is placed, wherein the plasma is generated by use of electromagnetic waves, applying an rf bias to the stage with a frequency which enables reduction of ions having an intermediate energy, and on-off modulating the rf bias so that reaction products are deposited on the sample during the off period of the rf bias.Type: ApplicationFiled: May 1, 2002Publication date: September 12, 2002Inventors: Tetsuo Ono, Tatsumi Mizutani, Ryouji Hamasaki, Tokuo Kure, Takafumi Tokunaga, Masayuki Kojima
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Publication number: 20020123229Abstract: A plasma processing method for etching a sample having a gate oxide film includes generating a plasma in a vacuum chamber using electromagnetic waves, applying an rf bias power to the sample, turning off the rf bias power before a charged voltage of the sample reaches a breakdown voltage, turning on the rf bias power after the charged voltage of the sample has substantially dropped, and repeating the turning on and off of the rf bias power to process the sample. The off-time is set at least longer than the on-time.Type: ApplicationFiled: May 1, 2002Publication date: September 5, 2002Inventors: Tetsuo Ono, Yasuhiro Nishimori, Takashi Sato, Naoyuki Kofuji, Masaru Izawa, Yasushi Goto, Ken Yoshioka, Hideyuki Kazumi, Tatsumi Mizutani, Tokuo Kure, Masayuki Kojima, Takafumi Tokunaga, Motohiko Yoshigai
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Patent number: 6355517Abstract: A semiconductor memory having a capacitor formed by utilizing a groove formed in a semiconductor substrate and an insulated gate field effect transistor and suppressing expansion of a depletion layer from the groove, and a method for fabricating the same are disclosed. An area occupied by each memory cell can be made very small and a distance between the memory cells can also be made very small, accordingly, high density integration is facilitated.Type: GrantFiled: December 23, 1993Date of Patent: March 12, 2002Assignee: Hitachi, Ltd.Inventors: Hideo Sunami, Tokuo Kure, Yoshifumi Kawamoto
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Publication number: 20010008288Abstract: A semiconductor memory device having STC cells wherein the major portions of active regions consisting of channel-forming portions are inclined at an angle of 45 degrees with respect to word lines and bit lines that meet at right angles with each other, thereby enabling the storage capacity portions to be arranged very densely and a sufficiently large capacity to be maintained with very small cell areas. Since the storage capacity portions are formed even on the bit lines, the bit lines are shielded, so that the capacity decreases between the bit lines and, hence, the memory array noise decreases. It is also possible to design the charge storage capacity portion so that a part of thereof has a form of a wall substantially vertical to the substrate in order to increase the capacity.Type: ApplicationFiled: December 18, 2000Publication date: July 19, 2001Applicant: Hitachi, Ltd.Inventors: Shinichiro Kimura, Naotaka Hashimoto, Yoshio Sakai, Tokuo Kure, Yoshifumi Kawamoto, Toru Kaga, Eiji Takeda
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Patent number: 6114695Abstract: An electron beam which can transmit through part of a specimen and can reach a portion not exposing to the electron beam is irradiated and a scanning image is obtained on the basis of a signal secondarily generated from a portion irradiated with the electron beam. Dimension-measuring start and end points are set on the scanning image and a dimension therebetween is measured. A cubic model is assumed, the cubic model is modified so as to match the scanning image, and dimension measurement is carried out on the basis of a modified cubic model.Type: GrantFiled: May 10, 1999Date of Patent: September 5, 2000Assignee: Hitachi, Ltd.Inventors: Hideo Todokoro, Kenji Takamoto, Tadashi Otaka, Fumio Mizuno, Satoru Yamada, Sadao Terakado, Katsuhiro Kuroda, Ken Ninomiya, Tokuo Kure
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Patent number: 5969357Abstract: An electron beam which can transmit through part of a specimen and can reach a portion not exposing to the electron beam is irradiated and a scanning image is obtained on the basis of a signal secondarily generated from a portion irradiated with the electron beam. Dimension-measuring start and end points are set on the scanning image and a dimension therebetween is measured. A cubic model is assumed, the cubic model is modified so as to match the scanning image, and dimension measurement is carried out on the basis of a modified cubic model.Type: GrantFiled: November 26, 1997Date of Patent: October 19, 1999Assignee: Hitachi, Ltd.Inventors: Hideo Todokoro, Kenji Takamoto, Tadashi Otaka, Fumio Mizuno, Satoru Yamada, Sadao Terakado, Katsuhiro Kuroda, Ken Ninomiya, Tokuo Kure
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Patent number: 5877498Abstract: An X-ray analyzing method for inspecting opening states of fine holes comprises the steps of: irradiating a finely converged electron beam into a first fine hole, observing an X-ray emitted from the inside of said first fine hole in order to obtain an first X-ray analysis data about the residue substance existing at the bottom of said first fine hole; irradiating a finely converged electron beam into a second fine hole, observing an X-ray emitted from the inside of said second fine hole in order to obtain an second X-ray analysis data about the residue substance existing at the bottom of said second fine hole; and comparing said first X-ray analysis data with said second X-ray analysis data, forming a judgment as to whether or not a difference between said first and second analysis data is smaller than a predetermined threshold value and using an outcome of said judgment to determine the opening states of said first and second fine holes.Type: GrantFiled: July 15, 1997Date of Patent: March 2, 1999Assignee: Hitachi, Ltd.Inventors: Aritoshi Sugimoto, Yoshimi Sudo, Tokuo Kure, Ken Ninomiya, Katsuhiro Kuroda, Takashi Nishida, Hideo Todokoro, Yasuhiro Mitsui, Hiroyasu Shichi
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Patent number: 5866904Abstract: An electron beam which can transmit through part of a specimen and can reach a portion not exposing to the electron beam is irradiated and a scanning image is obtained on the basis of a signal secondarily generated from a portion irradiated with the electron beam. Dimension-measuring start and end points are set on the scanning image and a dimension therebetween is measured. A cubic model is assumed, the cubic model is modified so as to match the scanning image, and dimension measurement is carried out on the basis of a modified cubic model.Type: GrantFiled: November 14, 1997Date of Patent: February 2, 1999Assignee: Hitachi, Ltd.Inventors: Hideo Todokoro, Kenji Takamoto, Tadashi Otaka, Fumio Mizuno, Satoru Yamada, Sadao Terakado, Katsuhiro Kuroda, Ken Ninomiya, Tokuo Kure
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Patent number: 5658811Abstract: A method of manufacturing a semiconductor device is disclosed. After an insulating film having an opening is formed on a first thin tungsten film, an impurity is introduced into the substrate through the opening to form a punch-through stopper between a source and a drain. Then, on the first tungsten film inside the opening, a second tungsten film is selectively deposited to form a gate electrode. With this method, it is possible to easily fabricate high-speed MOSFETs whose channel length is less than half a micron.Type: GrantFiled: March 17, 1995Date of Patent: August 19, 1997Assignee: Hitachi, Ltd.Inventors: Shinichiro Kimura, Hiromasa Noda, Nobuyoshi Kobayashi, Yasushi Goto, Tokuo Kure
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Patent number: 5594245Abstract: An electron beam, which can transmit through part of a specimen and can reach a portion that is not exposed to the electron beam, is irradiated, and a scanning image is obtained on the basis of a signal secondarily generated from a portion irradiated with the electron beam. Dimension-measuring start and end points are set on the scanning image and a dimension therebetween is measured. A three-dimensional model is assumed, the three-dimensional model is modified so as to match the scanning image, and dimension measurement is carried out on the basis of a modified three-dimensional model.Type: GrantFiled: February 10, 1995Date of Patent: January 14, 1997Assignee: Hitachi, Ltd.Inventors: Hideo Todokoro, Kenji Takamoto, Tadashi Otaka, Fumio Mizuno, Satoru Yamada, Sadao Terakado, Katsuhiro Kuroda, Ken Ninomiya, Tokuo Kure
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Patent number: 5594246Abstract: An X-ray analyzing method includes the steps of applying an irradiated electron beam, converged by a condenser lens and an objective lens into a thin beam, to the inside of a fine hole existing on the surface of a sample; observing X-rays generated from a residual substance existing inside the fine hole; and performing a qualitative and quantitative analysis of the residual substance. The X-rays are observed by an X-ray detector installed in an internal space of the condenser lens, an internal space of the objective lens, or between the condenser lens and the objective lens, by detecting only the X-rays radiated within the angular range -.theta. to +.theta., where .theta. is an angle formed with a center axis of the electron beam, and so defined that tan .theta. is substantially equal to a/d, where a and d are the radius and the depth of the fine hole, respectively.Type: GrantFiled: April 25, 1995Date of Patent: January 14, 1997Assignee: Hitachi, Ltd.Inventors: Yoshimi Sudo, Tokuo Kure, Ken Ninomiya, Katsuhiro Kuroda, Takashi Nishida, Hideo Todokoro, Yasuhiro Mitsui, Hiroyasu Shichi
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Patent number: 5591998Abstract: A semiconductor memory device having STC cells wherein the major portions of active regions consisting of channel-forming portions are inclined at an angle of 45 degrees with respect to word lines and bit lines that meet at right angles with each other, thereby enabling the storage capacity portions to be arranged very densely and a sufficiently large capacity to be maintained with very small cell areas. Since the storage capacity portions are formed even on the bit lines, the bit lines are shielded, so that the capacity decreases between the bit lines and, hence, the memory array noise decreases. It is also possible to design the charge storage capacity portion so that a part of thereof has a form of a wall substantially vertical to the substrate in order to increase the capacity.Type: GrantFiled: May 17, 1995Date of Patent: January 7, 1997Assignee: Hitachi, Ltd.Inventors: Shinichiro Kimura, Naotaka Hashimoto, Yoshio Sakai, Tokuo Kure, Yoshifumi Kawamoto, Toru Kaga, Eiji Takeda
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Patent number: 5583358Abstract: A semiconductor memory device having STC cells wherein the major portions of active regions consisting of channel-forming portions are inclined at an angle of 45 degrees with respect to word lines and bit lines that meet at right angles with each other, thereby enabling the storage capacity portions to be arranged very densely and a sufficiently large capacity to be maintained with very small cell areas. Since the storage capacity portions are formed even on the bit lines, the bit lines are shielded, so that the capacity decreases between the bit lines and, hence, the memory array noise decreases. It is also possible to design the charge storage capacity portion so that a part of thereof has a form of a wall substantially vertical to the substrate in order to increase the capacity.Type: GrantFiled: October 17, 1994Date of Patent: December 10, 1996Assignee: Hitachi, Ltd.Inventors: Shinichiro Kimura, Naotaka Hashimoto, Yoshio Sakai, Tokuo Kure, Yoshifumi Kawamoto, Toru Kaga, Eiji Takeda
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Patent number: 5481109Abstract: A surface analysis method and an apparatus for carrying out the samein which the method involves the detection of fluorescence X-rays emitted from the surface of a sample in response to a finely focused electron beam irradiated thereto, whereby residues on the sample surface are analyzed qualitatively and quantitatively. An electron beam (1) is irradiated through a hole (9) at the center of an X-ray detector (8) into a fine hole (h) on the surface of a sample (2). In response, fluorescence X-rays are emitted from inside the fine hole (h) and are detected by an annular X-ray detector (8) having an energy analysis function near the axis of the electron beam (1) (preferably within 20 degrees with respect to the center axis of the electron beam). This arrangement allows the fluorescence X-rays from the fine hole (h) to reach the X-ray detector (8) without being absorbed by the substance of the material.Type: GrantFiled: April 11, 1994Date of Patent: January 2, 1996Assignee: Hitachi, Ltd.Inventors: Ken Ninomiya, Hideo Todokoro, Tokuo Kure, Yasuhiro Mitsui, Katsuhiro Kuroda, Hiroyasu Shichi
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Patent number: 5412210Abstract: A technique for displaying a scanned specimen image permits non-destructive observation of a surface structure having large or precipitous unevenness, an internal structure of a specimen or a specific structure of a defect or foreign matter, which non-destructive observation has hitherto been considered to be difficult to achieve. The technique can be applied to inspection and measurement so as to economically provide devices and parts of high quality and high reliability. Thus, secondary information such as secondary electrons resulting from interaction of primary information with a specimen, the primary information being generated as a result of interaction of a scanning electron beam with the specimen, is utilized as an image signal to form an image.Type: GrantFiled: December 2, 1993Date of Patent: May 2, 1995Assignee: Hitachi, Ltd.Inventors: Hideo Todokoro, Kenji Takamoto, Tadashi Otaka, Fumio Mizuno, Satoru Yamada, Katsuhiro Kuroda, Ken Ninomiya, Tokuo Kure
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Patent number: 5374576Abstract: A semiconductor memory device having STC cells wherein the major portions of active regions consisting of channel-forming portions are inclined at an angle of 45 degrees with respect to word lines and bit lines that meet at right angles with each other, thereby enabling the storage capacity portions to be arranged very densely and a sufficiently large capacity to be maintained with very small cell areas. Since the storage capacity portions are formed even on the bit lines, the bit lines are shielded, so that the capacity decreases between the bit lines and, hence, the memory array noise decreases. It is also possible to design the charge storage capacity portion so that a part of thereof has a form of a wall substantially vertical to the substrate in order to increase the capacity.Type: GrantFiled: June 3, 1993Date of Patent: December 20, 1994Assignee: Hitachi, Ltd.Inventors: Shinichiro Kimura, Naotaka Hashimoto, Yoshio Sakai, Tokuo Kure, Yoshifumi Kawamoto, Toru Kaga, Eiji Takeda
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Patent number: 5357464Abstract: Disclosed is a semiconductor memory having a self-amplifying cell structure, using (1) a writing transistor and (2) a reading transistor with a floating gate as a charge storage node for each memory cell, and a method of fabricating the memory cell. The writing transistor and reading transistor are of opposite conductivity type to each other; for example, the writing transistor uses a P-channel MOS transistor and the reading transistor (having the floating gate) uses an N-channel MOS transistor. The floating gate of the reading transistor is connected to a single bit line through a source-drain path of the writing transistor, the source-drain path of the reading transistor is connected between the single bit line and a predetermined potential, and the gate electrodes of the writing and reading transistors are connected to a single word line. At least the reading transistor can be formed in a trench, and the word line can be formed overlying the writing transistor and the reading transistor in the trench.Type: GrantFiled: February 26, 1993Date of Patent: October 18, 1994Assignee: Hitachi, Ltd.Inventors: Shuji Shukuri, Toru Koga, Shinichiro Kimura, Digh Hisamoto, Kazuhiko Sagara, Tokuo Kure, Eiji Takeda
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Patent number: 5357131Abstract: A semiconductor memory wherein a part of each capacitor is formed on side walls of an island region surrounded with a recess formed in a semiconductor substrate, and the island region and other regions are electrically isolated by the recess.Type: GrantFiled: July 19, 1993Date of Patent: October 18, 1994Assignee: Hitachi, Ltd.Inventors: Hideo Sunami, Tokuo Kure, Yoshifumi Kawamoto, Masao Tamura, Masanobu Miyao
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Patent number: 5352324Abstract: Disclosed is an etching method and an apparatus for performing an etching by alternately and repeatedly switching an average thickness of an ion sheath and an average energy of etching ions between two different values. Since the etchant absorption to the surface of an article to be etched and the etching by ions are effectively performed, it is possible to reduce the influence of an aspect ratio on an etching depth, and hence to perform the etching with an equal depth even if the width of the opening is changed.Type: GrantFiled: October 18, 1993Date of Patent: October 4, 1994Assignee: Hitachi, Ltd.Inventors: Yasushi Gotoh, Tokuo Kure, Hiroshi Kawakami, Masanori Katsuyama, Kiyomi Yagi, Hiromichi Enami
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Patent number: 5317168Abstract: A superconducting field effect transistor which is very small in size and high in dimensional accuracy, has a first layer of material forming a control electrode and a second layer of another material is disposed on said first layer. A width of said first layer in a direction toward a superconducting source electrode and a superconducting drain electrode is narrower than a width of the second layer in the same direction. Polycrystalline silicon may be used as the control electrode while the second layer can be made of silicon nitride. Furthermore, a side surface of the control electrode may be coated with an insulator film. Accordingly, the above transistor has a fine structure gate electrode part that can be fabricated easily and accurately.Type: GrantFiled: November 19, 1992Date of Patent: May 31, 1994Assignee: Hitachi, Ltd.Inventors: Toshikazu Nishino, Ushio Kawabe, Fumio Murai, Tokuo Kure, Mutsuko Hatano, Haruhiro Hasegawa