Abstract: An image sensor may include one or more pixels having a charge steering structure that may selectively route charge from a photodiode to increase the dynamic range of the pixel. The charge steering structure may be a coupled gate structure that routes overflow charge to a voltage supply and to one or more integrating storage structures during an exposure period. The charge steering structure may be two integrating storage structures directly connected to the photodiode that each integrate charge generated by the photodiode in an alternating fashion during an exposure period. Storage structures and transistors within the charge steering structure may receive control signals, which may be asserted in a mutually exclusive manner. Pixels may also include a dual-gain structure, which may provide additional charge storage capacity.

Abstract: A pixel may include an inner sub-pixel group and an outer sub-pixel group. The inner sub-pixel group may have a smaller light collecting area than the outer sub-pixel group and therefore be less sensitive to light than the outer sub-pixel group. This may enable the pixel to be used to generate high dynamic range images, even with the sub-pixel groups using the same length integration time. The inner sub-pixel group may be nested within the outer sub-pixel group. Additionally, one or both of the inner sub-pixel group and the outer sub-pixel group can be split into at least two sub-pixels so that the sub-pixel group can be used to gather phase detection data. Adjacent pixels may have sub-pixel groups split in different directions to enable detection of vertical and horizontal edges in a scene.

Abstract: An image sensor pixel may include a photodiode, a charge storage region, a floating diffusion node, and a capacitor. A first transistor may be coupled between the photodiode and the charge storage region. A second transistor may be coupled between the charge storage region and the capacitor. The photodiode may generate image signals corresponding to incident light. Multiple image signals may be summed at the charge storage region. The second transistor may determine a portion of the image signal that may be sent to the capacitor for storage. The portion of the image signal that is sent to the capacitor may be a low gain signal. A remaining portion of the image signal may be a high gain signal. The image sensor pixel may also include readout circuitry that is configured to readout low and high gain signals stored at the floating diffusion node in a double-sampling readout operation.

Abstract: An imaging system may include an image sensor having an array of dual gain pixels. Each pixel may be operated using an improved three read method and an improved four read method such that all signals are read in a high gain configuration in order to prevent electrical offset in signal levels. Each pixel may be operated using an improved three read, two analog to digital conversion (ADC) method in which a frame buffer is used to store calibration data. Each pixel may be operated using an improved three read, three ADC method in which no frame buffer is required. A high dynamic range image signal may be produced for each pixel based on signals read from the pixel and on light conditions.

Abstract: An image sensor pixel may include a photodiode, a charge storage region, a floating diffusion node, and a capacitor. A first transistor may be coupled between the photodiode and the charge storage region. A second transistor may be coupled between the charge storage region and the capacitor. The photodiode may generate image signals corresponding to incident light. Multiple image signals may be summed at the charge storage region. The second transistor may determine a portion of the image signal that may be sent to the capacitor for storage. The portion of the image signal that is sent to the capacitor may be a low gain signal. A remaining portion of the image signal may be a high gain signal. The image sensor pixel may also include readout circuitry that is configured to readout low and high gain signals stored at the floating diffusion node in a double-sampling readout operation.

Abstract: A global shutter imaging pixel may have a single source follower transistor. The source follower transistor may be coupled to a floating diffusion region and a charge storage region. In order to read out samples from the charge storage region without including a second source follower transistor in each pixel, the samples may be transferred to floating diffusion regions of adjacent pixels. Alternatively, a transistor may be configured to transfer charge from the charge storage region to the floating diffusion region of the same pixel, thus reusing a single source follower transistor. These types of pixels may be used for correlated double sampling, where a reset charge level and integration charge level are both sampled. These pixels may also operate in a global shutter mode where images are captured simultaneously by each pixel.

Abstract: Methods and device for a readout circuit according to various aspects of the present invention may operate in conjunction with a storage device selectively coupled to an input signal having a voltage value within a first voltage range. A comparator may compare the voltage value of the input signal to a predetermined threshold voltage. A level-shifting circuit may shift the first voltage value of the input signal to a second voltage value within a second voltage range if the first voltage value of the input signal is greater than the predetermined threshold voltage.

Abstract: An analog-to-digital converter may include an integrator, a gated ring oscillator, a coarse counter, a phase state register, a counter register, and logic circuitry. The gated ring oscillator may output a phase state signal continuously to the phase state register. The phase state signal includes multiple phase nodes, each of which is created by transmitting a signal through a number of delay stages. One of the phase nodes may be provided to the coarse counter. The phase state register and counter register may store the most current corresponding phase state and coarse counter outputs, respectively. A control signal corresponding to an analog image input signal may control the output of stored phase states and stored coarse counter outputs to the logic circuitry. The logic circuitry may generate a digital version of the analog image input signal based on the outputs of the phase state and counter registers.

Abstract: An image sensor may include one or more pixels having a coupled gate structure that may selectively route overflow charge from a photodiode to increase the dynamic range of the pixel. The coupled gate structure may include two, three or four transistors. During charge accumulation in the pixel, overflow charge may pass from a photodiode to the coupled gate structure to be selectively routed to one of a plurality of paths. Timing of control signals for a subset of the transistors in the coupled gate structure may alternate such that only one transistor is active to pass charge to one of the plurality of paths at any given time. Depending on the selected path, overflow charge may be routed to a pixel voltage supply or to one or more storage nodes in the pixel. Pixels may also include a dual-gain structure, which may provide additional charge storage capacity.

Abstract: An imaging pixel may be provided with a photodiode and a floating diffusion region. The pixel may include multiple charge storage regions interposed between the photodiode and the floating diffusion region. A first charge storage region may be used to store charge from the photodiode for global shutter functionality. A second charge storage region may not be coupled to the photodiode. The second charge storage region may be used to determine how much charge is generated in the charge storage region from incident light on the charge storage region. The second charge storage region may help account for incident light noise in the first charge storage region. The second charge storage region may be the same size as the first charge storage region, or may be smaller than the first charge storage region.

Abstract: A pixel may include an inner sub-pixel group and an outer sub-pixel group. The inner sub-pixel group may have a smaller light collecting area than the outer sub-pixel group and therefore be less sensitive to light than the outer sub-pixel group. This may enable the pixel to be used to generate high dynamic range images, even with the sub-pixel groups using the same length integration time. The inner sub-pixel group may be nested within the outer sub-pixel group. Additionally, one or both of the inner sub-pixel group and the outer sub-pixel group can be split into at least two sub-pixels so that the sub-pixel group can be used to gather phase detection data. Adjacent pixels may have sub-pixel groups split in different directions to enable detection of vertical and horizontal edges in a scene.

Abstract: The image sensor pixel may include a photodiode, a charge storage region, readout circuitry, and a transfer transistor that couples the photodiode to the charge storage region. The photodiode may generate first and second image signals during first and second exposure periods, respectively. The transfer transistor may transfer the first image signal to the charge storage region. While generating the second image signal, the readout circuitry may perform readout operations on the first image signal. Thereafter, the charge storage region may be reset to a reset voltage level. The readout circuitry may perform readout operations on the reset voltage level. Then, transfer transistor may transfer the second image signal to the charge storage region. The readout circuitry may perform readout operations on the second image signal. The readout operations on both the first and second image signals may be double sampling readouts.

Abstract: An image sensor pixel may include a photodiode, a charge storage region, a floating diffusion node, and a capacitor. A first transistor may be coupled between the photodiode and the charge storage region. A second transistor may be coupled between the charge storage region and the capacitor. The photodiode may generate image signals corresponding to incident light. Multiple image signals may be summed at the charge storage region. The second transistor may determine a portion of the image signal that may be sent to the capacitor for storage. The portion of the image signal that is sent to the capacitor may be a low gain signal. A remaining portion of the image signal may be a high gain signal. The image sensor pixel may also include readout circuitry that is configured to readout low and high gain signals stored at the floating diffusion node in a double-sampling readout operation.

Abstract: An image sensor may include pixel having nested photosensitive regions. A pixel with nested photosensitive regions may include an inner photosensitive region that has a rectangular light collecting area. The inner photosensitive region may be formed in a substrate and may be surrounded by an outer photosensitive region. The pixel with nested photosensitive regions may include trunk circuitry and transistor circuitry. Trunk circuitry may include a voltage supply source, a charge storage node, and readout transistors. Trunk circuitry may be located in close proximity to both the inner and outer photosensitive regions. Transistor circuitry may couple the inner photosensitive region, the outer photosensitive region, and trunk circuitry to one another. Microlenses may be formed over the nested photosensitive groups. Hybrid color filters having a single color filter region over the inner photosensitive region and a portion of the outer photosensitive region may also be used.

Abstract: An image sensor may include one or more pixels having a charge steering structure that may selectively route charge from a photodiode to increase the dynamic range of the pixel. The charge steering structure may be a coupled gate structure that routes overflow charge to a voltage supply and to one or more integrating storage structures during an exposure period. The charge steering structure may be two integrating storage structures directly connected to the photodiode that each integrate charge generated by the photodiode in an alternating fashion during an exposure period. Storage structures and transistors within the charge steering structure may receive control signals, which may be asserted in a mutually exclusive manner. Pixels may also include a dual-gain structure, which may provide additional charge storage capacity.

Abstract: An analog-to-digital converter may include an integrator, a gated ring oscillator, a coarse counter, a phase state register, a counter register, and logic circuitry. The gated ring oscillator may output a phase state signal continuously to the phase state register. The phase state signal includes multiple phase nodes, each of which is created by transmitting a signal through a number of delay stages. One of the phase nodes may be provided to the coarse counter. The phase state register and counter register may store the most current corresponding phase state and coarse counter outputs, respectively. A control signal corresponding to an analog image input signal may control the output of stored phase states and stored coarse counter outputs to the logic circuitry. The logic circuitry may generate a digital version of the analog image input signal based on the outputs of the phase state and counter registers.

Abstract: An image sensor may include pixel having nested photosensitive regions. A pixel with nested photosensitive regions may include an inner photosensitive region that has a rectangular light collecting area. The inner photosensitive region may be formed in a substrate and may be surrounded by an outer photosensitive region. The pixel with nested photosensitive regions may include trunk circuitry and transistor circuitry. Trunk circuitry may include a voltage supply source, a charge storage node, and readout transistors. Trunk circuitry may be located in close proximity to both the inner and outer photosensitive regions. Transistor circuitry may couple the inner photosensitive region, the outer photosensitive region, and trunk circuitry to one another. Microlenses may be formed over the nested photosensitive groups. Hybrid color filters having a single color filter region over the inner photosensitive region and a portion of the outer photosensitive region may also be used.

Abstract: An image sensor may have an array of pixels that include nested sub-pixels that each have at least one respective photodiode. An inner sub-pixel of a pixel with nested sub-pixels may have a relatively lower effective light collecting area compared to an outer sub-pixel of the pixel within which the inner sub-pixel is nested. A pixel circuit for the nested sub-pixels may include an overflow capacitor and/or a coupled gate circuit used to route charges from the photodiode in the inner sub-pixel. The lower light collecting area of the photodiode in the inner sub-pixel, with optional flicker mitigation charge routing from the coupled gates structure, may reduce the size of the capacitors required to capture photodiode and photodiode overflow charge responses. Flicker mitigation charge routing using a coupled gates structure may allow an adjustable proportion of the overflow charge to be stored in one or more storage capacitors.

Abstract: An image sensor may include an array of pixels arranged in rows and columns. The array of pixels may operate in a global shutter mode. Each pixel in the array of pixels may have a floating diffusion node for storing charge and may include an active reset circuit that acts as an inverting amplifier and that resets the floating diffusion node to a predetermined reference voltage, which eliminates the need for correlated double sampling readout. A sampling circuit may be coupled to the active reset circuit. The sampling circuit may sample and store signals that correspond to the amount of charge stored at the floating diffusion node. The sampling circuit may pass stored signals to a column sensing line through an amplifier. The amplifier may include a source follower transistor that provides proportional amplification to the stored signals and may include an active reset circuit for resetting the sampling circuit.

Abstract: An image sensor may include one or more pixels having a coupled gate structure that may selectively route overflow charge from a photodiode to increase the dynamic range of the pixel. The coupled gate structure may include two, three or four transistors. During charge accumulation in the pixel, overflow charge may pass from a photodiode to the coupled gate structure to be selectively routed to one of a plurality of paths. Timing of control signals for a subset of the transistors in the coupled gate structure may alternate such that only one transistor is active to pass charge to one of the plurality of paths at any given time. Depending on the selected path, overflow charge may be routed to a pixel voltage supply or to one or more storage nodes in the pixel. Pixels may also include a dual-gain structure, which may provide additional charge storage capacity.