Abstract: A storage device capable of reducing a number of cycles necessary for a verify at a time of multi-value recording is provided. An initial value of a potential difference VCG between a gate and a source of a switching transistor at the time of the verify is set to a value varied in accordance with a resistance value level of multi-value information. In the case where a writing side performs a 3-value recording, when “01” is the information, an initial value VGS01 is set to be smaller than VGS=1.7 V corresponding to the target resistance value level “01”, and when “00” is the information, a value is set to be lower than VGS=2.2 V corresponding to the target resistance value level “00” and higher than the above-described VGS01. This can reduce the number of cycles necessary for the verify process.

Abstract: A memory element 10 includes a memory layer 4 positioned between a first electrode 2 and a second electrode 6, in which an element selected from Cu, Ag, and Zn is contained in the memory layer 4 or in a layer 3 in contact with the memory layer 4, a resistance of the memory element 10 is changed by a voltage applied to the memory element 10 to perform recording of information, and in an erasing process of changing from a recorded state of low resistance value of the memory element 10 to an erased state of high resistance value of the memory element 10, a fluctuation, which is caused by an increase of the voltage applied to the memory element 10, of the resistance value of the memory element 10 at the end of the erasing process is within ten times at a maximum.

Abstract: A memory element 10 includes a memory layer 4 positioned between a first electrode 2 and a second electrode 6, in which an element selected from Cu, Ag, and Zn is contained in the memory layer 4 or in a layer 3 in contact with the memory layer 4, a resistance of the memory element 10 is changed by a voltage applied to the memory element 10 to perform recording of information, and in an erasing process of changing from a recorded state of low resistance value of the memory element 10 to an erased state of high resistance value of the memory element 10, a fluctuation, which is caused by an increase of the voltage applied to the memory element 10, of the resistance value of the memory element 10 at the end of the erasing process is within ten times at a maximum.

Abstract: Disclosed herein is a nonvolatile semiconductor memory device including a plurality of memory cells; and a driver circuit configured to perform a verify write operation in a cycle including selecting from an array of the plurality of memory cells a predetermined number of memory cells constituting a write cell unit, writing data collectively to the predetermined number of memory cells, and verifying the written data, the driver circuit further performing the verify write operation repeatedly until all memory cells within the write cell unit are found to have passed the verification.

Abstract: A memory device 10 has an arrangement in which a memory thin film 4 is sandwiched between first and second electrodes 2 and 6, the memory thin film 6 contains at least rare earth elements, the memory thin film 4 or a layer 3 in contact with the memory thin film 4 contains any one of elements selected from Cu, Ag, Zn and the memory thin film 4 or the layer 3 in contact with the memory thin film 4 contains any one of elements selected from Te, S, Se. The memory device can record and read information with ease stably, and this memory device can be manufactured easily by a relatively simple manufacturing method.

Abstract: A memory device 10 has an arrangement in which a memory thin film 4 is sandwiched between first and second electrodes 2 and 6, the memory thin film 6 contains at least rare earth elements, the memory thin film 4 or a layer 3 in contact with the memory thin film 4 contains any one of elements selected from Cu, Ag, Zn and the memory thin film 4 or the layer 3 in contact with the memory thin film 4 contains any one of elements selected from Te, S, Se. The memory device can record and read information with ease stably, and this memory device can be manufactured easily by a relatively simple manufacturing method.

Abstract: A memory apparatus is provided that includes a storage element configured to store and retain information based on the state of an electric resistance, and a circuit element connected in series to the storage element as a load. In the memory apparatus, a resistance value is set to one of a plurality of different levels by controlling a voltage or a current applied to the circuit element or the storage element upon the writing. The storage element includes levels having low resistance values and levels having high resistance values obtained after erasing, to each of which different information is allocated. One storage element may store information having a ternary value or more. When erasing the information from the levels excluding the level having the lowest resistance value, a level is initially changed to the level having the lowest resistance value, and subsequently changed to that having a higher resistance value.

Abstract: A method of driving a storage device including a variable resistance element in which resistance value is changed reversibly between a high resistance state and a low resistance state by applying voltages with different polarities between two electrodes is provided. The storage device includes a plurality of memory cells formed of the variable resistance elements. The method includes the step of applying voltages more than once in combination to the memory cell when the variable resistance element is changed from the low resistance state to the high resistance state.

Abstract: It is intended to provide a storage element having an arrangement which becomes able to be manufactured easily with high density. A storage element includes resistance changing elements 10 having recording layers 2, 3 provided between two electrodes 1, 4 and in which resistance values of the recording layers 2, 3 are reversibly changed with application of electric potential with different polarities to these two electrodes 1, 4, at least part of the layers 2, 3 constructing the recording layers of the resistance changing elements 10 being formed commonly by the same layer in a plurality of adjacent memory cells.

Abstract: A memory device of a resistance variation type, in which data retaining characteristic at the time of writing is improved, is provided. The memory device includes: a plurality of memory elements in which a memory layer is provided between a first electrode and a second electrode so that data is written or erased in accordance with a variation in electrical characteristics of the memory layer; and pulse applying means applying a voltage pulse or a current pulse selectively to the plurality of memory elements. The memory layer includes an ion source layer including an ionic-conduction material and at least one kind of metallic element, and the ion source layer further contains oxygen.

Abstract: A memory element having a configuration in which contents of recorded data can be judged easily and power consumption can be reduced, and a method of driving the same are provided. A memory element 10 of the present invention includes variable resistance elements 11 and 12 whose resistance state changes reversibly between a high resistance state and a low resistance state by applying a voltage of a different polarity between an electrode 1 of one side and an electrode 2 of the other side; the electrode 1 of one side in each element of the two variable resistance elements 11 and 12 is made a common electrode; and the electrode 2 of the other side in each element of the two variable resistance elements 11 and 12 is made independent and is provided respectively with the terminal X and terminal Y, to form a memory cell having two terminals in total.

Abstract: A storage device includes a storage element having characteristics such that the resistance value thereof changes from a high state to a low state as a result of an electrical signal higher than or equal to a first threshold signal being applied and changes from a low state to a high state as a result of an electrical signal higher than or equal to a second threshold signal whose polarity differs from that of the first threshold signal being applied; and a circuit element that is connected in series to the storage element and that serves as a load, the storage element and the circuit element forming a memory cell, and the memory cells being arranged in a matrix, wherein the resistance value of the circuit element when the storage element is read differs from the resistance value when the storage element is written or erased.

Abstract: A memory element 10 includes a memory layer 4 positioned between a first electrode 2 and a second electrode 6, in which an element selected from Cu, Ag, and Zn is contained in the memory layer 4 or in a layer 3 in contact with the memory layer 4, a resistance of the memory element 10 is changed by a voltage applied to the memory element 10 to perform recording of information, and in an erasing process of changing from a recorded state of low resistance value of the memory element 10 to an erased state of high resistance value of the memory element 10, a fluctuation, which is caused by an increase of the voltage applied to the memory element 10, of the resistance value of the memory element 10 at the end of the erasing process is within ten times at a maximum.

Abstract: It is intended to provide a storage element having an arrangement which becomes able to be manufactured easily with high density. A storage element includes resistance changing elements 10 having recording layers 2, 3 provided between two electrodes 1, 4 and in which resistance values of the recording layers 2, 3 are reversibly changed with application of electric potential with different polarities to these two electrodes 1, 4, at least part of the layers 2, 3 constructing the recording layers of the resistance changing elements 10 being formed commonly by the same layer in a plurality of adjacent memory cells.

Abstract: A memory apparatus is provided that includes a storage element configured to store and retain information based on the state of an electric resistance, and a circuit element connected in series to the storage element as a load. In the memory apparatus, a resistance value is set to one of a plurality of different levels by controlling a voltage or a current applied to the circuit element or the storage element upon the writing. The storage element includes levels having low resistance values and levels having high resistance values obtained after erasing, to each of which different information is allocated. One storage element may store information having a ternary value or more. When erasing the information from the levels excluding the level having the lowest resistance value, a level is initially changed to the level having the lowest resistance value, and subsequently changed to that having a higher resistance value.

Abstract: A method of driving a storage device including a variable resistance element in which resistance value is changed reversibly between a high resistance state and a low resistance state by applying voltages with different polarities between two electrodes is provided. The storage device includes a plurality of memory cells formed of the variable resistance elements. The method includes the step of applying voltages more than once in combination to the memory cell when the variable resistance element is changed from the low resistance state to the high resistance state.

Abstract: A storage apparatus includes memory devices each having a storage element with a characteristic that the application of an electric signal not lower than a first threshold signal allows the storage element to shift from a high resistance value state to a low resistance value state, and that the application of an electric signal not lower than a second threshold signal, which has a polarity different from that of the first threshold signal, allows the storage element to shift form a low resistance value state to a high resistance value state, and a circuit element connected to the storage element in series to be a load; wherein the memory devices are arranged in a matrix and one terminal of each of the memory devices is connected to a common line; and wherein an intermediate potential between a power supply potential and a ground potential is applied to the common line.

Abstract: The present invention provides a storage apparatus including a variable resistance element having a recording layer between two electrodes. In the variable resistance element, a resistance value of the recording layer is reversibly changed to one of a value in a high-resistance state and a value in a low-resistance state by applying potentials of different polarities to the two electrodes. An absolute value of a threshold value of an applied signal at a time of change from the high-resistance state to the low-resistance state and an absolute value of a threshold value of an applied signal at a time of change from the low-resistance state to the high-resistance state differ from each other. A reading signal for detecting the resistance value of the recording layer in the variable resistance element is applied with a polarity of one of the threshold values of the applied signals which one has a higher absolute value and with a value lower than the absolute value.

Abstract: A memory device is provided in which recording of multi-valued data can be performed at a high speed and the recording of multi-valued data can be performed with a drive circuit having comparatively simple configuration.

Abstract: A memory device is obtained in which stable recording of information can be performed and a period of time required for the recording of information can be shortened.