Abstract: For providing a cheap semiconductor memory device with improving reliability by level of a cell, in the place of escaping from defects on memory cells electrically, through such as ECC, and further for providing a cell structure enabling scaling-down in the vertical direction with maintaining the reliability, in a semiconductor memory device, upon which high-speeded read-out operation is required, a charge storage region is constructed with particles made from a large number of semiconductor charge storage small regions, each being independent, thereby increasing the reliability by the cell level.

Abstract: After receiving job data from an information processing terminal, job data wherein an output device is designated as an output destination, a server preserves therein the job data until the moment when an output processing for the job data becomes practicable on the device of the output destination, then, creates second job data representing a replication of the job data before the transfer of the job data to the output device is started, and it conducts changing process for the second job data representing a replication, when it receives an instruction for changing an output destination and output setting, after the transfer. Further, the job data are preserved in the output control server until the moment when the print processing is completed at the output destination, so that they may cope with changing operations for a period up to completion of printing.

Abstract: There is described a data outputting system and an output controlling server, in which operations for the job already introduced in the system, such as a changing operation of the output destination of the job, etc., can be achieved by a simple operation conducted by the user. The server includes a communication section to receive a job and an output instruction, a storage to store the job received by the communication section while correlating the job with output destination information and a control section to control managing and communicating operations of the job. The control section controls a transferring operation for transferring the job to the specific output apparatus, corresponding to a time when an implementation for processing the job is enabled in the specific output apparatus represented by the output destination information, which is correlated with the job stored in the storage.

Abstract: When the use frequencies of the commands or data pieces of the second group are not larger than those of the commands or data pieces of the first group as the result of sorting, displaying the commands or data pieces of the second group in the order of the use frequencies of the second group without changing the order of the commands or data pieces of the first group, commands or data pieces which are frequently used are displayed at the same display positions, thereby allowing easy retrieval and selection of a desired command or data piece depending on a user's memory.

Abstract: A field-effect semiconductor element implemented with a fewer number of elements and a reduced area and capable of storing data by itself without need for cooling at a cryogenic temperature, and a memory device employing the same. Gate-channel capacitance is set so small that whether or not a trap captures one electron or hole can definitely and distinctively be detected in terms of changes of a current of the semiconductor FET element. By detecting a change in a threshold voltage of the semiconductor element brought about by trapping of electron or hole in the trap, data storage can be realized at a room temperature.

Abstract: The invention provides a voltage applying structure having a reduced area penalty with respect to a data line. A wiring forming a global data line and a local data line formed in a p-type well region are connected via a select transistor. Two select lines are formed on a gate electrode of the select transistor. One select line is electrically connected to the gate electrode of the select transistor, however, the other select line is not connected to the select transistor. That is, an insulator film is formed between the select line and the gate electrode. As mentioned above, two select lines shorter than a gate length are provided on one select transistor. The select line is structured such as to be connected to the other select transistor.

Abstract: For providing a cheap semiconductor memory device with improving reliability by level of a cell, in the place of escaping from defects on memory cells electrically, through such as ECC, and further for providing a cell structure enabling scaling-down in the vertical direction with maintaining the reliability, in a semiconductor memory device, upon which high-speeded read-out operation is required, a charge storage region is constructed with particles made from a large number of semiconductor charge storage small regions, each being independent, thereby increasing the reliability by the cell level.

Abstract: Disclosed is a non-volatile semiconductor memory device that uses a inversion layer provided on a semiconductor substrate as a data line. The memory device can reduce variation of characteristics among memory cells and can reduce bit cost. A plurality of assist gates are formed in the upper part of a p-type well through a gate oxide film. In the upper part of an interlayer insulator that covers those assist gates are formed word lines that are used as control electrodes. The width of those word lines is, for example, 0.1 ?m, and each word line is separated from its adjacent word lines by a side wall spacer that is a silicon oxide film having a thickness of about 20 nm.

Abstract: In the memory array area of a semiconductor substrate, memory cells of a NAND flash memory are arranged in a matrix in the row direction and the column direction. A plurality of memory cells arranged in the row direction are mutually isolated by device isolation trenches having a thin strip planar shape extending in the column direction. The diameter of the device isolation trenches in the row direction at the bottom portion thereof is larger than that near the surface.

Abstract: An image exposing apparatus forms an image on photosensitive material by the technique of exposing and forming an image through direct modulation of a semiconductor laser device. The exposing apparatus includes a beam scanning unit for scanning a beam emitted from a semiconductor laser device to photosensitive material, a laser driving unit for driving the semiconductor laser device, the laser driving unit being operable to vary its driving current to the semiconductor laser device in accordance with a received image signal, and a laser output controller operable to measure current-beam output characteristics of the semiconductor laser device over a predetermined current range and then set a correlation between the image signal for the laser driving unit and the driving current for the semiconductor laser device, based on the measurement information.

Abstract: Disclosed is a non-volatile semiconductor memory device that uses a inversion layer provided on a semiconductor substrate as a data line. The memory device can reduce variation of characteristics among memory cells and can reduce bit cost. A plurality of assist gates are formed in the upper part of a p-type well through a gate oxide film. In the upper part of an interlayer insulator that covers those assist gates are formed word lines that are used as control electrodes. The width of those word lines is, for example, 0.1 ?m, and each word line is separated from its adjacent word lines by a side wall spacer that is a silicon oxide film having a thickness of about 20 nm.

Abstract: A data processor includes an authentication function for judging access right. The data processor further includes a nonvolatile memory cell array formed on an insulator film or a chip, and a conductor layer provided between a logic circuit for the authentication and the nonvolatile memory. The nonvolatile memory can store at least part of authentication information or an authentication program.

Abstract: To achieve a stable reading operation in a memory cell having a gain-cell structure, a write transistor is configured, which has a source and a drain that are formed on the insulating layer, a channel formed on the insulating layer and between the source and the drain and made of a semiconductor, and a gate formed on an upper portion of the insulating layer and between the source and the drain and electrically insulated from the channel by a gate insulating film and controlling the potential of the channel. The channel electrically connects the source and the drain on the side surfaces of the source and the drain.

Abstract: A data processor includes an authentication circuit for judging access right. The data processor further includes a nonvolatile memory cell array formed on an insulator film of a chip, and a conductor layer provided between a logic circuit of the authentication circuit and the nonvolatile memory cell array. The nonvolatile memory cell array can store at least part of authentication information or an authentication program.

Abstract: In a two-transistor gain cell structure, a semiconductor memory device capable of stable reading without malfunction and having small-area memory cells is provided. In a two-transistor gain cell memory having a write transistor and a read transistor, a write word line, a read word line, a write bit line, and a read bit line are separately provided, and voltages to be applied are independently set. Furthermore, a memory cell is connected to the same read word line and write bit line as those of an adjacent memory cell.

Abstract: A field-effect semiconductor element implemented with a fewer number of elements and a reduced area and capable of storing data by itself without need for cooling at a cryogenic temperature, and a memory device employing the same. Gate-channel capacitance is set so small that whether or not a trap captures one electron or hole can definitely and distinctively be detected in terms of changes of a current of the semiconductor FET element. By detecting a change in a threshold voltage of the semiconductor element brought about by trapping of electron or hole in the trap, data storage can be realized at a room temperature.

Abstract: Disclosed is a non-volatile semiconductor memory device that uses a inversion layer provided on a semiconductor substrate as a data line. The memory device can reduce variation of characteristics among memory cells and can reduce bit cost. A plurality of assist gates are formed in the upper part of a p-type well through a gate oxide film. In the upper part of an interlayer insulator that covers those assist gates are formed word lines that are used as control electrodes. The width of those word lines is, for example, 0.1 ?m, and each word line is separated from its adjacent word lines by a side wall spacer that is a silicon oxide film having a thickness of about 20 nm.

Abstract: A field-effect semiconductor element implemented with a fewer number of elements and a reduced area and capable of storing data by itself without need for cooling at a cryogenic temperature, and a memory device employing the same. Gate-channel capacitance is set so small that whether or not a trap captures one electron or hole can definitely and distinctively be detected in terms of changes of a current of the semiconductor FET element. By detecting a change in a threshold voltage of the semiconductor element brought about by trapping of electron or hole in the trap, data storage can be realized at a room temperature.

Abstract: An object of the present invention is to provide a semiconductor memory device suitable for larger-capacity storage because of its ability to store 3 or more bits in one element and capable of a high-speed and high-efficiency write operation due to a reduced leakage current during the write operation and provide a fabrication method therefor. According to the present invention, each of elements has a source region, a drain region, a control gate, two charge storage regions, and one or more assist gates. During a write operation, source side injection writing is performed with respect to a write target element by using the assist gates, while adjacent elements are isolated by field isolation using the assist gates.

Abstract: In a semiconductor flash memory required to have high reliability, injection and extraction of electrons must be performed through an oxide film obtained by directly oxidizing a silicon substrate. Accordingly, the voltage to be used is a large voltage ranging from positive to negative one. In contrast, by storing charges in a plurality of dispersed regions, high reliability is achieved. Based on the high reliability, transfer of electrons is permitted through not only the oxide film obtained by directly thermally oxidizing a high reliability silicon substrate but also another oxide film deposited by CVD, or the like. In consequence, a device is controlled by electric potentials of the same polarity upon writing of data and upon erasing of data.