Abstract: In a programming operation of a 3D stacked non-volatile memory device, an initial set of memory cells on a selected word line layer, involving fewer than all memory cells on a selected word line layer, are programmed first as a test case to determine optimal conditions for programming the remaining memory cells on the selected word line layer. For example, a number of program-verify iterations or loops which are needed to program the initial set of memory cells an initial amount is determined. This loop count is then stored, e.g., within the initial set of memory cells, within the remaining memory cells, within memory cells on a remaining word line layer, or in a data register, and programming of the initial set of memory cells continues to completion. Subsequently, the loop count is retrieved and used to determine an optimal starting program voltage for programming the remaining memory cells.

Abstract: In a programming operation of a 3D stacked non-volatile memory device, an initial set of memory cells on a selected word line layer, involving fewer than all memory cells on a selected word line layer, are programmed first as a test case to determine optimal conditions for programming the remaining memory cells on the selected word line layer. For example, a number of program-verify iterations or loops which are needed to program the initial set of memory cells an initial amount is determined. This loop count is then stored, e.g., within the initial set of memory cells, within the remaining memory cells, within memory cells on a remaining word line layer, or in a data register, and programming of the initial set of memory cells continues to completion. Subsequently, the loop count is retrieved and used to determine an optimal starting program voltage for programming the remaining memory cells.

Abstract: Methods and non-volatile storage systems are provided for recovering data during a programming of non-volatile storage. Program data that was originally stored in one set of latches may be preserved with a combination of two sets of latches. These two sets of latches may also be used to store verify status during programming of that program data. The original program data may be recovered by performing a logical operation on the data in the two sets of latches. For example, upper page data could be initially stored in one set of latches. While the upper page data is being programmed, that set of latches and another set of latches are used to store verify status with respect to the upper page data. If a program error occurs while the upper page data is being preserved, it may be recovered by performing a logical operation on the two sets of latches.

Abstract: A non-volatile memory has its cells' thresholds programmed within any one of a first set of voltage bands partitioned by a first set of reference thresholds across a threshold window. Hard bits are obtained when read relative to the first set of reference thresholds. The cells are read at a higher resolution relative to a second set of reference thresholds so as to provide additional soft bits for error correction. The soft bits are generated by a combination of a first modulation of voltage on a current word line WLn and a second modulation of voltage on an adjacent word line WLn+1, as in a reading scheme known as “Direct-Lookahead (DLA)”.

Abstract: Methods and non-volatile storage systems are provided for determining erratically programmed storage elements, including under-programmed and over-programmed storage elements. Techniques do not require any additional data latches. A set of data latches may be used to store program data for a given memory element. This program data may be maintained after the programming is over for use in erratic program detection. In one embodiment, lockout status is kept in a data latch that is used to serially receive program data to be programmed into the storage element. Therefore, no extra data latches are required to program the storage elements and to maintain the program data afterwards.

Abstract: In a programming operation of a 3D stacked non-volatile memory device, an initial set of memory cells on a selected word line layer, involving fewer than all memory cells on a selected word line layer, are programmed first as a test case to determine optimal conditions for programming the remaining memory cells on the selected word line layer. For example, a number of program-verify iterations or loops which are needed to program the initial set of memory cells an initial amount is determined. This loop count is then stored, e.g., within the initial set of memory cells, within the remaining memory cells, within memory cells on a remaining word line layer, or in a data register, and programming of the initial set of memory cells continues to completion. Subsequently, the loop count is retrieved and used to determine an optimal starting program voltage for programming the remaining memory cells.

Abstract: In a programming operation of a 3D stacked non-volatile memory device, an initial set of memory cells on a selected word line layer, involving fewer than all memory cells on a selected word line layer, are programmed first as a test case to determine optimal conditions for programming the remaining memory cells on the selected word line layer. For example, a number of program-verify iterations or loops which are needed to program the initial set of memory cells an initial amount is determined. This loop count is then stored, e.g., within the initial set of memory cells, within the remaining memory cells, within memory cells on a remaining word line layer, or in a data register, and programming of the initial set of memory cells continues to completion. Subsequently, the loop count is retrieved and used to determine an optimal starting program voltage for programming the remaining memory cells.

Abstract: A non-volatile memory has its cells' thresholds programmed within any one of a first set of voltage bands partitioned by a first set of reference thresholds across a threshold window. The cells are read at a higher resolution relative to a second set of reference thresholds so as to provide additional soft bits for error correction. The reference thresholds of the second set are set up to be non-uniformly distributed on the threshold window so as to provide higher resolution at designated regions. At the same time they are conducive to be read in groups for soft bits to be read bit-by-bit systematically with a simple algorithm and read circuit and using a minimum of data latches. This is accomplished by relaxing the requirement that the first set of reference threshold is a subset of the second set and that the resulting soft bits are symmetrically distributed about the hard bits.

Abstract: Methods and non-volatile storage systems are provided for recovering data during a programming of non-volatile storage. Program data that was originally stored in one set of latches may be preserved with a combination of two sets of latches. These two sets of latches may also be used to store verify status during programming of that program data. The original program data may be recovered by performing a logical operation on the data in the two sets of latches. For example, upper page data could be initially stored in one set of latches. While the upper page data is being programmed, that set of latches and another set of latches are used to store verify status with respect to the upper page data. If a program error occurs while the upper page data is being preserved, it may be recovered by performing a logical operation on the two sets of latches.

Abstract: Methods and non-volatile storage systems are provided for detecting defects in word lines. A “broken” word line defect may be detected. Information may be maintained as to which storage elements were intended to be programmed to a tracked state. Then, after programming is complete, the storage elements are read to determine which storage elements have a threshold voltage below a reference voltage level associated with the tracked state. By tracking which storage elements are in the tracked state, elements associated with other states may be filtered out such that an accurate assessment may be made as to which storage elements were under-programmed. From this information, a determination may be made whether the word line is defective. For example, if too many storage elements are under-programmed, this may indicate a broken word line.

Abstract: A non-volatile memory has its cells' thresholds programmed within any one of a first set of voltage bands partitioned by a first set of reference thresholds across a threshold window. Hard bits are obtained when read relative to the first set of reference thresholds. The cells are read at a higher resolution relative to a second set of reference thresholds so as to provide additional soft bits for error correction. The soft bits are generated by a combination of a first modulation of voltage on a current word line WLn and a second modulation of voltage on an adjacent word line WLn+1, as in a reading scheme known as “Direct-Lookahead (DLA)”.

Abstract: A non-volatile memory has its cells' thresholds programmed within any one of a first set of voltage bands partitioned by a first set of reference thresholds across a threshold window. Hard bits are obtained when read relative to the first set of reference thresholds. The cells are read at a higher resolution relative to a second set of reference thresholds so as to provide additional soft bits for error correction. The soft bits are generated by a combination of a first modulation of voltage on a current word line WLn and a second modulation of voltage on an adjacent word line WLn+1, as in a reading scheme known as “Direct-Lookahead (DLA)”.

Abstract: Methods and non-volatile storage systems are provided for detecting defects in word lines. A “broken” word line defect may be detected. Information may be maintained as to which storage elements were intended to be programmed to a tracked state. Then, after programming is complete, the storage elements are read to determine which storage elements have a threshold voltage below a reference voltage level associated with the tracked state. By tracking which storage elements are in the tracked state, elements associated with other states may be filtered out such that an accurate assessment may be made as to which storage elements were under-programmed. From this information, a determination may be made whether the word line is defective. For example, if too many storage elements are under-programmed, this may indicate a broken word line.

Abstract: Methods and non-volatile storage systems are provided for determining erratically programmed storage elements, including under-programmed and over-programmed storage elements. Techniques do not require any additional data latches. A set of data latches may be used to store program data for a given memory element. This program data may be maintained after the programming is over for use in erratic program detection. In one embodiment, lockout status is kept in a data latch that is used to serially receive program data to be programmed into the storage element. Therefore, no extra data latches are required to program the storage elements and to maintain the program data afterwards.

Abstract: When erasing non-volatile storage, a verification process is used between erase operations to determine whether the non-volatile storage has been successfully erased. The verification process includes separately performing verification for different subsets of the non-volatile storage elements.

Abstract: A non-volatile memory has its cells' thresholds programmed within any one of a first set of voltage bands partitioned by a first set of reference thresholds across a threshold window. The cells are read at a higher resolution relative to a second set of reference thresholds so as to provide additional soft bits for error correction. The reference thresholds of the second set are set up to be non-uniformly distributed on the threshold window so as to provide higher resolution at designated regions. At the same time they are conducive to be read in groups for soft bits to be read bit-by-bit systematically with a simple algorithm and read circuit and using a minimum of data latches. This is accomplished by relaxing the requirement that the first set of reference threshold is a subset of the second set and that the resulting soft bits are symmetrically distributed about the hard bits.

Abstract: A non-volatile memory has its cells' thresholds programmed within any one of a first set of voltage bands partitioned by a first set of reference thresholds across a threshold window. Hard bits are obtained when read relative to the first set of reference thresholds. The cells are read at a higher resolution relative to a second set of reference thresholds so as to provide additional soft bits for error correction. The soft bits are generated by a combination of a first modulation of voltage on a current word line WLn and a second modulation of voltage on an adjacent word line WLn+1, as in a reading scheme known as “Direct-Lookahead (DLA)”.

Abstract: Coupling effects between adjacent floating gates in a non-volatile storage device are reduced in a multi-pass programming operation, while reducing program data storage requirements. In one approach, storage elements are programmed in an out of sequence or zigzag word line order. A particular word line is programmed with a coarse program pass, after which another word line is programmed with a fine program pass, after which the particular word line is read. The particular word line is read before another word line is programmed with a coarse program pass which causes coupling interference to storage elements of the particular word line. The read data is subsequently used to perform a fine program pass for the particular word line. This avoids the need to store program data of multiple word lines concurrently, so that storage hardware can be reduced in size along with power consumption.

Abstract: A non-volatile memory has its cells' thresholds programmed within any one of a first set of voltage bands partitioned by a first set of reference thresholds across a threshold window. The cells are read at a higher resolution relative to a second set of reference thresholds so as to provide additional soft bits for error correction. The reference thresholds of the second set are set up to be non-uniformly distributed on the threshold window so as to provide higher resolution at designated regions. At the same time they are conducive to be read in groups for soft bits to be read bit-by-bit systematically with a simple algorithm and read circuit and using a minimum of data latches. This is accomplished by relaxing the requirement that the first set of reference threshold is a subset of the second set and that the resulting soft bits are symmetrically distributed about the hard bits.

Abstract: When erasing non-volatile storage, a verification process is used between erase operations to determine whether the non-volatile storage has been successfully erased. The verification process includes separately performing verification for different subsets of the non-volatile storage elements.