Abstract: When erasing non-volatile storage, a verification process is used between erase operations to determine whether the non-volatile storage has been successfully erased. The verification process includes separately performing verification for different subsets of the non-volatile storage elements.

Abstract: Coupling effects between adjacent floating gates in a non-volatile storage device are reduced in a multi-pass programming operation, while reducing program data storage requirements. In one approach, storage elements are programmed in an out of sequence or zigzag word line order. A particular word line is programmed with a coarse program pass, after which another word line is programmed with a fine program pass, after which the particular word line is read. The particular word line is read before another word line is programmed with a coarse program pass which causes coupling interference to storage elements of the particular word line. The read data is subsequently used to perform a fine program pass for the particular word line. This avoids the need to store program data of multiple word lines concurrently, so that storage hardware can be reduced in size along with power consumption.

Abstract: In a non-volatile memory system, the programming time period allocated for the program pulse is adjusted as a function of the voltage level of the pump pulse required so that the total number of pump pulses required to program the charge storage element to the required threshold voltage is reduced. For example, programming time period may be increased with an increase in the voltage level of the pump pulse required. This allows the programming time period of the program pulse to be increased to a value that compensates for the increased charge-up time that is required for the higher amplitude program pulses to reach the desired programming voltage.

Abstract: A non-volatile storage system that includes less word line drivers than word lines by having a limited set of individually controllable drivers for a subset of unselected word lines requiring word line by word line control, and have the remaining word lines connected to a common source.

Abstract: When erasing non-volatile storage, a verification process is used between erase operations to determine whether the non-volatile storage has been successfully erased. The verification process includes separately performing verification for different subsets of the non-volatile storage elements.

Abstract: In a method for generating a selected word line voltage, a constant voltage that is substantially independent of a temperature change is generated. Additionally, a current that varies in proportion to a temperature is generated. To generate the selected word line voltage, the current is converted to a voltage that varies in proportion to the absolute temperature and the voltage is subtracted from the constant voltage.

Abstract: A non-volatile storage system that includes less word line drivers than word lines by having a limited set of individually controllable drivers for a subset of unselected word lines requiring word line by word line control, and have the remaining word lines connected to a common source.

Abstract: The lowest programmed state in multi-state non-volatile flash memory devices can suffer from an increased level of bit line to bit line capacitive charge coupling when compared with other states. Program voltages applied to memory cells as increasing voltage pulses can be incremented using smaller values when programming memory cells to the lowest programmable state. Smaller increments in the applied voltage allow for greater precision and a narrower threshold voltage distribution to compensate for the disproportionate charge coupling experienced by cells programmed to this state. Smaller increment values can be used when switching from lower page to upper page programming in some implementations.

Abstract: In a non-volatile memory programming scheme where the memory cells are programmed in two or more sequential programming passes, when there is insufficient host data to program at least some of the memory cells during the second pass, some of the memory cells may be programmed to the wrong threshold voltage. This can be prevented by modifying the programming scheme so that this does not occur. In one implementation, this is accomplished by choosing a code scheme, which does not cause the memory cells to be programmed to the wrong threshold voltage during the second programming pass, or by programming the memory cells in accordance with substitute data that would not cause the cells to be programmed to an erroneous state.

Abstract: The lowest programmed state in multi-state non-volatile flash memory devices can suffer from an increased level of bit line to bit line capacitive charge coupling when compared with other states. Program voltages applied to memory cells as increasing voltage pulses can be incremented using smaller values when programming memory cells to the lowest programmable state. Smaller increments in the applied voltage allow for greater precision and a narrower threshold voltage distribution to compensate for the disproportionate charge coupling experienced by cells programmed to this state. Smaller increment values can be used when switching from lower page to upper page programming in some implementations.

Abstract: In a non-volatile memory system, the programming time period allocated for the program pulse is adjusted as a function of the voltage level of the pump pulse required so that the total number of pump pulses required to program the charge storage element to the required threshold voltage is reduced. For example, programming time period may be increased with an increase in the voltage level of the pump pulse required. This allows the programming time period of the program pulse to be increased to a value that compensates for the increased charge-up time that is required for the higher amplitude program pulses to reach the desired programming voltage.

Abstract: The lowest programmed state in multi-state non-volatile flash memory devices can suffer from an increased level of bit line to bit line capacitive charge coupling when compared with other states. Program voltages applied to memory cells as increasing voltage pulses can be incremented using smaller values when programming memory cells to the lowest programmable state. Smaller increments in the applied voltage allow for greater precision and a narrower threshold voltage distribution to compensate for the disproportionate charge coupling experienced by cells programmed to this state. Smaller increment values can be used when switching from lower page to upper page programming in some implementations.

Abstract: The lowest programmed state in multi-state non-volatile flash memory devices can suffer from an increased level of bit line to bit line capacitive charge coupling when compared with other states. Program voltages applied to memory cells as increasing voltage pulses can be incremented using smaller values when programming memory cells to the lowest programmable state. Smaller increments in the applied voltage allow for greater precision and a narrower threshold voltage distribution to compensate for the disproportionate charge coupling experienced by cells programmed to this state. Smaller increment values can be used when switching from lower page to upper page programming in some implementations.

Abstract: In a non-volatile memory system, the programming time period allocated for the program pulse is adjusted as a function of the voltage level of the pump pulse required so that the total number of pump pulses required to program the charge storage element to the required threshold voltage is reduced. For example, programming time period may be increased with an increase in the voltage level of the pump pulse required. This allows the programming time period of the program pulse to be increased to a value that compensates for the increased charge-up time that is required for the higher amplitude program pulses to reach the desired programming voltage.

Abstract: In a non-volatile memory system, the programming time period allocated for the program pulse is adjusted as a function of the voltage level of the pump pulse required so that the total number of pump pulses required to program the charge storage element to the required threshold voltage is reduced. For example, programming time period may be increased with an increase in the voltage level of the pump pulse required. This allows the programming time period of the program pulse to be increased to a value that compensates for the increased charge-up time that is required for the higher amplitude program pulses to reach the desired programming voltage.

Abstract: In a non-volatile memory programming scheme where the memory cells are programmed in two or more sequential programming passes, when there is insufficient host data to program at least some of the memory cells during the second pass, some of the memory cells may be programmed to the wrong threshold voltage. This can be prevented by modifying the programming scheme so that this does not occur. In one implementation, this is accomplished by choosing a code scheme, which does not cause the memory cells to be programmed to the wrong threshold voltage during the second programming pass, or by programming the memory cells in accordance with substitute data that would not cause the cells to be programmed to an erroneous state.

Abstract: A method for generating a selected word line voltage is provided. In this method, a constant voltage that is substantially independent of a temperature change is generated. Additionally, a current that varies in proportion to a temperature is generated. To generate the selected word line voltage, the current is converted to a voltage that varies in proportion to the absolute temperature and the voltage is subtracted from the constant voltage.

Abstract: In a non-volatile memory system, the programming time period allocated for the program pulse is adjusted as a function of the voltage level of the pump pulse required so that the total number of pump pulses required to program the charge storage element to the required threshold voltage is reduced. For example, programming time period may be increased with an increase in the voltage level of the pump pulse required. This allows the programming time period of the program pulse to be increased to a value that compensates for the increased charge-up time that is required for the higher amplitude program pulses to reach the desired programming voltage.

Abstract: In a non-volatile memory system, the programming time period allocated for the program pulse is adjusted as a function of the voltage level of the pump pulse required so that the total number of pump pulses required to program the charge storage element to the required threshold voltage is reduced. For example, programming time period may be increased with an increase in the voltage level of the pump pulse required. This allows the programming time period of the program pulse to be increased to a value that compensates for the increased charge-up time that is required for the higher amplitude program pulses to reach the desired programming voltage.

Abstract: In a non-volatile memory programming scheme where the memory cells are programmed in two or more sequential programming passes, when there is insufficient host data to program at least some of the memory cells during the second pass, some of the memory cells may be programmed to the wrong threshold voltage. This can be prevented by modifying the programming scheme so that this does not occur. In one implementation, this is accomplished by choosing a code scheme, which does not cause the memory cells to be programmed to the wrong threshold voltage during the second programming pass, or by programming the memory cells in accordance with substitute data that would not cause the cells to be programmed to an erroneous state.