Abstract: A semiconductor device comprising a first semiconductor region and a second semiconductor region, (a) wherein a field effect transistor is comprised of the first semiconductor region comprising at least one semiconductor layer(s) protruding upward from a substrate, a gate electrode(s) formed via an insulating film such that the gate electrode(s) strides over the semiconductor layer(s) and source/drain regions provided in the semiconductor layer(s) on both sides of the gate electrode(s), whereby a channel region is formed in at least both sides of the semiconductor layer(s), (b) wherein the second semiconductor region comprises semiconductor layers protruding upward from the substrate and placed, at least opposing the first semiconductor region at both ends in the direction perpendicular to a channel current direction and the side surface of the semiconductor layers facing the first semiconductor region is parallel to the channel current direction.

Abstract: A second mask is provided so as to cover a second gate pattern and a first gate pattern is heated to a temperature at which a material gas containing a first metal thermally decomposes, polysilicon constituting the first gate pattern is reacted with the first metal for silicidation under the conditions that the layer of the first metal does not deposit, and thus the first gate pattern is turned into a first gate electrode constituted by a silicide of the first metal. After the second mask is removed, a first mask is provided so as to cover the first electrode and the second gate pattern is heated to a temperature at which the material gas thermally decomposes, polysilicon constituting the second gate pattern is reacted with the first metal for silicidation under the conditions that the layer of the first metal does not deposit, and thus the second gate pattern is turned into a second gate electrode constituted by the silicide of the first metal. Then, the first mask is removed.

Abstract: The task of the present invention is to enable formation of a gate insulating film structure having a good-quality interface between a silicon oxide film and silicon in an interface between a high dielectric constant thin film and a silicon substrate to provide a semiconductor device and a semiconductor manufacturing method which are capable of improving interface electrical characteristics, which has been a longstanding task in practical use of a high dielectric constant insulating film. A metal layer deposition process and a heat treatment process which supply metal elements constituting a high dielectric constant film on a surface of a base silicon oxide film 103 allow the metal elements to be diffused into the base silicon oxide film 103 to thereby form an insulating film structure 105 as a gate insulating film, after forming the base silicon oxide film 103 on a surface of a silicon substrate 101.

Abstract: A semiconductor device comprising: a MIS type field effect transistor which comprises a semiconductor raised portion protruding from a substrate plane, a gate electrode extending over the semiconductor raised portion from the top onto the opposite side faces of the semiconductor raised portion, a gate insulation film existing between the gate electrode and the semiconductor raised portion, and source and drain regions provided in the semiconductor raised portion; an interlayer insulating film provided on a substrate including the transistor; and a buried conductor interconnect that is formed by filling in a trench formed in the interlayer insulating film with a conductor, wherein the buried conductor interconnect connects one of the source and drain regions of the semiconductor raised portion and another conductive portion below the interlayer insulating film.

Abstract: There is provided a semiconductor device which is capable of solving a problem of threshold control in CMOS transistor, accompanied with combination of a gate insulating film having a high dielectric constant and a metal gate electrode, and significantly enhancing performances without deterioration in reliability of a device. The semiconductor device includes a gate insulating film composed of a material having a high dielectric constant, and a gate electrode. A portion of the gate electrode making contact with the gate insulating film has a composition including silicide of metal M expressed with MxSi1-X (0<X<1), as a primary constituent. X is greater than 0.5 (X>0.5) in a p-type MOSFET, and is equal to or smaller than 0.5 (X?0.5) in a n-type MOSFET.

Abstract: A formation method of a metallic compound layer includes preparing, in a chamber, a substrate having a surface on which a semiconductor material of silicon, germanium, or silicon germanium is exposed, and forming a metallic compound layer, includes: supplying a raw material gas containing a metal for forming a metallic compound with the semiconductor material to the chamber; heating the substrate to a temperature at which the raw material gas is pyrolyzed; and forming a metallic compound layer by reaction of the metal with the semiconductor material so that no layer of the metal is deposited on the substrate. A manufacturing method of a semiconductor device employs this formation method of a metallic compound layer.

Abstract: [Problems] To provide a semiconductor device including a MIS-type FET having an excellent characteristic of low leakage current despite use of a high-K material of a high dielectric constant in a gate insulating film. [Means for solving Problems] A MIS-type field-effect-transistor (FET) including: a silicon substrate (1); an insulating film (6) formed on the silicon substrate and containing silicon and at least one of nitrogen and oxygen; a metal oxide film formed on the insulating film and containing silicon and hafnium; and a gate electrode formed on the metal oxide film, wherein a silicon molar ratio (Si/(Si+Hf)) in the meal oxide film is in the range of 2 to 15%.

Abstract: A semiconductor device comprising a first semiconductor region and a second semiconductor region, (a) wherein a field effect transistor is comprised of the first semiconductor region comprising at least one semiconductor layer(s) protruding upward from a substrate, a gate electrode(s) formed via an insulating film such that the gate electrode(s) strides over the semiconductor layer(s) and source/drain regions provided in the semiconductor layer(s) on both sides of the gate electrode(s), whereby a channel region is formed in at least both sides of the semiconductor layer(s), (b) wherein the second semiconductor region comprises semiconductor layers protruding upward from the substrate and placed, at least opposing the first semiconductor region at both ends in the direction perpendicular to a channel current direction and the side surface of the semiconductor layers facing the first semiconductor region is parallel to the channel current direction.

Abstract: A shower head having a plurality of ejection holes for supplying an organic metal gas at uniform density to the surface of a substrate and a plurality of ejection holes for supplying an oxidizing gas at uniform density to the same is provided in a reaction furnace of an MOCVD system. A heater for heating the inside to a temperature higher than the thermal decomposition point of the organic metal gas but lower than the film forming temperature is provided in the vicinity of the substrate-side surface of the shower head.

Abstract: A shower head having a plurality of ejection holes for supplying an organic metal gas at uniform density to the surface of a substrate and a plurality of ejection holes for supplying an oxidizing gas at uniform density to the same is provided in a reaction furnace of an MOCVD system. A heater for heating the inside to a temperature higher than the thermal decomposition point of the organic metal gas but lower than the film forming temperature is provided in the vicinity of the substrate side surface of the shower head.

Abstract: There is provided a semiconductor device comprising an n-type and a p-type field effect transistors, meeting the conditions that in terms of a crystal orientation of the protruding semiconductor region constituting the n-type field effect transistor, its plane parallel to the substrate is substantially a {100} plane and its side surface is a {100} plane substantially orthogonal to the {100} plane, and that in terms of a crystal orientation of the protruding semiconductor region constituting the p-type field effect transistor, its plane parallel to the substrate is substantially a {100} plane and its side surface is a {110} plane substantially orthogonal to the {100} plane.

Abstract: There is provided a semiconductor device which is capable of solving a problem of threshold control in CMOS transistor, accompanied with combination of a gate insulating film having a high dielectric constant and a metal gate electrode, and significantly enhancing performances without deterioration in reliability of a device. The semiconductor device includes a gate insulating film composed of a material having a high dielectric constant, and a gate electrode. A portion of the gate electrode making contact with the gate insulating film has a composition including silicide of metal M expressed with MxSi1-X (0<X<1), as a primary constituent. X is greater than 0.5 (X>0.5) in a p-type MOSFET, and is equal to or smaller than 0.5 (X?0.5) in a n-type MOSFET.

Abstract: A semiconductor device comprising: a MIS type field effect transistor which comprises a semiconductor raised portion protruding from a substrate plane, a gate electrode extending over the semiconductor raised portion from the top onto the opposite side faces of the semiconductor raised portion, a gate insulation film existing between the gate electrode and the semiconductor raised portion, and source and drain regions provided in the semiconductor raised portion; an interlayer insulating film provided on a substrate including the transistor; and a buried conductor interconnect that is formed by filling in a trench formed in the interlayer insulating film with a conductor, wherein the buried conductor interconnect connects one of the source and drain regions of the semiconductor raised portion and another conductive portion below the interlayer insulating film.

Abstract: [Problemsp] To provide a semiconductor device including a MIS-type FET having an excellent characteristic of low leakage current despite use of a high-K material of a high dielectric constant in a gate insulating film. [Means for solving Problems] A MIS-type field-effect-transistor (FET) including: a silicon substrate (1); an insulating film (6) formed on the silicon substrate and containing silicon and at least one of nitrogen and oxygen; a metal oxide film formed on the insulating film and containing silicon and hafnium; and a gate electrode formed on the metal oxide film, wherein a silicon molar ratio (Si/(Si+Hf)) in the meal oxide film is in the range of 2 to 15%.

Abstract: There is provided a semiconductor device wherein at least the largest width of a source/drain region is larger than the width of a semiconductor region and the source/drain region has a slope having a width continuously increasing from the uppermost side to the substrate side, and a silicide film is formed in the surface of the slope.

Abstract: The task of the present invention is to enable formation of a gate insulating film structure having a good-quality interface between a silicon oxide film and silicon in an interface between a high dielectric constant thin film and a silicon substrate to provide a semiconductor device and a semiconductor manufacturing method which are capable of improving interface electrical characteristics, which has been a longstanding task in practical use of a high dielectric constant insulating film. A metal layer deposition process and a heat treatment process which supply metal elements constituting a high dielectric constant film on a surface of a base silicon oxide film 103 allow the metal elements to be diffused into the base silicon oxide film 103 to thereby form an insulating film structure 105 as a gate insulating film, after forming the base silicon oxide film 103 on a surface of a silicon substrate 101.

Abstract: In forming a metal oxide dielectric film of perovskite type for capacitor, an array of lower electrodes and a crystallization-assisting conductive film are simultaneously formed. The crystallization-assisting conductive film is formed outside the lower electrode array, at a distance of about 10 &mgr;m or less from the outermost lower electrodes, in a width of 20 &mgr;m or more. Then, a metal oxide dielectric film is formed thereon. Since the crystallization-assisting conductive film assists the crystallization of metal oxide dielectric film, capacitor elements which are superior in properties and reliability even when the capacitor elements are produced in a fine structure is obtained.

Abstract: For forming a metal-oxide dielectric film having a perovskite type of crystal structure represented by ABO3 on a base conductor material using organometallic source gases, initial perovskite crystal nuclei or an initial amorphous layer having an amorphous structure are formed on the base conductor material under the first deposition conditions; and a film having a perovskite crystal structure is further grown on the initial crystal nuclei or the initial amorphous layer under the second deposition conditions. In the process, the first deposition conditions meet at least one of the requirements: (a) a lower substrate temperature than that in the second deposition conditions; and (b) a higher source gas pressure than that in the second deposition conditions. This process can be used to deposit a film such as PZT exhibiting a reduced leak current.

Abstract: A rear-projection screen 3, including at least a lenticular lens sheet 32 and a Fresnel lens sheet 31, is configured so that the lenticular lens sheet 32 contains, in a base material thereof made of a resin, light diffusing microparticles made of a resin having a refractive index different from a refractive index of the base material, and the light diffusing microparticles satisfy 0.5 &mgr;m≦&Dgr;N1×d1≦0.9 &mgr;m, where &Dgr;N1 represents a difference between a refractive index of the light diffusing microparticles and a refractive index of the base material of the lenticular lens sheet, and d1 represents an average particle diameter of the light diffusing microparticles. With this, a rear-projection screen with small wavelength dependency of diffusion characteristics can be provided utilizing only resins with general properties.

Abstract: When forming a metal oxide dielectric film having a perovskite crystal structure represented by ABO3 on a base metal, the metal oxide dielectric film is vapor-deposited by two-stage thermal CVD using an organometallic source gas and an oxidizing gas comprising the first step of feeding a Pb organometallic source gas alone or in combination with an oxidizing gas before depositing the metal oxide dielectric film; and then the second step of feeding an organometallic gas to be a source for the metal oxide dielectric film to deposit the metal oxide dielectric film. This process can grow a film (e.g., PZT) exhibiting a reduced leak current.