Patents by Inventor Toru Tatsumi

Toru Tatsumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030170388
    Abstract: A shower head 9 having a plurality of ejection holes for supplying an organic metal gas at uniform density to the surface of a substrate 10 and a plurality of ejection holes for supplying an oxidizing gas at uniform density to the same is provided in a reaction furnace 8 of an MOSVD system. A heater for heating the inside to a temperature higher than the thermal decomposition point of the organic metal gas but lower than the film forming temperature is provided in the vicinity of the substrate-side surface of the shower head 9.
    Type: Application
    Filed: March 12, 2003
    Publication date: September 11, 2003
    Inventors: Hiroshi Shinriki, Kenji Matsumoto, Toru Tatsumi
  • Patent number: 6573211
    Abstract: A metal oxide dielectric film of perovskite type represented by ABO3, wherein a composition ratio between an A-element and a B-element contained in the film satisfies the following Equation (1-1), and an amount of an oxide of the A-element contained in the film satisfies the following Equation (1-2): 1<[A]/[B]≦1.1  (1-1) where [A]/[B] represents a composition ratio between the A-element and the B-element, (IAO/IABO3)<10−2  (1-2) where IAO and IABO3 respectively represent (111) peak intensity of an oxide of the A-element and (100) peak intensity of the metal oxide dielectric in an X-axis diffraction spectrum.
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: June 3, 2003
    Assignee: NEC Corporation
    Inventor: Toru Tatsumi
  • Patent number: 6459126
    Abstract: A MIS transistor has a gate insulating film made of silicon oxynitride and having a specific dielectric constant which is larger than the expected specific dielectric constant calculated based on a weighted average of the specific dielectric constants based on the weight ratio of the silicon oxide and the silicon nitride contained in the silicon oxynitride film. The gate insulating film having a smaller thickness prevents impurities in the overlying gate electrode from penetrating through the gate insulating film to degrade the silicon substrate.
    Type: Grant
    Filed: May 11, 2001
    Date of Patent: October 1, 2002
    Assignee: NEC Corporation
    Inventors: Tohru Mogami, Mitsuhiro Togo, Koji Watanabe, Toyoji Yamamoto, Nobuyuki Ikarashi, Kazutoshi Shiba, Toru Tatsumi, Haruhiko Ono
  • Publication number: 20020096721
    Abstract: A MIS transistor has a gate insulating film made of silicon oxynitride and having a specific dielectric constant which is larger than the expected specific dielectric constant calculated based on a weighted average of the specific dielectric constants based on the weight ratio of the silicon oxide and the silicon nitride contained in the silicon oxynitride film. The gate insulating film having a smaller thickness prevents impurities in the overlying gate electrode from penetrating through the gate insulating film to degrade the silicon substrate.
    Type: Application
    Filed: May 11, 2001
    Publication date: July 25, 2002
    Applicant: NEC CORPORATION
    Inventors: Tohru Mogami, Mitsuhiro Togo, Koji Watanabe, Toyoji Yamamoto, Nobuyuki Ikarashi, Kazutoshi Shiba, Toru Tatsumi, Haruhiko Ono
  • Publication number: 20020080483
    Abstract: A rear-projection screen 3, including at least a lenticular lens sheet 32 and a Fresnel lens sheet 31, is configured so that the lenticular lens sheet 32 contains, in a base material thereof made of a resin, light diffusing microparticles made of a resin having a refractive index different from a refractive index of the base material, and the light diffusing microparticles satisfy 0.5 &mgr;m≦&Dgr;N1×d1≦0.9 &mgr;m, where &Dgr;N1 represents a difference between a refractive index of the light diffusing microparticles and a refractive index of the base material of the lenticular lens sheet, and d1 represents an average particle diameter of the light diffusing microparticles. With this, a rear-projection screen with small wavelength dependency of diffusion characteristics can be provided utilizing only resins with general properties.
    Type: Application
    Filed: August 28, 2001
    Publication date: June 27, 2002
    Inventors: Hiroshi Yamaguchi, Kenichi Ikeda, Osamu Sakai, Toru Tatsumi, Satoshi Aoki
  • Patent number: 6372628
    Abstract: A structure and manufacturing process of a low dielectric constant interlayer insulating film used between wiring layers and semiconductor devices using such film are disclosed. The insulating film which can withstand in an actual process comprises an amorphous carbon fluoride film. A diamond like carbon film and a silicon excess layer are disposed on both sides of the amorphous carbon fluoride film to be inserted between the wiring layers, whereby adhesion to wiring and another insulating film contacting it is significantly enhanced. In addition, a silicon based insulating film is disposed and flattened on a multilayer film containing an amorphous carbon fluoride film buried with a wiring layer, and is used as a hard mask for anisotropically etching the diamond like carbon film and the amorphous carbon fluoride film with oxygen plasma to form a via hole.
    Type: Grant
    Filed: May 26, 2000
    Date of Patent: April 16, 2002
    Assignee: NEC Corporation
    Inventors: Yoshihisa Matsubara, Ko Noguchi, Shinya Ito, Noriaki Oda, Akira Matsumoto, Takashi Ishigami, Masahiko Nakamae, Tadahiko Horiuchi, Kazuhiko Endo, Toru Tatsumi, Yoshishige Matsumoto
  • Publication number: 20020025453
    Abstract: A metal oxide dielectric film of perovskite type represented by ABO3, wherein a composition ratio between an A-element and a B-element contained in the film satisfies the following Equation (1-1), and an amount of an oxide of the A-element contained in the film satisfies the following Equation (1-2):
    Type: Application
    Filed: August 29, 2001
    Publication date: February 28, 2002
    Applicant: NEC CORPORATION
    Inventor: Toru Tatsumi
  • Patent number: 6180531
    Abstract: A semiconductor device, in which wiring layers are electrically isolated from each other by an insulating film which includes an amorphous carbon fluoride film insulating film containing carbon and fluorine as main components and the wiring layers are electrically connected to each other by a conductive material buried in a hole penetrating through the insulating film, is manufactured by selectively etching the amorphous carbon fluoride film. Moreover, a silicon oxide film, a silicon nitride film, or a silicon oxynitride film is formed on both of the amorphous carbon fluoride film and a side surface of said hole, or one of the amorphous carbon fluoride film and the side surface thereof.
    Type: Grant
    Filed: January 14, 1999
    Date of Patent: January 30, 2001
    Assignee: NEC Corporation
    Inventors: Yoshishige Matsumoto, Yoshitake Ohnishi, Kazuhiko Endo, Toru Tatsumi
  • Patent number: 6121120
    Abstract: In a method for manufacturing a semiconductor device, an impurity diffusion region is formed within a semiconductor substrate. Then, a chemical dry etching process or a heating process is carried out to remove a contamination layer from the impurity diffusion region. Then, a silicon layer is selectively grown on the impurity diffusion region.
    Type: Grant
    Filed: August 7, 1998
    Date of Patent: September 19, 2000
    Assignee: NEC Corporation
    Inventors: Hitoshi Wakabayashi, Toru Tatsumi
  • Patent number: 6091081
    Abstract: A structure and manufacturing process of a low dielectric constant interlayer insulating film used between wiring layers and semiconductor devices using such film are disclosed. The insulating film which can withstand in an actual process comprises an amorphous carbon fluoride film. A diamond like carbon film and a silicon excess layer are disposed on both sides of the amorphous carbon fluoride film to be inserted between the wiring layers, whereby adhesion to wiring and another insulating film contacting it is significantly enhanced. In addition, a silicon based insulating film is disposed and flattened on a multilayer film containing an amorphous carbon fluoride film buried with a wiring layer, and is used as a hard mask for anisotropically etching the diamond like carbon film and the amorphous carbon fluoride film with oxygen plasma to form a via hole.
    Type: Grant
    Filed: December 2, 1997
    Date of Patent: July 18, 2000
    Assignee: NEC Corporation
    Inventors: Yoshihisa Matsubara, Ko Noguchi, Shinya Ito, Noriaki Oda, Akira Matsumoto, Takashi Ishigami, Masahiko Nakamae, Tadahiko Horiuchi, Kazuhiko Endo, Toru Tatsumi, Yoshishige Matsumoto
  • Patent number: 6077355
    Abstract: There is provided an apparatus for accomplishing chemical vapor deposition, including a reaction chamber in which a film is deposited on a substrate by chemical vapor deposition, a source supply for supplying source to the reaction chamber for accomplishing chemical vapor deposition, and a mass spectrograph for detecting a concentration of the source in the reaction chamber and transmitting an instruction signal based on detection to the source supply for controlling an amount of the source to be supplied to the reaction chamber. It was quite difficult to control an amount of solid or liquid source to be supplied to a chemical vapor deposition apparatus. The above mentioned apparatus makes it possible to accurately control an amount of solid or liquid source, resulting in uniformity in a film deposition rate and a film composition.
    Type: Grant
    Filed: June 5, 1997
    Date of Patent: June 20, 2000
    Assignee: NEC Corporation
    Inventors: Atsushi Yamashita, Toru Tatsumi
  • Patent number: 6075253
    Abstract: A semiconductor photodetector having a planar structure, including a first silicon layer having a first conductivity and formed with a recess, a silicon dioxide film covering a sidewall of the recess therewith, a germanium monocrystal layer formed in the recess, a first germanium layer having a first conductivity and sandwiched between the germanium monocrystal layer and the first silicon layer in the recess, a second germanium layer having a second conductivity and formed on the germanium monocrystal layer, and a second silicon layer having a second conductivity and formed on the second germanium layer. The first and second germanium layers prevent a depletion layer, which are generated in the germanium monocrystal layer when a voltage is applied to the semiconductor photodetector, from reaching the first and second silicon layers, respectively.
    Type: Grant
    Filed: April 15, 1998
    Date of Patent: June 13, 2000
    Assignee: NEC Corporation
    Inventors: Mitsuhiro Sugiyama, Toru Tatsumi
  • Patent number: 6071797
    Abstract: In a method of forming an amorphous carbon thin film with a plasma chemical vapor deposition method, at least one of a hydrocarbon gas and a carbon fluoride gas is supplied in a reaction chamber as a material gas. By applying a high voltage between two electrodes, a plasma is generated in the reaction chamber using the supplied material gas. As a result, an amorphous carbon thin film is deposited on a substrate while preventing deposition of an adhesion on an inner wall of the reaction chamber. In order to prevent the adhesion from depositing on the inner wall, a bias voltage such as one of DC bias, a high frequency bias and a high frequency bias imposed on a DC bias is applied to the electrically conductive reaction chamber.
    Type: Grant
    Filed: September 24, 1996
    Date of Patent: June 6, 2000
    Assignee: NEC Corporation
    Inventors: Kazuhiko Endo, Toru Tatsumi
  • Patent number: 6060391
    Abstract: A heating mechanism for heating a substrate is disposed in a growth chamber, a bulb capable of controlling the quantity of gas flowing into the growth chamber is provided between a plurality of organic metal gas sources and the growth chamber. A plasma chamber for inert gas having a transparent portion is provided, the plasm chamber receiving a part of an organic metal raw material gas supplied to the growth chamber through an orifice. The plasma chamber is provided with an exhaustion system performing a differential air exhausting for the plasma chamber and the growth chamber. Provided is an optical system for measuring an light emission intensity by separating emitted light characteristic of a metal in the organic metal raw material gas, the light is emitted from the metal by exciting the organic metal raw material gas partially supplied to the plasma chamber from the growth chamber through the orifice.
    Type: Grant
    Filed: April 21, 1997
    Date of Patent: May 9, 2000
    Assignee: NEC Corporation
    Inventor: Toru Tatsumi
  • Patent number: 6030894
    Abstract: On a main surface of a silicon substrate of one conductivity type, a diffusion layer of the opposite conductivity type is formed, and the main surface of the silicon substrate is covered by an insulator film. The insulator film is formed with a contact hole which extends to reach the diffusion layer of the opposite conductivity type. A contact plug is provided in the contact hole. The contact plug fills the contact hole and comprises a first silicon layer of the opposite conductivity type directly connected to the diffusion layer of the opposite conductivity type, a silicon-germanium alloy layer of the opposite conductivity type directly contact to the first silicon layer, and a second silicon layer of the opposite conductivity type directly contact to the silicon-germanium alloy layer. Wiring is provided on the surface of the insulator film in direct contact to the contact plug.
    Type: Grant
    Filed: July 20, 1998
    Date of Patent: February 29, 2000
    Assignee: NEC Corporation
    Inventors: Hiromitsu Hada, Toru Tatsumi, Naoki Kasai, Hidemitsu Mori
  • Patent number: 5946570
    Abstract: A memory cell of a semiconductor dynamic random access memory device requires a bit line contact hole open to a drain region of a cell transistor for connecting a bit line to the drain region and a node contact hole open to a source region for connecting a storage electrode of a stacked capacitor to the source region, and the bit line contact hole and the node contact hole are plugged with silicon layers; the silicon layers are epitaxially grown from the source and drain regions over an oxide-encapsulated gate electrode of the cell transistor so as to increase the contact areas; and the silicon layers are firstly anisotropically grown until reaching the upper surface of the oxide-encapsulated gate electrode, and, thereafter, isotropically grown so as to increase the contact areas.
    Type: Grant
    Filed: November 20, 1997
    Date of Patent: August 31, 1999
    Assignee: NEC Corporation
    Inventors: Naoki Kasai, Hiromitsu Hada, Hidemitsu Mori, Toru Tatsumi
  • Patent number: 5909059
    Abstract: On a main surface of a silicon substrate of one conductivity type, a diffusion layer of the opposite conductivity type is formed, and the main surface of the silicon substrate is covered by an insulator film. The insulator film is formed with a contact hole which extends to reach the diffusion layer of the opposite conductivity type. A contact plug is provided in the contact hole. The contact plug fills the contact hole and comprises a first silicon layer of the opposite conductivity type directly connected to the diffusion layer of the opposite conductivity type, a silicon-germanium alloy layer of the opposite conductivity type directly contact to the first silicon layer, and a second silicon layer of the opposite conductivity type directly contact to the silicon-germanium alloy layer. Wiring is provided on the surface of the insulator film in direct contact to the contact plug.
    Type: Grant
    Filed: December 3, 1997
    Date of Patent: June 1, 1999
    Assignee: NEC Corporation
    Inventors: Hiromitsu Hada, Toru Tatsumi, Naoki Kasai, Hidemitsu Mori
  • Patent number: 5895948
    Abstract: A silicon layer serving as a contact plug directly connected to a diffusion layer of a MOS transistor is provided. On a surface of an N.sup.- type diffusion layer in self-alignment with a silicon nitride layer spacer and a field oxide layer, an N.sup.+ type monocrystalline silicon layer formed by anisotropic selective epitaxial growth method is directly connected. The surface of the N.sup.+ type monocrystalline silicon layer is directly connected to an N.sup.+ type monocrystalline silicon layer formed by isotropic selective epitaxial growth.
    Type: Grant
    Filed: September 25, 1997
    Date of Patent: April 20, 1999
    Assignee: NEC Corporation
    Inventors: Hidemitsu Mori, Toru Tatsumi, Hiromitsu Hada, Naoki Kasai
  • Patent number: 5866920
    Abstract: A semiconductor device, in which wiring layers are electrically isolated from each other by an insulating film which includes an amorphous carbon fluoride film insulating film containing carbon and fluorine as main components and the wiring layers are electrically connected to each other by a conductive material buried in a hole penetrating through the insulating film, is manufactured by selectively etching the amorphous carbon fluoride film. Moreover, a silicon oxide film, a silicon nitride film, or a silicon oxynitride film is formed on both of the amorphous carbon fluoride film and a side surface of said hole, or one of the amorphous carbon fluoride film and the side surface thereof.
    Type: Grant
    Filed: March 7, 1997
    Date of Patent: February 2, 1999
    Assignee: NEC Corporation
    Inventors: Yoshishige Matsumoto, Yoshitake Ohnishi, Kazuhiko Endo, Toru Tatsumi
  • Patent number: 5723379
    Abstract: A method for fabricating a polycrystalline silicon having a roughed surface, which is useful for a capacitor electrode is disclosed. The method is featured by depositing a polycrystalline silicon layer in such a manner that grains of silicon are caused at the surface of the polycrystalline silicon layer. The polycrystalline silicon layer thus obtained has a large effective area and is suitable for a capacitor electrode because of its increased effective surface area.
    Type: Grant
    Filed: January 6, 1994
    Date of Patent: March 3, 1998
    Assignee: NEC Corporation
    Inventors: Hirohito Watanabe, Toru Tatsumi