Patents by Inventor Toshihide Tsubata

Toshihide Tsubata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8064018
    Abstract: Each pixel region includes two subpixel regions, in which different voltages are applied to a liquid crystal layer with respect to a signal voltage supplied from a source bus line by way of TFTs. A first substrate includes a first electrode provided for the two subpixel regions. A second substrate includes a second electrode that faces the first electrode with a vertical alignment liquid crystal layer interposed. A liquid crystal capacitor is provided for each of these subpixel regions. Each subpixel region includes at least one liquid crystal domain that produces a dark area, which looks darker than a gray scale tone being presented for a viewer located in front of the device, inside of, and substantially parallel to, an edge portion of the first electrode. At least a part of the edge portion of the first electrode is arranged so as to overlap with a gate bus line and selectively shield at least a part of the dark area.
    Type: Grant
    Filed: April 24, 2007
    Date of Patent: November 22, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akihiro Shoraku, Toshihide Tsubata
  • Publication number: 20110279735
    Abstract: Provided is an active matrix substrate including a capacitance electrode (47a) electrically connected to a pixel electrode (17a), in which a storage capacitance wiring (18p) is formed in the layer between the capacitance electrode (47a) and the pixel electrode (17a), the capacitance electrode (47a) and the storage capacitance wiring (18p) overlap through a first insulating film and the storage capacitance wiring (18p) and the pixel electrode (17a) overlap through a second insulating film. With this configuration, in the active matrix substrate, the storage capacitance value can be increased without lowering the aperture ratio.
    Type: Application
    Filed: October 22, 2009
    Publication date: November 17, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Toshihide Tsubata
  • Publication number: 20110279764
    Abstract: An active matrix substrate has a structure that prevents a drain extraction line from breaking without a plurality of active elements such as thin film transistor elements, metal-insulator-metal elements, MOS transistor elements, diodes, and varistors being disposed, and is suited for use in a large-size liquid crystal television or a like liquid crystal display device equipped with a large-size liquid crystal display panel. The active matrix substrate includes an active element connected, via a drain extraction line, to a storage capacitor upper electrode, wherein the drain extraction line has at least two routes.
    Type: Application
    Filed: August 1, 2011
    Publication date: November 17, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Ryuji KURIHARA, Yuhko HISADA, Toshihide TSUBATA, Masanori TAKEUCHI, Tomokazu OHTSUBO
  • Publication number: 20110279734
    Abstract: With a configuration in which a first pixel electrode (17a) electrically connected to a first transistor (12) and a second pixel electrode (17b) connected to the first pixel electrode (17a) through a capacitance are provided in a single pixel, a storage capacitance wiring (18j) is formed in the same layer with a data signal line (15j), a second transistor (212c) is electrically connected to the storage capacitance wiring (18j) and to the first pixel electrode (17a), and a third transistor (212b) is electrically connected to the storage capacitance wiring (18j) and to the second pixel electrode (17b), a capacitance coupling type active matrix substrate equipped with transistors for discharge suppresses the aperture ratio reduction and load increase on gate bus lines (scan signal lines).
    Type: Application
    Filed: October 29, 2009
    Publication date: November 17, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Toshihide Tsubata
  • Patent number: 8059253
    Abstract: A color filter substrate in which the heights of columnar spacers can be arbitrarily controlled by a simple manufacturing process, and a liquid crystal display device including such a color filter substrate are provided. The color filter substrate includes a transparent substrate, a light-shield layer and a color filter layer provided on the transparent substrate, columnar spacers sticking out of the transparent substrate, and a protrusion to control the orientation of liquid crystal molecules. The color filter layer includes first, second and third color filters transmitting light rays in different colors. The columnar spacers include first and second types of columnar spacers with different heights. Each spacer of the first type includes a first lower structure, including at least one layer made of the same film as at least one of the first, second and third color filters and the light-shield layer, and a first upper structure, including a layer made of the same film as the protrusion.
    Type: Grant
    Filed: December 1, 2006
    Date of Patent: November 15, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tsuyoshi Tokuda, Toshihide Tsubata, Akihiro Shohraku
  • Publication number: 20110261268
    Abstract: A liquid crystal display of the present invention contains a first panel and a second panel being stacked. Adjacent pairs of polarizers (A to C) disposed on the panels form crossed Nicols. When the first panel produces a display according to a first display signal, the second panel produces a display according to a second display signal obtained from the first display signal. Each of the two joined panels is provided with a light diffusion layer having a light diffusing property. The provision of the light diffusion layers enables reducing moire pattern occurrences which would otherwise markedly increase when two liquid crystal panels are stacked. As a result, the liquid crystal display has high display quality.
    Type: Application
    Filed: June 29, 2011
    Publication date: October 27, 2011
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Nobuhiko Nakai, Mitsuaki Hirata, Mitsuhiro Shigeta, Naoshi Yamada, Toshihide Tsubata, Shigeaki Mizushima, Yoshiki Takata, Masayuki Katakami, Makoto Shiomi
  • Patent number: 8045076
    Abstract: An active matrix substrate includes a transistor, a pixel electrode connected with one of the current-flowing electrodes of the transistor, a storage capacitor wiring, a lead wiring extending from one of the current-flowing electrodes of the transistor, and a repair wiring extending from the storage capacitor wiring. The repair wiring overlaps a portion of the lead wiring with an insulating layer interposed therebetween. As a result, TFT defects (for example, a short circuit between a source electrode and a drain electrode) can be repaired, and performance of fast display and reduction in electric power consumption can be realized.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: October 25, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshihide Tsubata, Yoshihiro Okada, Atsushi Ban, Toshinori Sugihara
  • Publication number: 20110248273
    Abstract: In each pixel region, (i) a first pixel electrode (17a) connected to a first transistor (12a), (ii) a second pixel electrode (17b) connected to a second transistor (17b), (iii) a coupling electrode (67y), and (iv) first and second capacitor electrodes (67x and 67z) provided in a layer in which a data signal line (15) is provided, being provided, a capacitor being defined by the coupling electrode (67y) and the second pixel electrode (17b), the coupling electrode (67y) being connected to the first pixel electrode (17a) via a third transistor (112), the first capacitor electrode (67x) and a retention capacitor line (18) overlapping each other via a gate insulating film, the first capacitor electrode (67x) being connected to the first pixel electrode (17a), the second capacitor electrode (67z) and the retention capacitor line (18) overlapping each other via the gate insulating film, the second capacitor electrode (67z) being connected to the second pixel electrode (17b).
    Type: Application
    Filed: September 3, 2009
    Publication date: October 13, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Toshihide Tsubata
  • Patent number: 8035768
    Abstract: A liquid crystal display uses a pixel division method by which the size of a defect can be reduced much more than conventionally possible, and a defect correcting method for the liquid crystal display. The liquid crystal display is provided with an active matrix array substrate including a plurality of gate lines and a plurality of source lines arranged on a transparent substrate so as to intersect with each other, and a plurality of pixel electrodes arranged in a matrix, each pixel electrode including an assembly of a plurality of sub-pixel electrodes, separate TFTs respectively connected to the sub-pixel electrodes in the vicinity of an intersection portion of the gate line and the source line, the TFTs being driven by the common gate line and the common source line, and at least one opening portion being formed in a lower-layer side line placed in a lower layer at the intersection portion.
    Type: Grant
    Filed: February 1, 2011
    Date of Patent: October 11, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tomoki Noda, Toshihide Tsubata, Masanori Takeuchi, Kenji Enda
  • Patent number: 8031282
    Abstract: An active matrix substrate has a structure that prevents a drain extraction line from breaking without a plurality of active elements such as thin film transistor elements, metal-insulator-metal elements, MOS transistor elements, diodes, and varistors being disposed, and is suited for use in a large-size liquid crystal television or a like liquid crystal display device equipped with a large-size liquid crystal display panel. The active matrix substrate includes an active element connected, via a drain extraction line, to a storage capacitor upper electrode, wherein the drain extraction line has at least two routes.
    Type: Grant
    Filed: April 4, 2008
    Date of Patent: October 4, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Ryuji Kurihara, Yuhko Hisada, Toshihide Tsubata, Masanori Takeuchi, Tomokazu Ohtsubo
  • Publication number: 20110227097
    Abstract: An active matrix substrate includes: pixel regions (5L, 5R, and 5M) provided in line and column direction; scan signal lines (16? and 16?); data signal lines (Sp, Sq, sp, and sq) crossing the scan signal lines at right angles; a gate insulating film covering the scan signal lines; and an interlayer insulating film covering the data signal lines, two of the data signal lines (Sq and sp) being provided (i) so as to overlap a gap between two of the pixel regions (5L and 5R) which are adjacent to each other in the line direction or (ii) so as to overlap a region which extends along the gap, the interlayer insulating film having a hollow part K so that the hollow part K and a gap between the two of the data signal lines (Sq and sp) overlap each other, and part of the hollow part K and the scan signal lines (16? and 16?) overlap each other via the gate insulating film.
    Type: Application
    Filed: August 27, 2008
    Publication date: September 22, 2011
    Inventors: Toshihide Tsubata, Toshinori Sugihara
  • Patent number: 8023056
    Abstract: An active matrix substrate including, in each pixel area, a transistor, a pixel electrode (17), a conductive member (18) functioning as one of electrodes of a storage capacitor, a drain lead-out (7) electrode connected to a drain electrode of the transistor, and overlapping with the conductive member (18), and a contact hole for connecting the drain lead-out electrode (7) to the pixel electrode (17), includes a gate insulating film (40) covering a gate electrode of each transistor, the gate insulating film including a first thickness portion (41) overlapping with at least part of the contact hole, and a second thickness portion (42) formed adjacent to the first thickness portion, and overlapping with the drain lead-out electrode, the first thickness portion (41) having a greater thickness than the second thickness portion (42).
    Type: Grant
    Filed: November 14, 2006
    Date of Patent: September 20, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masanori Takeuchi, Toshihide Tsubata
  • Patent number: 8023072
    Abstract: A color filter substrate is used in a display device including pixels arranged in columns and rows to define a matrix pattern. The color filter substrate includes a transparent substrate and coloring layers, including a first color filter layer, a second color filter layer and an light shielding layer, provided on the transparent substrate. The first and second color filter layers include a first color filter column and a second color filter column, respectively, each of which is arranged for an associated column of pixels. The light shielding layer includes an light shielding column, which is provided for a gap between two adjacent columns of pixels.
    Type: Grant
    Filed: June 20, 2005
    Date of Patent: September 20, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshihide Tsubata, Tsuyoshi Tokuda, Masayuki Tsuji
  • Publication number: 20110216249
    Abstract: Disclosed is an active matrix including a scanning signal line (16x), a data signal line (15x), and a first insulating film; and including, in a pixel region (101), a transistor (12a), a first pixel electrode (17a) connected to the data signal line via the transistor, a second pixel electrode (17b), a first capacitor electrode (87) electrically connected to the first pixel electrode (17a), and a second capacitor electrode (47) electrically connected to the second pixel electrode (17b), wherein the first capacitor electrode is provided in a same layer as the scanning signal line, the second capacitor electrode is provided in a same layer as the data signal line, and the first and second capacitor electrodes (87, 47) overlap each other by having the first insulating film sandwiched therebetween to form a capacitor between the first and second capacitor electrodes (87, 47).
    Type: Application
    Filed: August 19, 2009
    Publication date: September 8, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Toshihide Tsubata
  • Publication number: 20110211130
    Abstract: Disclosed is an active matrix including: a second capacitor electrode (37) electrically connected to a first pixel electrode (17a); and a first capacitor electrode (77) electrically connected to a second pixel electrode (17b), which second capacitor electrode (37) is provided in a layer sandwiched between the first capacitor electrode (77) and the second pixel electrode (17b).
    Type: Application
    Filed: August 19, 2009
    Publication date: September 1, 2011
    Inventor: Toshihide Tsubata
  • Patent number: 8009248
    Abstract: A liquid crystal display of the present invention contains a first panel and a second panel being stacked. Adjacent pairs of polarizers (A to C) disposed on the panels form crossed Nicols. When the first panel produces a display according to a first display signal, the second panel produces a display according to a second display signal obtained from the first display signal. Each of the two joined panels is provided with a light diffusion layer having a light diffusing property. The provision of the light diffusion layers enables reducing moire pattern occurrences which would otherwise markedly increase when two liquid crystal panels are stacked. As a result, the liquid crystal display has high display quality.
    Type: Grant
    Filed: September 27, 2006
    Date of Patent: August 30, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Nobuhiko Nakai, Mitsuaki Hirata, Mitsuhiro Shigeta, Naoshi Yamada, Toshihide Tsubata, Shigeaki Mizushima, Yoshiki Takata
  • Publication number: 20110205200
    Abstract: Disclosed herein is a liquid crystal panel including: first and second pixel electrode (17a and 17b) in a single pixel (101); a first upper capacitor electrode (37a) connected with the first pixel electrode (17a); a second upper capacitor electrode (37b) connected with the second pixel electrode (17b); a first lower capacitor electrode (47a) that is provided in a layer in which a scanning signal line (16x) is provided and that is connected with the first pixel electrode (17a); and a second lower capacitor electrode (47b) that is provided in the layer and that is connected with the second pixel electrode (17b), the first pixel electrode (17a) being connected with a data signal line (15x) via a transistor (12a), a capacitor being formed between the first upper capacitor electrode (37a) and the second lower capacitor electrode (47b), a capacitor being formed between the second upper capacitor electrode (37b) and the first lower capacitor electrode (47a).
    Type: Application
    Filed: July 9, 2009
    Publication date: August 25, 2011
    Inventor: Toshihide Tsubata
  • Publication number: 20110194031
    Abstract: An active matrix substrate of the present invention for use in a liquid crystal panel includes a scanning signal line (16x), a data signal line (15x), and a transistor (12a) connected to the scanning signal line (16x) and the data signal line (15x), with first and second pixel electrodes (17a and 17b) provided in each pixel (101), one of the pixel electrodes (17a) being connected to the data signal line (15x) via the transistor (12a). The active matrix substrate includes first and second capacitor electrodes (37a and 38a) electrically connected to the pixel electrode (17a), capacitors being formed between the capacitor electrodes (37a and 38a) and the other pixel electrode (17b), respectively. This makes it possible to improve yields of manufacture of capacitively-coupled pixel-division type active matrix substrates and liquid crystal panels including the same.
    Type: Application
    Filed: July 23, 2009
    Publication date: August 11, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Toshihide Tsubata
  • Patent number: 7995177
    Abstract: A liquid crystal display device includes: a vertical alignment liquid crystal layer; first and second substrates facing each other with the liquid crystal layer interposed; first and second electrodes arranged on the first and second substrates to face the liquid crystal layer; and at least one alignment film in contact with the liquid crystal layer. A pixel region includes a first liquid crystal domain in which liquid crystal molecules are tilted in a first direction around the center of a plane, and approximately at the middle of the thickness, of the liquid crystal layer responsive to a voltage applied. The first liquid crystal domain is close to at least a part of an edge of the first electrode. The part includes a first edge portion in which an azimuthal direction, perpendicular to the part and pointing toward the inside of the first electrode, defines an angle greater than 90 degrees to the first direction.
    Type: Grant
    Filed: June 9, 2006
    Date of Patent: August 9, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akihiro Shoraku, Toshihide Tsubata, Koichi Miyachi, Iichiro Inoue, Akihiro Yamamoto, Yoshito Hashimoto, Masumi Kubo, Akihito Jinda
  • Patent number: 7978273
    Abstract: An active-matrix substrate includes: scanning signal lines; data signal lines; first storage capacitor wires; second storage capacitor wires; and pixels, disposed at intersections between the scanning signal lines and the data signal lines, each of which includes a plurality of sub-pixels. Each of the data signal lines is split into two parts at a region where the number of scanning signal lines intersecting the data signal line is ½ of the total number of scanning signal lines. A data signal line split section is formed on a region that does not overlap the second storage capacitor wires. This makes it possible to provide an active-matrix substrate, a display device, and a television receiver in each of which a data signal line split into two parts and a storage capacitor wire are hardly electrically short-circuited in the case of a combination of a split-screen structure and a multi-pixel structure.
    Type: Grant
    Filed: February 28, 2007
    Date of Patent: July 12, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masanori Takeuchi, Toshihide Tsubata