Patents by Inventor Toshihide Tsubata

Toshihide Tsubata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110043498
    Abstract: Provided are an active matrix substrate including plural pixel electrodes in a single pixel region and a liquid crystal display device (capacitor-coupled pixel division mode) including the same. The liquid crystal display device (capacitor-coupled pixel division mode) hardly causes image-sticking of sub-pixels even during double-speed driving. The active matrix substrate includes: a data signal line (15x); first and second scanning signal lines (16a, 16b); a first transistor (12a) connected to the data signal line (15x) and the first scanning signal line (16a); a second transistor (12b) connected to the second scanning signal line (16b) and a data signal line (15y) neighboring the data signal line (15x); and first and second pixel electrodes (17a, 17b) in a single pixel region (101). The first pixel electrode (17a) is connected to the data signal line (15x) via the first transistor (12a).
    Type: Application
    Filed: January 9, 2009
    Publication date: February 24, 2011
    Inventor: Toshihide Tsubata
  • Patent number: 7893509
    Abstract: In a transistor adapted to suppress characteristic degradation resulting from fluorine contained in a deposited film, the concentration of fluorine contained in a gate insulating film is reduced to 1.0×1020 atoms/cm3 or less. As a result, the transistor can provide excellent reliability even when it is continuously driven for a long period of time at a relatively high temperature.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: February 22, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshihide Tsubata, Toshinori Sugihara
  • Publication number: 20110037689
    Abstract: A liquid crystal panel of the present invention is a liquid crystal panel including a scanning signal line (16x), a data signal line (15x), a transistor (12a) being connected with the scanning signal line (16x) and the data signal line (15x), a first pixel electrode (17a), and a second pixel electrode (17b), the first pixel electrode (17a) and the second pixel electrode (17b) being provided in a single pixel (101), said liquid crystal panel, further including a first capacitor electrode (37a) and a second capacitor electrode (37b), the first capacitor electrode (37a), the first pixel electrode (17a), and a conductive electrode (9a) of the transistor (12a) being electrically connected with each other, the second capacitor electrode (37b) being electrically connected with the second pixel electrode (17b), the first capacitor electrode (37a) and the second pixel electrode (17b) forming a capacitor, and the second capacitor electrode (37b) and the first pixel electrode (17a) forming a capacitor.
    Type: Application
    Filed: January 19, 2009
    Publication date: February 17, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Toshihide Tsubata
  • Patent number: 7884906
    Abstract: It is an object of the present invention to provide a substrate for liquid crystal display by means of which a generation of air bubbles in a liquid crystal layer after charging a liquid crystal can be prevented, and a liquid crystal display having a good display quality level can be obtained at a high yield, and to provide a liquid crystal display unit provided with such substrate for liquid crystal display. The present invention is directed to a substrate for liquid crystal display, comprising a projection for controlling alignments of liquid crystal molecules, wherein a slit is provided in the projection for controlling alignments of liquid crystal molecules.
    Type: Grant
    Filed: May 26, 2005
    Date of Patent: February 8, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masayuki Tsuji, Toshihide Tsubata, Yuhko Hisada
  • Publication number: 20110025937
    Abstract: The active matrix substrate of the present invention is the active matrix substrate in which the faulty connection in a storage capacitor element as caused by a short circuit between storage capacitor electrodes due to a conductive foreign material or a pinhole in an insulating layer or by a short circuit between a data signal line and a storage capacitor upper electrode can be repaired with ease.
    Type: Application
    Filed: October 4, 2010
    Publication date: February 3, 2011
    Inventors: Toshifumi YAGI, Toshihide Tsubata, Masanori Takeuchi, Yuhko Hisada
  • Publication number: 20110025923
    Abstract: A first pixel electrode (17a), a second pixel electrode (17b), a third pixel electrode (17c), and a fourth pixel electrode (17d) are provided in a pixel (100); the first pixel electrode (17a) is connected to a data signal line (15x) via a first transistor (12a), the second pixel electrode (17b) is connected to the data signal line (15x) via a second transistor (12b), and the first transistor (12a) and the second transistor (12b) are connected to the same scanning signal line (16x); the first pixel electrode (17a) is connected to the third pixel electrode (17c) via a capacitor, and the second pixel electrode (17b) is connected to the fourth pixel electrode (17d) via a capacitor; one of two storage capacitor wires (18p, 18q) forms a capacitance with the first pixel electrode (17a), and the other one of the two storage capacitor wires (18p, 18q) forms a capacitance with the second pixel electrode (17b); and one of the two storage capacitor wires (18p, 18q) receives a storage capacitor wire signal, and the other
    Type: Application
    Filed: December 26, 2008
    Publication date: February 3, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Toshihide Tsubata
  • Patent number: 7880857
    Abstract: An active matrix substrate includes a transistor, a pixel electrode connected with one of the current-flowing electrodes of the transistor, a storage capacitor wiring, a lead wiring extending from one of the current-flowing electrodes of the transistor, and a repair wiring extending from the storage capacitor wiring. The repair wiring overlaps a portion of the lead wiring with an insulating layer interposed therebetween. As a result, TFT defects (for example, a short circuit between a source electrode and a drain electrode) can be repaired, and performance of fast display and reduction in electric power consumption can be realized.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: February 1, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshihide Tsubata, Yoshihiro Okada, Atsushi Ban, Toshinori Sugihara
  • Publication number: 20110019114
    Abstract: Provided are an active matrix substrate including plural pixel electrodes in a pixel region and a liquid crystal display device (pixel division mode) using the same. Proposed is a configuration of the liquid crystal display device of the capacitor-coupled pixel division mode which hardly causes reduction in display quality due to image-sticking of sub-pixels.
    Type: Application
    Filed: January 21, 2009
    Publication date: January 27, 2011
    Inventor: Toshihide Tsubata
  • Publication number: 20110012815
    Abstract: An active matrix substrate includes: scan signal lines 16x; data signal lines 15x; and switching elements (12a, 12b), the active matrix substrate further including, in each pixel region (100): a pixel electrode (17a) connected to a corresponding one of the data signal lines (15x) via a corresponding one of the switching elements (12a); a pixel electrode (17b) connected to the corresponding one of the data signal lines (15x) via the corresponding one of the switching elements (12b); and a pixel electrode (17c) connected to the pixel electrode (17a) via a capacitance (Cac), the pixel (100) being intersected by a corresponding one of the scan signal lines (16x) so as to be divided into two parts, the pixel electrode (17a) being provided in one of the two parts, the pixel electrode (17b) being provided in the other one of the two parts.
    Type: Application
    Filed: October 30, 2008
    Publication date: January 20, 2011
    Inventor: Toshihide Tsubata
  • Patent number: 7868960
    Abstract: An active matrix substrate includes a plurality of transistors. A source electrode is connected with a data signal line, and a drain electrode is connected with a pixel electrode in each transistor. The source electrode is located on a semiconductor layer, and at least a portion of the drain electrode is overlapped with the gate electrode. A gate insulating film covering the gate electrode of each transistor has a thin section having a reduced film thickness, at a portion where the gate insulating film is overlapped with each gate electrode. An overlapping area of the thin section with the source electrode is smaller than an overlapping area of the thin section with the drain electrode. Thus, the active matrix substrate can prevent the generation of short-circuits between the signal lines (between the data signal line and a scanning signal line) in a TFT forming region, while guaranteeing TFT characteristics.
    Type: Grant
    Filed: October 24, 2006
    Date of Patent: January 11, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshihide Tsubata, Yoshihiro Okada
  • Publication number: 20100328198
    Abstract: An active matrix substrate of at least one embodiment includes a first data signal line, first and second scanning signal lines, a first transistor to which the first data signal line and the first scanning signal line are connected, a second transistor to which the first data signal line and the second scanning signal line are connected, and first and second pixel electrodes provided in one pixel region, in which the first and second pixel electrodes are connected to each other via a coupling capacitor, and one of the first and second transistors is connected to the first pixel electrode and the other one of the first and second transistors is connected to the second pixel electrode. This configuration enables enhancement of display quality (viewing angle characteristic) in a liquid crystal display device of a capacitively coupled type pixel division mode.
    Type: Application
    Filed: October 10, 2008
    Publication date: December 30, 2010
    Inventor: Toshihide Tsubata
  • Patent number: 7855774
    Abstract: The method of the present invention includes the steps of: (A) providing a first substrate, and a second substrate, wherein the first substrate includes a first light shielding layer provided within a non-display region, the first light shielding layer including a light-transmitting portion provided near an outer boundary of the first light shielding layer, the light-transmitting portion comprising a recess or an opening; (B) drawing a seal pattern with a sealant, the seal pattern being drawn outside the first light shielding layer so as to surround the display region, comprising the substeps of: (B1) beginning application of the sealant near the light-transmitting portion, (B2) applying the sealant along an outer periphery of the first light shielding layer, and (B3) forming a junction with the sealant having been applied near the light-transmitting portion; (C) applying a liquid crystal material within the display region surrounded by the sealant; (D) attaching the first substrate and the second substrate;
    Type: Grant
    Filed: July 13, 2010
    Date of Patent: December 21, 2010
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Naoshi Yamada, Hidehiko Yamaguchi, Toshihide Tsubata, Yukio Kurozumi, Masayuki Tsuji
  • Publication number: 20100302131
    Abstract: At least one embodiment of the present invention provides a configuration in which: each pixel array is provided correspondingly with a first and second data signal lines; a pixel included in each pixel array includes four subpixels which are connected to an identical scanning signal line; the pixel is associated correspondingly with two storage capacitor wires; the two subpixels of the pixel define respective capacitances with one of the two storage capacitor wires; one of the two subpixels is connected to the first data signal line while the other one of the two subpixels is connected to the second data signal lien; the other two subpixels define respective capacitances with the other one of the two storage capacitor wires; and one of the other two subpixels is connected to the first data signal line while the other one of the other two subpixels is connected to the second data signal line.
    Type: Application
    Filed: September 3, 2008
    Publication date: December 2, 2010
    Inventor: Toshihide Tsubata
  • Publication number: 20100296020
    Abstract: A liquid crystal display uses a pixel division method by which the size of a defect can be reduced much more than conventionally possible, and a defect correcting method for the liquid crystal display. The liquid crystal display is provided with an active matrix array substrate including a plurality of gate lines and a plurality of source lines arranged on a transparent substrate so as to intersect with each other, and a plurality of pixel electrodes arranged in a matrix, each pixel electrode including an assembly of a plurality of sub-pixel electrodes, separate TFTs respectively connected to the sub-pixel electrodes in the vicinity of an intersection portion of the gate line and the source line, the TFTs being driven by the common gate line and the common source line, and at least one opening portion being formed in a lower-layer side line placed in a lower layer at the intersection portion.
    Type: Application
    Filed: July 30, 2010
    Publication date: November 25, 2010
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Tomoki NODA, Toshihide TSUBATA, Masanori TAKEUCHI, Kenji ENDA
  • Patent number: 7838881
    Abstract: An active matrix substrate includes: a plurality of pixel electrodes arranged in a matrix pattern and each forming a pixel; a plurality of gate lines each provided between the corresponding pixel electrodes and extending in parallel with each other; a plurality of first source lines each provided between the corresponding pixel electrodes and extending in a direction crossing an extending direction of the gate lines; a plurality of TFTs provided corresponding to the respective pixel electrodes and connected to the respective pixel electrodes, the respective gate lines, and the respective first source lines; a plurality of capacitor lines each provided between the corresponding gate lines and extending in parallel with each other; and a plurality of second source lines each provided between the corresponding pixel electrodes and extending in parallel with the first source lines.
    Type: Grant
    Filed: May 19, 2006
    Date of Patent: November 23, 2010
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Toshihide Tsubata
  • Patent number: 7830467
    Abstract: An active matrix substrate includes a thin film transistor, a scanning signal line, and a data signal line disposed on the substrate. A gate electrode of the transistor is connected to the scanning signal line, a source electrode thereof is connected to the data signal line, and a drain electrode thereof is connected to a pixel electrode; and an upper electrode is disposed so as to oppose a storage capacitor wiring pattern at least via an insulating layer. Within a pixel region, the upper electrode includes three divided electrodes in a region opposing the storage capacitor wiring pattern, and a central divided electrode of the three divided electrodes has the smallest area.
    Type: Grant
    Filed: August 18, 2008
    Date of Patent: November 9, 2010
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshifumi Yagi, Toshihide Tsubata, Masanori Takeuchi, Yuhko Hisada
  • Publication number: 20100277683
    Abstract: The method of the present invention includes the steps of: (A) providing a first substrate, and a second substrate, wherein the first substrate includes a first light shielding layer provided within a non-display region, the first light shielding layer including a light-transmitting portion provided near an outer boundary of the first light shielding layer, the light-transmitting portion comprising a recess or an opening; (B) drawing a seal pattern with a sealant, the seal pattern being drawn outside the first light shielding layer so as to surround the display region, comprising the substeps of: (B1) beginning application of the sealant near the light-transmitting portion, (B2) applying the sealant along an outer periphery of the first light shielding layer, and (B3) forming a junction with the sealant having been applied near the light-transmitting portion; (C) applying a liquid crystal material within the display region surrounded by the sealant; (D) attaching the first substrate and the second substrate;
    Type: Application
    Filed: July 13, 2010
    Publication date: November 4, 2010
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Naoshi YAMADA, Hidehiko YAMAGUCHI, Toshihide TSUBATA, Yukio KUROZUMI, Masayuki TSUJI
  • Patent number: 7826012
    Abstract: A color filter substrate and a liquid crystal display apparatus include, on a substrate: a colorized layer including color layers; a stacked layer protruding in comparison with the colorized layer; an opposing electrode covering the colorized layer and the stacked layer; an alignment layer formed at least on a part of the opposing electrode covering the colorized layer; and an insulating layer stacked on an entire surface of another part of the opposing electrode covering the stacked layer. With this, the short circuit between the opposing electrode and a pixel electrode is prevented, so that a color filter substrate, a liquid crystal display apparatus including the color filter substrate, and a method of manufacturing the color substrate, those being able to improve the yield of the liquid crystal display apparatus, are provided.
    Type: Grant
    Filed: June 24, 2009
    Date of Patent: November 2, 2010
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshifumi Yagi, Toshihide Tsubata, Tsuyoshi Tokuda
  • Publication number: 20100265410
    Abstract: In a liquid crystal display, a first data signal line and a second data signal line are provided for each pixel column. In at least one embodiment, in a case where every two pixels in the pixel column are paired, one of two pixels in each pair is connected with the first data signal line and the other of the two pixels is connected with the second data signal line, two scanning signal lines respectively connected with the two pixels are simultaneously selected during one horizontal scanning period so that signal potentials are written into the two pixels from the first data signal line and the second data signal line, respectively, during each horizontal scanning period, supply of the signal potentials to the first data signal line and the second data signal line is performed after supply of preliminary potentials to the first data signal line and the second data signal line.
    Type: Application
    Filed: November 11, 2008
    Publication date: October 21, 2010
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Toshinori Sugihara, Atsushi Ban, Toshihide Tsubata
  • Patent number: 7812893
    Abstract: An active matrix substrate suppresses reduction in production yield and increase in production steps and simultaneously permits both sufficient securing of a storage capacity and improvement of an aperture ratio of a pixel. The active matrix substrate is an active matrix substrate and includes a thin film transistor disposed at an intersection of a scanning signal line with a data signal line on a substrate, the thin film transistor including a gate electrode connected to the scanning signal line, a source electrode connected to the data signal line, and a drain electrode connected to a drain lead-out wiring; a storage capacitor upper electrode connected to the drain lead-out wiring and a pixel electrode; and a storage capacitor wiring overlapping with the storage capacitor upper electrode through an insulating film, wherein the storage capacitor wiring has an extending portion overlapping with the drain lead-out wiring through the insulating film.
    Type: Grant
    Filed: September 20, 2005
    Date of Patent: October 12, 2010
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshifumi Yagi, Toshihide Tsubata, Tsuyoshi Tokuda, Kenji Enda, Yoshinori Shimada, Shinya Maruoka