Abstract: First and second data signal lines are provided for a column of pixels, and signal potentials of opposite polarity to each other are supplied to the data signal lines respectively. In at least one embodiment, a predetermined pixel is taken as the first pixel. A pixel other than the (2×n×i+1)-th pixel in the scanning direction is connected to a data signal line different from that connected to the previous pixel, whereas the (2×n×i+1)-th pixel is connected to the same data signal line as that connected to the previous pixel. The polarity of the signal potential supplied to each data signal line is inverted every n horizontal scanning periods. Every adjacent two scan signal lines starting from the scan signal line connected to the predetermined pixel are sequentially selected at the same time among scan signal lines. A liquid crystal display with this structure enables an increase of the pixel charging time as well as prevention of flickering.

Abstract: An object of the present invention is to provide a liquid crystal display device which is capable of preventing single-image prolonged-display screen burn while keeping an image constantly on display. The liquid crystal display device includes a liquid crystal panel provided with groups of pixel formation portions disposed in a matrix pattern, and a backlight which is capable of turning ON/OFF of lighting for each region which includes a predetermined number of scanning lines. Each frame period for an entered video signal is divided into a first sub-frame period and a second sub-frame period. In the first sub-frame period, the liquid crystal panel is supplied with a data signal based on the entered video signal as the scanning lines are selected. In the second sub-frame period a data signal based on a refresh data for prevention of screen burn is supplied.

Abstract: An active-matrix substrate includes: scanning signal lines; data signal lines; first storage capacitor wires; second storage capacitor wires; and pixels, disposed at intersections between the scanning signal lines and the data signal lines, each of which includes a plurality of sub-pixels. Each of the data signal lines is split into two parts at a region where the number of scanning signal lines intersecting the data signal line is ½ of the total number of scanning signal lines. A data signal line split section is formed on a region that does not overlap the second storage capacitor wires. This makes it possible to provide an active-matrix substrate, a display device, and a television receiver in each of which a data signal line split into two parts and a storage capacitor wire are hardly electrically short-circuited in the case of a combination of a split-screen structure and a multi-pixel structure.

Abstract: An active matrix substrate includes a transistor, a pixel electrode, a drain lead electrode connected with the drain electrode of the transistor, and a contact hole connecting the drain lead electrode and the pixel electrode. A non-electrode through-bore portion is created on the drain lead electrode, and an opening of the contact hole crosses the through-bore portion. As a result, any changes or decreases in the contact area between the drain lead electrode and the pixel electrode may be prevented or reduced significantly, while the open area ratio can be improved.

Abstract: The method of the present invention includes the steps of: (A) providing a first substrate, and a second substrate, wherein the first substrate includes a first light shielding layer provided within a non-display region, the first light shielding layer including a light-transmitting portion provided near an outer boundary of the first light shielding layer, the light-transmitting portion comprising a recess or an opening; (B) drawing a seal pattern with a sealant, the seal pattern being drawn outside the first light shielding layer so as to surround the display region, comprising the substeps of: (B1) beginning application of the sealant near the light-transmitting portion, (B2) applying the sealant along an outer periphery of the first light shielding layer, and (B3) forming a junction with the sealant having been applied near the light-transmitting portion; (C) applying a liquid crystal material within the display region surrounded by the sealant; (D) attaching the first substrate and the second substrate;

Abstract: A liquid crystal display uses a pixel division method by which the size of a defect can be reduced much more than conventionally possible, and a defect correcting method for the liquid crystal display. The liquid crystal display is provided with an active matrix array substrate including a plurality of gate lines and a plurality of source lines arranged on a transparent substrate so as to intersect with each other, and a plurality of pixel electrodes arranged in a matrix, each pixel electrode including an assembly of a plurality of sub-pixel electrodes, separate TFTs respectively connected to the sub-pixel electrodes in the vicinity of an intersection portion of the gate line and the source line, the TFTs being driven by the common gate line and the common source line, and at least one opening portion being formed in a lower-layer side line placed in a lower layer at the intersection portion.

Abstract: An active matrix substrate includes a substrate, a TFT formed on the substrate, a storage capacitor element formed on the substrate, an interlayer insulating film covering the storage capacitor element, and a pixel electrode formed on the interlayer insulating film. The storage capacitor element includes a storage capacitor line, an insulating film formed on the storage capacitor line, and two or more storage capacitor electrodes opposed to the storage capacitor line with the insulating film interposed therebetween. The two or more storage capacitor electrodes are electrically connected via associated contact holes formed in the interlayer insulating film to the pixel electrode and electrically continuous with a drain electrode of the TFT.

Abstract: A method of manufacturing an active matrix substrate prevents an increase in the number of production steps while simultaneously preventing electrostatic discharge at a TFT channel. The method preferably includes the steps of forming a short-circuit wiring for connecting a data signal line or a source electrode to a drain electrode or a drain side circuit; successively forming an upper insulating film having an opening for short-circuit wiring separation and a transparent conductive film at a region above the short-circuit wiring as upper layers of the short-circuit wiring; and removing at least the transparent conductive film inside the opening for short-circuit wiring separation and the short-circuit wiring below the opening for short-circuit wiring separation to perform patterning of the pixel electrode and separation of the short-circuit wiring in the same step.

Abstract: Each picture element includes first and second sub-picture elements, each of which includes a liquid crystal capacitor and at least one storage capacitor. After a display voltage representing a certain grayscale level has been applied to the respective sub-picture element electrodes of the first and second sub-picture elements, a voltage difference ?V? is produced between voltages to be applied to the respective liquid crystal capacitors of the first and second sub-picture elements by way of their associated storage capacitor(s). By setting the voltage difference ?V? value of the blue and/or cyan picture element(s) to be smaller than that of the other color picture elements, shift toward the yellow range at an oblique viewing angle can be minimized.

Abstract: A color filter substrate includes: an insulating transparent substrate; a color filter layer provided on the insulating transparent substrate, including a plurality of colored layers and constituting an in-screen display region; and an in-screen frame region defined around the in-screen display region. A light-blocking layer is provided in the in-screen frame region to cover the insulating transparent substrate. A first spacer part and a second spacer part are formed in the in-screen frame region and the in-screen display region, respectively, and are oriented substantially perpendicularly to the insulating transparent substrate. The sum of the height of the first spacer part and the thickness of the light-blocking layer is substantially equal to the sum of the height of the second spacer part and the thickness of the color filter layer.

Abstract: A scanning signal line (16) includes an opening (29) leading from the outside of a pixel region through below a data signal line (15) into the pixel region, and first and second scanning electrode portions (16a/16b) or two side portions of the opening confronting in a column direction through that opening. The end portion of the first scanning electrode portion (16a) in the pixel region is a first end portion (EP1), and the end portion of the second scanning electrode portion (16b) in the pixel region is a second end portion (EP2). A first transistor has a source electrode (9a) and a drain electrode (8a) individually overlapping the first electrode portion (16a) but not the first end portion (EP1) in the pixel region. A second transistor has a source electrode (9b) and a drain electrode (8b) individually overlapping the second electrode portion (16b) but not the second end portion EP2) in the pixel region.

Abstract: An active matrix substrate comprises a TFT (4) in which a plurality of drain electrodes (16a and 16b) are provided for a single source electrode (6), and at least one of the drain electrodes is electrically connected to the pixel electrode (1) via the drain outgoing wire. The drain outgoing wire includes a first conductive pattern section comprising (i) a drain outgoing wire common section (7d) and drain outgoing branch sections (7a and 7b) each of which extends from said drain outgoing common section into each of said drain electrodes, and (ii) a correction connection electrode 9 which is partially overlapped with said branch sections of said first conductive pattern section via an insulating layer. The correction connection electrode 9 is electrically connectable to a plurality of said branch sections by being conducted to said branch sections through said insulating layer. This structure allows pixel defect correction within the pixel.

Abstract: A substrate for a display device includes a scan line, a signal line, a switching element provided on an insulating substrate, an interlayer insulation film, and a pixel electrode. The switching element is provided at an intersection of the scan line and the signal line. The switching element includes a gate electrode connected to the scan line, a source electrode connected to the signal line, and a drain electrode connected to the pixel electrode. The interlayer insulation film includes a contact hole for connecting the drain electrode of the switching element to the pixel electrode. A protective layer formed of an insulating material is provided above the scan line and/or the signal line. A portion of an underlying film under the protective layer contacts a portion of an overlying film over the protective layer.

Abstract: The present invention is a substrate for a display device comprising an active matrix substrate and an opposed substrate which are opposed to each other with a display medium layer interposed therebetween, said active matrix substrate including a pixel electrode arranged in a matrix shape on the side of the display medium layer and said opposed substrate including a common electrode opposing to the pixel electrode on the side of the display medium layer, wherein said substrate for a display device includes an electrode slit formed in one of the pixel electrode and the common electrode; and at least one of the electrical connecting portions of said electrode slit is provided outside of a light-blocking region.

Abstract: A color filter substrate according to the present invention includes a transparent substrate; at least three colors of colored layers provided on the transparent substrate; first columnar structure bodies 101 provided in pixel outskirts within a display region, the first columnar structure bodies 101 defining a cell gap; and second columnar structure bodies 102 provided in the pixel outskirts within the display region or outside the display region, the second columnar structure bodies 102 having a smaller height than that of the first columnar structure bodies 101, such that a difference from the height of the first columnar structure bodies 101 exceeds a range of elastic deformation of the first columnar structure bodies 101.

Abstract: In one embodiment of the present invention, a liquid crystal panel driving apparatus is disclosed which sequentially receives pieces of video data for one data signal line, (i) prepares a data string by sorting, in order of outputting, a plurality of pieces of video data inputted in a predetermined period while adding a piece of dummy data to a predetermined position, (ii) assigns one horizontal scanning period to an output of a piece of video data while assigning a dummy scanning period to an output of a piece of dummy data, and (iii) sets one horizontal scanning period shorter than an interval of inputting of pieces of video data. This makes it possible to suppress an increase in vertical display period even though a piece of dummy data is added to inputted video data while a dummy scanning period is assigned thereto.

Abstract: In a liquid crystal display device according to one embodiment of the present invention, when the polarities of the source signal voltages do not change over a plurality of horizontal scanning periods, the image write pulse of the gate signal supplied to a gate bus line that corresponds to pixels along the jth row rises before the source signal voltages change to values that correspond to pixels along the jth row. Next, the image write pulse of the gate signal supplied to a gate bus line that corresponds to pixels along the jth row falls, and then the image write pulse of the gate signal supplied to a gate bus line that corresponds to pixels along the kth row (j?k) rises. The polarities of the storage capacitor signal voltages applied to storage capacitor bus lines that correspond to sub-pixels of pixels along the jth row are inverted after the image write pulse of the gate signal supplied to a gate bus line that corresponds to pixels along the kth row rises.

Abstract: In one embodiment of the present invention, a gate driver creates a dummy insertion period in which the driver does not apply a gate on pulse to a scanning signal line immediately after the time of the inversion of a data signal. When a period from the time of the application of the gate on pulse to an odd numbered or even numbered scanning signal line to which the gate on pulse is applied previously to the time of the application of the gate on pulse to an even numbered or odd numbered scanning signal line to which the gate on pulse is applied later is set as an adjacent line writing time lag period for two scanning signal lines adjacent to each other, a CS control circuit allows the polarity of every CS signal to be reversed on the same cycle at least in the adjacent line writing time lag period.

Abstract: An active matrix substrate includes a substrate, a TFT formed on the substrate, a storage capacitor element formed on the substrate, an interlayer insulating film covering the storage capacitor element, and a pixel electrode formed on the interlayer insulating film. The storage capacitor element includes a storage capacitor line, an insulating film formed on the storage capacitor line, and two or more storage capacitor electrodes opposed to the storage capacitor line with the insulating film interposed therebetween. The two or more storage capacitor electrodes are electrically connected via associated contact holes formed in the interlayer insulating film to the pixel electrode and electrically continuous with a drain electrode of the TFT.

Abstract: A scanning signal line (16) has an opening (29) in the vicinity of an intersection with a data signal line (15). A first transistor (12a) includes two source electrodes (9ax and 9ay) which sandwich a drain electrode (8a); a source electrode (9ax) is connected to the data signal line (15) via a source extension electrode (10ax) stretched above the opening (29), and a source electrode (9ay) is connected to the data signal line (15) via a source extension electrode (10ay) provided off the scanning signal line (16). A second transistor (12b) includes two source electrodes (9bx and 9by) that sandwich a drain electrode (8b) therebetween. A source electrode (9bx) is connected to the data signal line (15) via a source extension electrode (10bx), and a source electrode (9by) is connected to the data signal line (15) via a source extension electrode (10by) off the scanning signal line.