Patents by Inventor Toshihiro Ohki

Toshihiro Ohki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10964805
    Abstract: A compound semiconductor device includes a compound semiconductor laminate structure including an electron transit layer and an electron supply layer, a gate electrode, a source electrode, and a drain electrode that are formed over the electron supply layer, a first insulating layer of diamond formed between the gate electrode and the drain electrode over the compound semiconductor laminate structure, and a second insulating layer formed between the gate electrode and the source electrode over the compound semiconductor laminate structure, wherein a positive compressive stress is applied from the first insulating layer to the electron supply layer, and a compressive stress from the second insulating layer to the electron supply layer is smaller than the compressive stress from the first insulating layer to the electron supply layer.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: March 30, 2021
    Assignee: FUJITSU LIMITED
    Inventors: Shirou Ozaki, Kozo Makiyama, Yuichi Minoura, Yusuke Kumazaki, Toshihiro Ohki, Naoya Okamoto
  • Publication number: 20210036139
    Abstract: A compound semiconductor device includes: a semiconductor laminate structure including an electron transit layer and an electron supply layer that are formed from a compound semiconductor; a gate electrode, a source electrode, and a drain electrode that are provided above the electron supply layer; and an insulating layer that is provided between the source electrode and the drain electrode, over the semiconductor laminate structure, and with a gate recess formed therein, wherein the gate electrode includes: a first portion in the gate recess; and a second portion that is coupled to the first portion and is provided over the insulating layer at a position further on the drain electrode side than the gate recess, wherein the insulating layer includes an aluminum oxide film in direct contact with the semiconductor laminate structure.
    Type: Application
    Filed: July 28, 2020
    Publication date: February 4, 2021
    Applicant: FUJITSU LIMITED
    Inventors: Shirou OZAKI, Toshihiro Ohki
  • Publication number: 20200227530
    Abstract: A semiconductor apparatus includes: a substrate; a first semiconductor layer of a nitride semiconductor disposed over the substrate; a second semiconductor layer of a nitride semiconductor disposed over the first semiconductor layer; an insulating film disposed over the second semiconductor layer; a source electrode and a drain electrode that are disposed over the second semiconductor layer; and a gate electrode. The gate electrode includes: a Schottky region disposed over the second semiconductor layer, and a gate field-plate region disposed over the insulating film in the vicinity of the Schottky region, wherein the gate electrode includes a first gate electrode section disposed in the gate field-plate region so as to face the drain electrode, and a second gate electrode section disposed in the Schottky region, and wherein a material constituting the first gate electrode section has a lower work function than a material constituting the second gate electrode section.
    Type: Application
    Filed: December 19, 2019
    Publication date: July 16, 2020
    Applicant: FUJITSU LIMITED
    Inventors: Yusuke Kumazaki, Kozo Makiyama, Toshihiro Ohki, Shirou OZAKI
  • Publication number: 20200203519
    Abstract: A compound semiconductor device includes a compound semiconductor stack structure, a protective film provided on the compound semiconductor stack structure and containing titanium oxide, and a polycrystalline diamond film provided on the protective film.
    Type: Application
    Filed: November 19, 2019
    Publication date: June 25, 2020
    Applicant: FUJITSU LIMITED
    Inventors: Shirou OZAKI, Toshihiro Ohki
  • Publication number: 20200058783
    Abstract: A compound semiconductor device includes a compound semiconductor laminate structure including an electron transit layer and an electron supply layer, a gate electrode, a source electrode, and a drain electrode that are formed over the electron supply layer, a first insulating layer of diamond formed between the gate electrode and the drain electrode over the compound semiconductor laminate structure, and a second insulating layer formed between the gate electrode and the source electrode over the compound semiconductor laminate structure, wherein a positive compressive stress is applied from the first insulating layer to the electron supply layer, and a compressive stress from the second insulating layer to the electron supply layer is smaller than the compressive stress from the first insulating layer to the electron supply layer.
    Type: Application
    Filed: August 2, 2019
    Publication date: February 20, 2020
    Applicant: FUJITSU LIMITED
    Inventors: Shirou OZAKI, Kozo Makiyama, Yuichi Minoura, Yusuke Kumazaki, Toshihiro Ohki, NAOYA OKAMOTO
  • Patent number: 10483185
    Abstract: A semiconductor device includes a semiconductor chip including a substrate and an element region on the substrate, a heat transfer body made of diamond, and a metal layer between the semiconductor chip and the heat transfer body, wherein the substrate includes an amorphous region on a back surface thereof, the amorphous region and the metal layer are bonded to each other, and the metal layer and the heat transfer body are bonded to each other.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: November 19, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Yuichi Minoura, Naoya Okamoto, Toshihiro Ohki
  • Publication number: 20190326404
    Abstract: A semiconductor device includes a substrate, a first semiconductor layer formed over the substrate, the first semiconductor layer being composed of a nitride semiconductor, a second semiconductor layer formed over the first semiconductor layer, the second semiconductor layer being composed of a nitride semiconductor and a gate electrode, a source electrode, and a drain electrode that are formed over the second semiconductor layer, wherein the source electrode including a plurality of protrusions that penetrate into the second semiconductor layer, and the protrusions having a side surface inclined with respect to a surface of the first semiconductor layer.
    Type: Application
    Filed: April 8, 2019
    Publication date: October 24, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Yusuke Kumazaki, Toshihiro Ohki, Kozo Makiyama, Shirou OZAKI, Yuichi Minoura
  • Publication number: 20190280110
    Abstract: A semiconductor device includes a back barrier layer formed over a substrate, a first electron transit layer formed over the back barrier layer, an opening formed in the first electron transit layer and the back barrier layer, a second electron transit layer formed over the first electron transit layer, a side surface of the first electron transit layer at a side surface within the opening, a side surface of the back barrier layer at a side surface within the opening, and a surface of the back barrier layer at a bottom surface within the opening, an electron supply layer formed over the second electron transit layer, a drain electrode formed over the electron supply layer within the opening, and a gate electrode formed to cover a side surface of the electron supply layer at a side surface within the opening from an edge part of the opening.
    Type: Application
    Filed: January 29, 2019
    Publication date: September 12, 2019
    Applicant: FUJITSU LIMITED
    Inventor: Toshihiro Ohki
  • Publication number: 20190051579
    Abstract: A semiconductor device includes a semiconductor chip including a substrate and an element region on the substrate, a heat transfer body made of diamond, and a metal layer between the semiconductor chip and the heat transfer body, wherein the substrate includes an amorphous region on a back surface thereof, the amorphous region and the metal layer are bonded to each other, and the metal layer and the heat transfer body are bonded to each other.
    Type: Application
    Filed: July 24, 2018
    Publication date: February 14, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Yuichi Minoura, Naoya Okamoto, Toshihiro Ohki
  • Patent number: 9685547
    Abstract: A semiconductor apparatus includes a substrate, a semiconductor layer formed above the substrate and including a nitride semiconductor, an electrode formed above the semiconductor layer and including gold, a barrier film formed above the electrode and a protection film formed above the semiconductor layer and including one of a silicon oxide film, a silicon nitride film, and a silicon oxynitride film. The protection film is formed on the barrier film. The barrier film includes a metal oxide material, a metal nitride film, or a metal oxynitride film.
    Type: Grant
    Filed: May 23, 2016
    Date of Patent: June 20, 2017
    Assignee: FUJITSU LIMITED
    Inventor: Toshihiro Ohki
  • Patent number: 9647084
    Abstract: A semiconductor device includes: a first electrode; a second electrode; an interlayer insulating film made of a porous insulating material and formed above the first electrode and the second electrode; and connection parts electrically connected to the first electrode and the second electrode respectively, wherein a cavity is formed between the interlayer insulating film and a surface of the first electrode, a surface of the second electrode, and parts of surfaces of the connection parts.
    Type: Grant
    Filed: December 11, 2015
    Date of Patent: May 9, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Shirou Ozaki, Naoya Okamoto, Kozo Makiyama, Toshihiro Ohki
  • Publication number: 20170104098
    Abstract: A semiconductor device includes a first semiconductor layer of a first conductivity type formed on one side of a semiconductor substrate; a second semiconductor layer of a second conductivity type formed on the first semiconductor layer; a third semiconductor layer of the first conductivity type formed on the second semiconductor layer; an opening part formed by removing part of the first to third semiconductor layers; a gate insulating film formed so as to cover an inner wall of the opening part; a gate electrode formed inside the opening part via the gate insulating film; a source electrode formed on a surface of the third semiconductor layer; a drain electrode connected to a part corresponding to the gate electrode on another side of the semiconductor substrate; and a fourth electrode formed on the another side of the semiconductor substrate at a part corresponding to the source electrode.
    Type: Application
    Filed: December 21, 2016
    Publication date: April 13, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Toshihiro OHKI, Masato NISHIMORI, Tadahiro IMADA
  • Patent number: 9608083
    Abstract: A semiconductor device includes a first semiconductor layer formed over a substrate, a second semiconductor layer formed over the first semiconductor layer, a source electrode and a drain electrode formed over the second semiconductor layer, an insulating film formed over the second semiconductor layer, a gate electrode formed over the insulating film, and a protection film covering the insulating film, the protection film being formed by thermal CVD, thermal ALD, or vacuum vapor deposition.
    Type: Grant
    Filed: June 9, 2015
    Date of Patent: March 28, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Shirou Ozaki, Masahito Kanamura, Norikazu Nakamura, Toyoo Miyajima, Masayuki Takeda, Keiji Watanabe, Toshihide Kikkawa, Kenji Imanishi, Toshihiro Ohki, Tadahiro Imada
  • Patent number: 9564527
    Abstract: A semiconductor device includes a first semiconductor layer of a first conductivity type formed on one side of a semiconductor substrate; a second semiconductor layer of a second conductivity type formed on the first semiconductor layer; a third semiconductor layer of the first conductivity type formed on the second semiconductor layer; an opening part formed by removing part of the first to third semiconductor layers; a gate insulating film formed so as to cover an inner wall of the opening part; a gate electrode formed inside the opening part via the gate insulating film; a source electrode formed on a surface of the third semiconductor layer; a drain electrode connected to a part corresponding to the gate electrode on another side of the semiconductor substrate; and a fourth electrode formed on the another side of the semiconductor substrate at a part corresponding to the source electrode.
    Type: Grant
    Filed: April 24, 2013
    Date of Patent: February 7, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Toshihiro Ohki, Masato Nishimori, Tadahiro Imada
  • Patent number: 9553152
    Abstract: A semiconductor device includes: a first semiconductor layer which is formed over a substrate and is formed from a nitride semiconductor; a second semiconductor layer which is formed over the first semiconductor layer and is formed from a nitride semiconductor; a third semiconductor layer which is formed over the second semiconductor layer and is formed from a nitride semiconductor; a source electrode and a drain electrode which are formed over the third semiconductor layer; an opening which is formed in the second semiconductor layer and the third semiconductor layer between the source electrode and the drain electrode; an insulating layer which is formed on a side surface and a bottom surface of the opening; and a gate electrode which is formed in the opening through the insulating layer.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: January 24, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Toshihiro Ohki, Lei Zhu, Naoya Okamoto, Yuichi Minoura, Shirou Ozaki
  • Patent number: 9496380
    Abstract: At least one kind of impurity selected from, for example, Fe, C, B, Ti, Cr is introduced into at least a buffer layer of a compound semiconductor layered structure from a rear surface of the compound semiconductor layered structure to make a resistance value of the buffer layer high.
    Type: Grant
    Filed: December 16, 2011
    Date of Patent: November 15, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Yuichi Minoura, Toshihide Kikkawa, Toshihiro Ohki
  • Publication number: 20160268412
    Abstract: A semiconductor apparatus includes a substrate, a semiconductor layer formed above the substrate and including a nitride semiconductor, an electrode formed above the semiconductor layer and including gold, a barrier film formed above the electrode and a protection film formed above the semiconductor layer and including one of a silicon oxide film, a silicon nitride film, and a silicon oxynitride film. The protection film is formed on the barrier film. The barrier film includes a metal oxide material, a metal nitride film, or a metal oxynitride film.
    Type: Application
    Filed: May 23, 2016
    Publication date: September 15, 2016
    Applicant: FUJITSU LIMITED
    Inventor: Toshihiro OHKI
  • Patent number: 9379229
    Abstract: A semiconductor apparatus includes a substrate, a semiconductor layer formed above the substrate and including a nitride semiconductor, an electrode formed above the semiconductor layer and including gold, a barrier film formed above the electrode and a protection film formed above the semiconductor layer and including one of a silicon oxide film, a silicon nitride film, and a silicon oxynitride film. The protection film is formed on the barrier film. The barrier film includes a metal oxide material, a metal nitride film, or a metal oxynitride film.
    Type: Grant
    Filed: February 23, 2012
    Date of Patent: June 28, 2016
    Assignee: FUJITSU LIMITED
    Inventor: Toshihiro Ohki
  • Publication number: 20160099335
    Abstract: A semiconductor device includes: a first electrode; a second electrode; an interlayer insulating film made of a porous insulating material and formed above the first electrode and the second electrode; and connection parts electrically connected to the first electrode and the second electrode respectively, wherein a cavity is formed between the interlayer insulating film and a surface of the first electrode, a surface of the second electrode, and parts of surfaces of the connection parts.
    Type: Application
    Filed: December 11, 2015
    Publication date: April 7, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Shirou OZAKI, Naoya OKAMOTO, Kozo MAKIYAMA, Toshihiro OHKI
  • Patent number: 9276100
    Abstract: A semiconductor device includes a first semiconductor layer disposed over a substrate, a second semiconductor layer disposed over the first semiconductor layer, a gate recess disposed, through removal of a part of or all the second semiconductor layer, in a predetermined region over the first semiconductor layer, an insulating film disposed over the gate recess and the second semiconductor layer, a gate electrode disposed over the gate recess with the insulating film therebetween, and a source electrode and a drain electrode disposed over the first semiconductor layer or the second semiconductor layer, whereby a central portion of the gate recess is higher than a peripheral portion of the gate recess.
    Type: Grant
    Filed: November 11, 2011
    Date of Patent: March 1, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Hiroshi Endo, Toshihiro Ohki, Toshihide Kikkawa