Patents by Inventor Toshihiro Ohki
Toshihiro Ohki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240213360Abstract: A semiconductor device has a semiconductor layer including a channel layer containing indium (In), gallium (Ga), and arsenic (As) and an electron supply layer laminated over the channel layer and containing In, Al, and As. A source electrode and a drain electrode are formed on a surface side of the semiconductor layer, and a gate electrode is formed between them. A positively charged insulating film containing aluminum oxide (AlxOy) (y/x<3/2) having oxygen vacancies is formed on the source electrode side from the gate electrode on the surface side of the semiconductor layer. A part of the insulating film may function as a gate insulating film. The density of a two dimensional electron gas (2DEG) in the channel layer on the source electrode side from the gate electrode is relatively higher than that of the 2DEG on the drain electrode side therefrom because of the insulating film.Type: ApplicationFiled: September 12, 2023Publication date: June 27, 2024Applicant: Fujitsu LimitedInventors: Shirou OZAKI, Naoya OKAMOTO, Yusuke KUMAZAKI, Yasuhiro NAKASHA, Naoki HARA, Toshihiro OHKI
-
Publication number: 20240162340Abstract: A semiconductor device includes a semiconductor layer including an electron transit layer and an electron supply layer; a gate electrode, a source electrode and a drain electrode, the gate electrode, the source electrode and the drain electrode being disposed on the semiconductor layer; and a metal film connected to the gate electrode, wherein the semiconductor layer includes an active region, and an inactive region surrounding the active region in plan view, wherein the gate electrode includes, in plan view, a first region overlapping the active region, and two second regions having the first region interposed therebetween, the two second regions both overlapping the inactive region, and wherein the metal film contacts the two second regions.Type: ApplicationFiled: September 18, 2023Publication date: May 16, 2024Applicant: Fujitsu LimitedInventors: Yusuke KUMAZAKI, Shirou OZAKI, Naoya OKAMOTO, Yasuhiro NAKASHA, Toshihiro OHKI
-
Publication number: 20230354507Abstract: A high-frequency circuit board includes: a first insulating layer having a first dielectric constant; a first metal layer provided to stack over the first insulating layer; a second insulating layer provided to stack over the first metal layer, and having a second dielectric constant lower than the first dielectric constant; a second metal layer provided to stack over the second insulating layer, on which a compound semiconductor device is mounted; and first vias penetrating the second insulating layer and connecting the first metal layer with the second metal layer.Type: ApplicationFiled: January 20, 2023Publication date: November 2, 2023Applicant: Fujitsu LimitedInventors: Shirou OZAKI, Naoya OKAMOTO, Yoshihiro NAKATA, Yusuke Kumazaki, Toshihiro OHKI, Naoki HARA
-
Publication number: 20230317839Abstract: A semiconductor device includes a protection film having an opening and covering a semiconductor layer, which is formed on a side of a surface of a substrate, on an opposite side of the substrate. An insulating film containing silicon is used for the protection film. A gate electrode is formed in the opening and on a side of a side surface of the semiconductor layer which faces a direction. An insulating film containing metal element is formed between the side surface of the semiconductor layer and the gate electrode. The exposure of the side surface of the semiconductor layer to a gas for dry etching for forming of the opening is suppressed by the insulating film. Furthermore, contact and a short circuit between the gate electrode and the side surface of the semiconductor layer are suppressed. As a result, deterioration in the performance of the semiconductor device is suppressed.Type: ApplicationFiled: December 13, 2022Publication date: October 5, 2023Applicant: Fujitsu LimitedInventors: Shirou OZAKI, Naoya Okamoto, Yusuke Kumazaki, Toshihiro Ohki, Naoki Hara
-
Publication number: 20230275001Abstract: A semiconductor device includes a source electrode and a drain electrode located over a surface of a semiconductor layer including an electron transit layer and an electron supply layer. A gate electrode is located between the source electrode and the drain electrode. A first diamond layer is located between the source electrode and the drain electrode over the surface with an insulating film therebetween. A second diamond layer is located directly on the surface between the gate electrode and the drain electrode. Of heat generated by the semiconductor layer of the semiconductor device in operation, heat on the side of the electrode on which a relatively strong electric field is applied is efficiently transferred to the second diamond layer. The semiconductor device achieves an excellent heat dissipation property from the semiconductor layer and effectively suppresses overheating and a failure and degradation of the characteristics due to the overheating.Type: ApplicationFiled: May 8, 2023Publication date: August 31, 2023Applicant: FUJITSU LIMITEDInventors: Shirou OZAKI, Toshihiro OHKI, Kozo MAKIYAMA, Junya YAITA
-
Patent number: 11688663Abstract: A semiconductor device includes a source electrode and a drain electrode located over a surface of a semiconductor layer including an electron transit layer and an electron supply layer. A gate electrode is located between the source electrode and the drain electrode. A first diamond layer is located between the source electrode and the drain electrode over the surface with an insulating film therebetween. A second diamond layer is located directly on the surface between the gate electrode and the drain electrode. Of heat generated by the semiconductor layer of the semiconductor device in operation, heat on the side of the electrode on which a relatively strong electric field is applied is efficiently transferred to the second diamond layer. The semiconductor device achieves an excellent heat dissipation property from the semiconductor layer and effectively suppresses overheating and a failure and degradation of the characteristics due to the overheating.Type: GrantFiled: November 13, 2020Date of Patent: June 27, 2023Assignee: FUJITSU LIMITEDInventors: Shirou Ozaki, Toshihiro Ohki, Kozo Makiyama, Junya Yaita
-
COMPOUND SEMICONDUCTOR DEVICE, AMPLIFIER, AND METHOD FOR MANUFACTURING COMPOUND SEMICONDUCTOR DEVICE
Publication number: 20230037148Abstract: A compound semiconductor device includes a carrier supply layer, a channel layer disposed over the carrier supply layer and configured to include InGaAs, and an etching stopper layer disposed over the channel layer, and configured to include a first layer disposed over the channel layer and configured to include Inx1Ga1-x1P, and a second layer disposed over the first layer and configured to include Inx2Ga1-x2P, wherein x1 is greater than 0 and less than or equal to 1, x2 is greater than or equal to 0 and less than 1, and x1 is greater than x2.Type: ApplicationFiled: April 25, 2022Publication date: February 2, 2023Applicant: FUJITSU LIMITEDInventors: Shirou OZAKI, Junji KOTANI, Toshihiro OHKI, Naoya OKAMOTO -
Patent number: 11387357Abstract: A compound semiconductor device includes: a semiconductor laminate structure including an electron transit layer and an electron supply layer that are formed from a compound semiconductor; a gate electrode, a source electrode, and a drain electrode that are provided above the electron supply layer; and an insulating layer that is provided between the source electrode and the drain electrode, over the semiconductor laminate structure, and with a gate recess formed therein, wherein the gate electrode includes: a first portion in the gate recess; and a second portion that is coupled to the first portion and is provided over the insulating layer at a position further on the drain electrode side than the gate recess, wherein the insulating layer includes an aluminum oxide film in direct contact with the semiconductor laminate structure.Type: GrantFiled: July 28, 2020Date of Patent: July 12, 2022Assignee: FUJITSU LIMITEDInventors: Shirou Ozaki, Toshihiro Ohki
-
Publication number: 20210384340Abstract: A disclosed semiconductor device includes a semiconductor stack structure having an electron transit layer and an electron supply layer, the electron transit layer and the electron supply layer being compound semiconductors; a gate electrode, a source electrode, and a drain electrode, the gate electrode, the source electrode, and the drain electrode being deposed above the electron supply layer; a first insulating film disposed on the semiconductor stack structure between the gate electrode and the source electrode, the first insulating film being positively charged and in direct contact with the semiconductor stack structure; and a second insulating film disposed on the semiconductor stack structure between the gate electrode and the drain electrode, the second insulating film being covalent and in direct contact with the semiconductor stack structure.Type: ApplicationFiled: March 2, 2021Publication date: December 9, 2021Applicant: FUJITSU LIMITEDInventors: Shirou Ozaki, Kozo Makiyama, Toshihiro Ohki
-
Patent number: 11088044Abstract: A compound semiconductor device includes a compound semiconductor stack structure, a protective film provided on the compound semiconductor stack structure and containing titanium oxide, and a polycrystalline diamond film provided on the protective film.Type: GrantFiled: November 19, 2019Date of Patent: August 10, 2021Assignee: FUJITSU LIMITEDInventors: Shirou Ozaki, Toshihiro Ohki
-
Publication number: 20210225728Abstract: A semiconductor device includes a source electrode and a drain electrode located over a surface of a semiconductor layer including an electron transit layer and an electron supply layer. A gate electrode is located between the source electrode and the drain electrode. A first diamond layer is located between the source electrode and the drain electrode over the surface with an insulating film therebetween. A second diamond layer is located directly on the surface between the gate electrode and the drain electrode. Of heat generated by the semiconductor layer of the semiconductor device in operation, heat on the side of the electrode on which a relatively strong electric field is applied is efficiently transferred to the second diamond layer. The semiconductor device achieves an excellent heat dissipation property from the semiconductor layer and effectively suppresses overheating and a failure and degradation of the characteristics due to the overheating.Type: ApplicationFiled: November 13, 2020Publication date: July 22, 2021Applicant: FUJITSU LIMITEDInventors: Shirou OZAKI, Toshihiro Ohki, Kozo Makiyama, Junya Yaita
-
Patent number: 11038045Abstract: A semiconductor device includes a back barrier layer formed over a substrate, a first electron transit layer formed over the back barrier layer, an opening formed in the first electron transit layer and the back barrier layer, a second electron transit layer formed over the first electron transit layer, a side surface of the first electron transit layer at a side surface within the opening, a side surface of the back barrier layer at a side surface within the opening, and a surface of the back barrier layer at a bottom surface within the opening, an electron supply layer formed over the second electron transit layer, a drain electrode formed over the electron supply layer within the opening, and a gate electrode formed to cover a side surface of the electron supply layer at a side surface within the opening from an edge part of the opening.Type: GrantFiled: January 29, 2019Date of Patent: June 15, 2021Assignee: FUJITSU LIMITEDInventor: Toshihiro Ohki
-
Patent number: 10964805Abstract: A compound semiconductor device includes a compound semiconductor laminate structure including an electron transit layer and an electron supply layer, a gate electrode, a source electrode, and a drain electrode that are formed over the electron supply layer, a first insulating layer of diamond formed between the gate electrode and the drain electrode over the compound semiconductor laminate structure, and a second insulating layer formed between the gate electrode and the source electrode over the compound semiconductor laminate structure, wherein a positive compressive stress is applied from the first insulating layer to the electron supply layer, and a compressive stress from the second insulating layer to the electron supply layer is smaller than the compressive stress from the first insulating layer to the electron supply layer.Type: GrantFiled: August 2, 2019Date of Patent: March 30, 2021Assignee: FUJITSU LIMITEDInventors: Shirou Ozaki, Kozo Makiyama, Yuichi Minoura, Yusuke Kumazaki, Toshihiro Ohki, Naoya Okamoto
-
Publication number: 20210036139Abstract: A compound semiconductor device includes: a semiconductor laminate structure including an electron transit layer and an electron supply layer that are formed from a compound semiconductor; a gate electrode, a source electrode, and a drain electrode that are provided above the electron supply layer; and an insulating layer that is provided between the source electrode and the drain electrode, over the semiconductor laminate structure, and with a gate recess formed therein, wherein the gate electrode includes: a first portion in the gate recess; and a second portion that is coupled to the first portion and is provided over the insulating layer at a position further on the drain electrode side than the gate recess, wherein the insulating layer includes an aluminum oxide film in direct contact with the semiconductor laminate structure.Type: ApplicationFiled: July 28, 2020Publication date: February 4, 2021Applicant: FUJITSU LIMITEDInventors: Shirou OZAKI, Toshihiro Ohki
-
Publication number: 20200227530Abstract: A semiconductor apparatus includes: a substrate; a first semiconductor layer of a nitride semiconductor disposed over the substrate; a second semiconductor layer of a nitride semiconductor disposed over the first semiconductor layer; an insulating film disposed over the second semiconductor layer; a source electrode and a drain electrode that are disposed over the second semiconductor layer; and a gate electrode. The gate electrode includes: a Schottky region disposed over the second semiconductor layer, and a gate field-plate region disposed over the insulating film in the vicinity of the Schottky region, wherein the gate electrode includes a first gate electrode section disposed in the gate field-plate region so as to face the drain electrode, and a second gate electrode section disposed in the Schottky region, and wherein a material constituting the first gate electrode section has a lower work function than a material constituting the second gate electrode section.Type: ApplicationFiled: December 19, 2019Publication date: July 16, 2020Applicant: FUJITSU LIMITEDInventors: Yusuke Kumazaki, Kozo Makiyama, Toshihiro Ohki, Shirou OZAKI
-
Publication number: 20200203519Abstract: A compound semiconductor device includes a compound semiconductor stack structure, a protective film provided on the compound semiconductor stack structure and containing titanium oxide, and a polycrystalline diamond film provided on the protective film.Type: ApplicationFiled: November 19, 2019Publication date: June 25, 2020Applicant: FUJITSU LIMITEDInventors: Shirou OZAKI, Toshihiro Ohki
-
Publication number: 20200058783Abstract: A compound semiconductor device includes a compound semiconductor laminate structure including an electron transit layer and an electron supply layer, a gate electrode, a source electrode, and a drain electrode that are formed over the electron supply layer, a first insulating layer of diamond formed between the gate electrode and the drain electrode over the compound semiconductor laminate structure, and a second insulating layer formed between the gate electrode and the source electrode over the compound semiconductor laminate structure, wherein a positive compressive stress is applied from the first insulating layer to the electron supply layer, and a compressive stress from the second insulating layer to the electron supply layer is smaller than the compressive stress from the first insulating layer to the electron supply layer.Type: ApplicationFiled: August 2, 2019Publication date: February 20, 2020Applicant: FUJITSU LIMITEDInventors: Shirou OZAKI, Kozo Makiyama, Yuichi Minoura, Yusuke Kumazaki, Toshihiro Ohki, NAOYA OKAMOTO
-
Patent number: 10483185Abstract: A semiconductor device includes a semiconductor chip including a substrate and an element region on the substrate, a heat transfer body made of diamond, and a metal layer between the semiconductor chip and the heat transfer body, wherein the substrate includes an amorphous region on a back surface thereof, the amorphous region and the metal layer are bonded to each other, and the metal layer and the heat transfer body are bonded to each other.Type: GrantFiled: July 24, 2018Date of Patent: November 19, 2019Assignee: FUJITSU LIMITEDInventors: Yuichi Minoura, Naoya Okamoto, Toshihiro Ohki
-
Publication number: 20190326404Abstract: A semiconductor device includes a substrate, a first semiconductor layer formed over the substrate, the first semiconductor layer being composed of a nitride semiconductor, a second semiconductor layer formed over the first semiconductor layer, the second semiconductor layer being composed of a nitride semiconductor and a gate electrode, a source electrode, and a drain electrode that are formed over the second semiconductor layer, wherein the source electrode including a plurality of protrusions that penetrate into the second semiconductor layer, and the protrusions having a side surface inclined with respect to a surface of the first semiconductor layer.Type: ApplicationFiled: April 8, 2019Publication date: October 24, 2019Applicant: FUJITSU LIMITEDInventors: Yusuke Kumazaki, Toshihiro Ohki, Kozo Makiyama, Shirou OZAKI, Yuichi Minoura
-
Publication number: 20190280110Abstract: A semiconductor device includes a back barrier layer formed over a substrate, a first electron transit layer formed over the back barrier layer, an opening formed in the first electron transit layer and the back barrier layer, a second electron transit layer formed over the first electron transit layer, a side surface of the first electron transit layer at a side surface within the opening, a side surface of the back barrier layer at a side surface within the opening, and a surface of the back barrier layer at a bottom surface within the opening, an electron supply layer formed over the second electron transit layer, a drain electrode formed over the electron supply layer within the opening, and a gate electrode formed to cover a side surface of the electron supply layer at a side surface within the opening from an edge part of the opening.Type: ApplicationFiled: January 29, 2019Publication date: September 12, 2019Applicant: FUJITSU LIMITEDInventor: Toshihiro Ohki