Patents by Inventor Toshihiro Ohki

Toshihiro Ohki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230354507
    Abstract: A high-frequency circuit board includes: a first insulating layer having a first dielectric constant; a first metal layer provided to stack over the first insulating layer; a second insulating layer provided to stack over the first metal layer, and having a second dielectric constant lower than the first dielectric constant; a second metal layer provided to stack over the second insulating layer, on which a compound semiconductor device is mounted; and first vias penetrating the second insulating layer and connecting the first metal layer with the second metal layer.
    Type: Application
    Filed: January 20, 2023
    Publication date: November 2, 2023
    Applicant: Fujitsu Limited
    Inventors: Shirou OZAKI, Naoya OKAMOTO, Yoshihiro NAKATA, Yusuke Kumazaki, Toshihiro OHKI, Naoki HARA
  • Publication number: 20230317839
    Abstract: A semiconductor device includes a protection film having an opening and covering a semiconductor layer, which is formed on a side of a surface of a substrate, on an opposite side of the substrate. An insulating film containing silicon is used for the protection film. A gate electrode is formed in the opening and on a side of a side surface of the semiconductor layer which faces a direction. An insulating film containing metal element is formed between the side surface of the semiconductor layer and the gate electrode. The exposure of the side surface of the semiconductor layer to a gas for dry etching for forming of the opening is suppressed by the insulating film. Furthermore, contact and a short circuit between the gate electrode and the side surface of the semiconductor layer are suppressed. As a result, deterioration in the performance of the semiconductor device is suppressed.
    Type: Application
    Filed: December 13, 2022
    Publication date: October 5, 2023
    Applicant: Fujitsu Limited
    Inventors: Shirou OZAKI, Naoya Okamoto, Yusuke Kumazaki, Toshihiro Ohki, Naoki Hara
  • Publication number: 20230275001
    Abstract: A semiconductor device includes a source electrode and a drain electrode located over a surface of a semiconductor layer including an electron transit layer and an electron supply layer. A gate electrode is located between the source electrode and the drain electrode. A first diamond layer is located between the source electrode and the drain electrode over the surface with an insulating film therebetween. A second diamond layer is located directly on the surface between the gate electrode and the drain electrode. Of heat generated by the semiconductor layer of the semiconductor device in operation, heat on the side of the electrode on which a relatively strong electric field is applied is efficiently transferred to the second diamond layer. The semiconductor device achieves an excellent heat dissipation property from the semiconductor layer and effectively suppresses overheating and a failure and degradation of the characteristics due to the overheating.
    Type: Application
    Filed: May 8, 2023
    Publication date: August 31, 2023
    Applicant: FUJITSU LIMITED
    Inventors: Shirou OZAKI, Toshihiro OHKI, Kozo MAKIYAMA, Junya YAITA
  • Patent number: 11688663
    Abstract: A semiconductor device includes a source electrode and a drain electrode located over a surface of a semiconductor layer including an electron transit layer and an electron supply layer. A gate electrode is located between the source electrode and the drain electrode. A first diamond layer is located between the source electrode and the drain electrode over the surface with an insulating film therebetween. A second diamond layer is located directly on the surface between the gate electrode and the drain electrode. Of heat generated by the semiconductor layer of the semiconductor device in operation, heat on the side of the electrode on which a relatively strong electric field is applied is efficiently transferred to the second diamond layer. The semiconductor device achieves an excellent heat dissipation property from the semiconductor layer and effectively suppresses overheating and a failure and degradation of the characteristics due to the overheating.
    Type: Grant
    Filed: November 13, 2020
    Date of Patent: June 27, 2023
    Assignee: FUJITSU LIMITED
    Inventors: Shirou Ozaki, Toshihiro Ohki, Kozo Makiyama, Junya Yaita
  • Publication number: 20230037148
    Abstract: A compound semiconductor device includes a carrier supply layer, a channel layer disposed over the carrier supply layer and configured to include InGaAs, and an etching stopper layer disposed over the channel layer, and configured to include a first layer disposed over the channel layer and configured to include Inx1Ga1-x1P, and a second layer disposed over the first layer and configured to include Inx2Ga1-x2P, wherein x1 is greater than 0 and less than or equal to 1, x2 is greater than or equal to 0 and less than 1, and x1 is greater than x2.
    Type: Application
    Filed: April 25, 2022
    Publication date: February 2, 2023
    Applicant: FUJITSU LIMITED
    Inventors: Shirou OZAKI, Junji KOTANI, Toshihiro OHKI, Naoya OKAMOTO
  • Patent number: 11387357
    Abstract: A compound semiconductor device includes: a semiconductor laminate structure including an electron transit layer and an electron supply layer that are formed from a compound semiconductor; a gate electrode, a source electrode, and a drain electrode that are provided above the electron supply layer; and an insulating layer that is provided between the source electrode and the drain electrode, over the semiconductor laminate structure, and with a gate recess formed therein, wherein the gate electrode includes: a first portion in the gate recess; and a second portion that is coupled to the first portion and is provided over the insulating layer at a position further on the drain electrode side than the gate recess, wherein the insulating layer includes an aluminum oxide film in direct contact with the semiconductor laminate structure.
    Type: Grant
    Filed: July 28, 2020
    Date of Patent: July 12, 2022
    Assignee: FUJITSU LIMITED
    Inventors: Shirou Ozaki, Toshihiro Ohki
  • Publication number: 20210384340
    Abstract: A disclosed semiconductor device includes a semiconductor stack structure having an electron transit layer and an electron supply layer, the electron transit layer and the electron supply layer being compound semiconductors; a gate electrode, a source electrode, and a drain electrode, the gate electrode, the source electrode, and the drain electrode being deposed above the electron supply layer; a first insulating film disposed on the semiconductor stack structure between the gate electrode and the source electrode, the first insulating film being positively charged and in direct contact with the semiconductor stack structure; and a second insulating film disposed on the semiconductor stack structure between the gate electrode and the drain electrode, the second insulating film being covalent and in direct contact with the semiconductor stack structure.
    Type: Application
    Filed: March 2, 2021
    Publication date: December 9, 2021
    Applicant: FUJITSU LIMITED
    Inventors: Shirou Ozaki, Kozo Makiyama, Toshihiro Ohki
  • Patent number: 11088044
    Abstract: A compound semiconductor device includes a compound semiconductor stack structure, a protective film provided on the compound semiconductor stack structure and containing titanium oxide, and a polycrystalline diamond film provided on the protective film.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: August 10, 2021
    Assignee: FUJITSU LIMITED
    Inventors: Shirou Ozaki, Toshihiro Ohki
  • Publication number: 20210225728
    Abstract: A semiconductor device includes a source electrode and a drain electrode located over a surface of a semiconductor layer including an electron transit layer and an electron supply layer. A gate electrode is located between the source electrode and the drain electrode. A first diamond layer is located between the source electrode and the drain electrode over the surface with an insulating film therebetween. A second diamond layer is located directly on the surface between the gate electrode and the drain electrode. Of heat generated by the semiconductor layer of the semiconductor device in operation, heat on the side of the electrode on which a relatively strong electric field is applied is efficiently transferred to the second diamond layer. The semiconductor device achieves an excellent heat dissipation property from the semiconductor layer and effectively suppresses overheating and a failure and degradation of the characteristics due to the overheating.
    Type: Application
    Filed: November 13, 2020
    Publication date: July 22, 2021
    Applicant: FUJITSU LIMITED
    Inventors: Shirou OZAKI, Toshihiro Ohki, Kozo Makiyama, Junya Yaita
  • Patent number: 11038045
    Abstract: A semiconductor device includes a back barrier layer formed over a substrate, a first electron transit layer formed over the back barrier layer, an opening formed in the first electron transit layer and the back barrier layer, a second electron transit layer formed over the first electron transit layer, a side surface of the first electron transit layer at a side surface within the opening, a side surface of the back barrier layer at a side surface within the opening, and a surface of the back barrier layer at a bottom surface within the opening, an electron supply layer formed over the second electron transit layer, a drain electrode formed over the electron supply layer within the opening, and a gate electrode formed to cover a side surface of the electron supply layer at a side surface within the opening from an edge part of the opening.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: June 15, 2021
    Assignee: FUJITSU LIMITED
    Inventor: Toshihiro Ohki
  • Patent number: 10964805
    Abstract: A compound semiconductor device includes a compound semiconductor laminate structure including an electron transit layer and an electron supply layer, a gate electrode, a source electrode, and a drain electrode that are formed over the electron supply layer, a first insulating layer of diamond formed between the gate electrode and the drain electrode over the compound semiconductor laminate structure, and a second insulating layer formed between the gate electrode and the source electrode over the compound semiconductor laminate structure, wherein a positive compressive stress is applied from the first insulating layer to the electron supply layer, and a compressive stress from the second insulating layer to the electron supply layer is smaller than the compressive stress from the first insulating layer to the electron supply layer.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: March 30, 2021
    Assignee: FUJITSU LIMITED
    Inventors: Shirou Ozaki, Kozo Makiyama, Yuichi Minoura, Yusuke Kumazaki, Toshihiro Ohki, Naoya Okamoto
  • Publication number: 20210036139
    Abstract: A compound semiconductor device includes: a semiconductor laminate structure including an electron transit layer and an electron supply layer that are formed from a compound semiconductor; a gate electrode, a source electrode, and a drain electrode that are provided above the electron supply layer; and an insulating layer that is provided between the source electrode and the drain electrode, over the semiconductor laminate structure, and with a gate recess formed therein, wherein the gate electrode includes: a first portion in the gate recess; and a second portion that is coupled to the first portion and is provided over the insulating layer at a position further on the drain electrode side than the gate recess, wherein the insulating layer includes an aluminum oxide film in direct contact with the semiconductor laminate structure.
    Type: Application
    Filed: July 28, 2020
    Publication date: February 4, 2021
    Applicant: FUJITSU LIMITED
    Inventors: Shirou OZAKI, Toshihiro Ohki
  • Publication number: 20200227530
    Abstract: A semiconductor apparatus includes: a substrate; a first semiconductor layer of a nitride semiconductor disposed over the substrate; a second semiconductor layer of a nitride semiconductor disposed over the first semiconductor layer; an insulating film disposed over the second semiconductor layer; a source electrode and a drain electrode that are disposed over the second semiconductor layer; and a gate electrode. The gate electrode includes: a Schottky region disposed over the second semiconductor layer, and a gate field-plate region disposed over the insulating film in the vicinity of the Schottky region, wherein the gate electrode includes a first gate electrode section disposed in the gate field-plate region so as to face the drain electrode, and a second gate electrode section disposed in the Schottky region, and wherein a material constituting the first gate electrode section has a lower work function than a material constituting the second gate electrode section.
    Type: Application
    Filed: December 19, 2019
    Publication date: July 16, 2020
    Applicant: FUJITSU LIMITED
    Inventors: Yusuke Kumazaki, Kozo Makiyama, Toshihiro Ohki, Shirou OZAKI
  • Publication number: 20200203519
    Abstract: A compound semiconductor device includes a compound semiconductor stack structure, a protective film provided on the compound semiconductor stack structure and containing titanium oxide, and a polycrystalline diamond film provided on the protective film.
    Type: Application
    Filed: November 19, 2019
    Publication date: June 25, 2020
    Applicant: FUJITSU LIMITED
    Inventors: Shirou OZAKI, Toshihiro Ohki
  • Publication number: 20200058783
    Abstract: A compound semiconductor device includes a compound semiconductor laminate structure including an electron transit layer and an electron supply layer, a gate electrode, a source electrode, and a drain electrode that are formed over the electron supply layer, a first insulating layer of diamond formed between the gate electrode and the drain electrode over the compound semiconductor laminate structure, and a second insulating layer formed between the gate electrode and the source electrode over the compound semiconductor laminate structure, wherein a positive compressive stress is applied from the first insulating layer to the electron supply layer, and a compressive stress from the second insulating layer to the electron supply layer is smaller than the compressive stress from the first insulating layer to the electron supply layer.
    Type: Application
    Filed: August 2, 2019
    Publication date: February 20, 2020
    Applicant: FUJITSU LIMITED
    Inventors: Shirou OZAKI, Kozo Makiyama, Yuichi Minoura, Yusuke Kumazaki, Toshihiro Ohki, NAOYA OKAMOTO
  • Patent number: 10483185
    Abstract: A semiconductor device includes a semiconductor chip including a substrate and an element region on the substrate, a heat transfer body made of diamond, and a metal layer between the semiconductor chip and the heat transfer body, wherein the substrate includes an amorphous region on a back surface thereof, the amorphous region and the metal layer are bonded to each other, and the metal layer and the heat transfer body are bonded to each other.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: November 19, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Yuichi Minoura, Naoya Okamoto, Toshihiro Ohki
  • Publication number: 20190326404
    Abstract: A semiconductor device includes a substrate, a first semiconductor layer formed over the substrate, the first semiconductor layer being composed of a nitride semiconductor, a second semiconductor layer formed over the first semiconductor layer, the second semiconductor layer being composed of a nitride semiconductor and a gate electrode, a source electrode, and a drain electrode that are formed over the second semiconductor layer, wherein the source electrode including a plurality of protrusions that penetrate into the second semiconductor layer, and the protrusions having a side surface inclined with respect to a surface of the first semiconductor layer.
    Type: Application
    Filed: April 8, 2019
    Publication date: October 24, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Yusuke Kumazaki, Toshihiro Ohki, Kozo Makiyama, Shirou OZAKI, Yuichi Minoura
  • Publication number: 20190280110
    Abstract: A semiconductor device includes a back barrier layer formed over a substrate, a first electron transit layer formed over the back barrier layer, an opening formed in the first electron transit layer and the back barrier layer, a second electron transit layer formed over the first electron transit layer, a side surface of the first electron transit layer at a side surface within the opening, a side surface of the back barrier layer at a side surface within the opening, and a surface of the back barrier layer at a bottom surface within the opening, an electron supply layer formed over the second electron transit layer, a drain electrode formed over the electron supply layer within the opening, and a gate electrode formed to cover a side surface of the electron supply layer at a side surface within the opening from an edge part of the opening.
    Type: Application
    Filed: January 29, 2019
    Publication date: September 12, 2019
    Applicant: FUJITSU LIMITED
    Inventor: Toshihiro Ohki
  • Publication number: 20190051579
    Abstract: A semiconductor device includes a semiconductor chip including a substrate and an element region on the substrate, a heat transfer body made of diamond, and a metal layer between the semiconductor chip and the heat transfer body, wherein the substrate includes an amorphous region on a back surface thereof, the amorphous region and the metal layer are bonded to each other, and the metal layer and the heat transfer body are bonded to each other.
    Type: Application
    Filed: July 24, 2018
    Publication date: February 14, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Yuichi Minoura, Naoya Okamoto, Toshihiro Ohki
  • Patent number: 9685547
    Abstract: A semiconductor apparatus includes a substrate, a semiconductor layer formed above the substrate and including a nitride semiconductor, an electrode formed above the semiconductor layer and including gold, a barrier film formed above the electrode and a protection film formed above the semiconductor layer and including one of a silicon oxide film, a silicon nitride film, and a silicon oxynitride film. The protection film is formed on the barrier film. The barrier film includes a metal oxide material, a metal nitride film, or a metal oxynitride film.
    Type: Grant
    Filed: May 23, 2016
    Date of Patent: June 20, 2017
    Assignee: FUJITSU LIMITED
    Inventor: Toshihiro Ohki