Abstract: A semiconductor device includes a first semiconductor layer of a first conductivity type formed on one side of a semiconductor substrate; a second semiconductor layer of a second conductivity type formed on the first semiconductor layer; a third semiconductor layer of the first conductivity type formed on the second semiconductor layer; an opening part formed by removing part of the first to third semiconductor layers; a gate insulating film formed so as to cover an inner wall of the opening part; a gate electrode formed inside the opening part via the gate insulating film; a source electrode formed on a surface of the third semiconductor layer; a drain electrode connected to a part corresponding to the gate electrode on another side of the semiconductor substrate; and a fourth electrode formed on the another side of the semiconductor substrate at a part corresponding to the source electrode.

Abstract: A nitride semiconductor device has: a substrate; a semiconductor lamination formed on the substrate, and including a channel layer of nitride semiconductor; source and drain electrodes formed on the semiconductor lamination in ohmic contact with the channel layer; an insulating layer formed on the semiconductor lamination, and having an opening in a gate electrode contact area, a total thickness portion having a flat surface and a total thickness in an area spaced apart from the opening, and a transient portion with monotonically changing thickness between the opening and the total thickness portion, a sidewall of the insulating layer facing the opening rising steeply to a partial thickness of the total thickness; and a T-shaped gate electrode contacting the semiconductor lamination layer in the opening and extending on the insulating film to portions with increased thickness thicker than the partial thickness.

Abstract: A compound semiconductor device includes: a first compound semiconductor layer in which carriers are formed; a second compound semiconductor layer, provided above the first compound semiconductor layer, to supply the carriers; and a third compound semiconductor layer provided above the second compound semiconductor layer, wherein the third compound semiconductor layer includes a area that has a carrier concentration higher than a carrier concentration of the second compound semiconductor layer.

Abstract: A compound semiconductor device includes: an electron transport layer formed over a substrate; an electron supply layer formed over the electron transport layer; and a cap layer formed over the electron supply layer; the cap layer includes a first compound semiconductor layer containing GaN; a second compound semiconductor layer containing AlN, which is formed over the first compound semiconductor layer; a third compound semiconductor layer containing GaN, which is formed over the second compound semiconductor layer; and at least one of a first AlGaN-containing layer and a second AlGaN-containing layer, with the first AlGaN-containing layer formed between the first compound semiconductor layer and the second compound semiconductor layer and the Al content increases toward the second compound semiconductor layer, and the second AlGaN-containing layer formed between the second compound semiconductor layer and the third compound semiconductor layer and the Al content increases toward the second compound semicond

Abstract: A compound semiconductor device includes a compound semiconductor laminated structure, a passivation film formed on the compound semiconductor laminated structure and having a through-hole, and a gate electrode formed on the passivation film so as to plug the through-hole. A grain boundary between different crystalline orientations is formed in the gate electrode, and a starting point of the grain boundary is located apart from the through-hole on a flat surface of the passivation film.

Abstract: A passivation film is formed on a compound semiconductor layered structure, an electrode formation scheduled position for the passivation film is thinned by dry etching, a thinned portion of the passivation film is penetrated by wet etching to form an opening, and a gate electrode is formed on the passivation film so as to embed this opening by an electrode material.

Abstract: An HEMT includes, on an SiC substrate, a compound semiconductor layer, a silicon nitride (SiN) protective film having an opening and covering the compound semiconductor layer, and a gate electrode formed on the compound semiconductor layer so as to plug the opening. In the protective film, a projecting portion projecting from a side surface of the opening is formed at a lower layer portion 6a.

Abstract: A HEMT has a compound semiconductor layer, a protection film which has an opening and covers an upper side of the compound semiconductor layer, and a gate electrode which fills the opening and has a shape riding on the compound semiconductor layer, wherein the protection film has a stacked structure of a lower insulating film not containing oxygen and an upper insulating film containing oxygen, and the opening includes a first opening formed in the lower insulating film and a second opening formed in the upper insulating film and wider than the first opening, the first opening and the second opening communicating with each other.

Abstract: A semiconductor device, comprising: a first semiconductor layer disposed on a substrate; a second semiconductor layer disposed on the first semiconductor layer; a lower insulating film disposed on the second semiconductor layer; a p-type electroconductive oxide film disposed on the lower insulating film; an upper insulating film disposed on the oxide film; and a gate electrode disposed on the upper insulating film, wherein the lower insulating film under the gate electrode has a depressed portion.

Abstract: A method for fabricating a semiconductor device is disclosed. A resist pattern is formed on a surface of a semiconductor layer in which a first layer and a second layer are sequentially formed on a substrate. A gate recess is formed by removing a part or the entire second layer in an opening area of the resist pattern. The resist pattern is removed. A dry etching residue attached to a bottom surface and lateral surfaces of the gate recess is removed after the resist pattern is removed. An insulating film is formed on the bottom surface, the lateral surfaces, and the semiconductor layer after the dry etching residue is removed. A gate electrode is formed via the insulating film on an area where the gate recess is formed. A source electrode and a drain electrode are formed on the semiconductor layer.

Abstract: A compound semiconductor device includes a carrier transit layer including GaN formed over a substrate; a carrier supply layer including GaN formed over the carrier transit layer; a source electrode and a drain electrode formed over the carrier supply layer; a first compound semiconductor layer including N in which a first opening is formed and that is located between the source electrode and the drain electrode over the carrier supply layer; a gate electrode extending from within the first opening to above the first compound semiconductor layer; and an insulator layer having a second opening that is smaller than the first opening, and insulating the gate electrode and the first compound semiconductor layer within the first opening. The gate electrode extends from within the second opening to above the first compound semiconductor layer.

Abstract: At least one kind of impurity selected from, for example, Fe, C, B, Ti, Cr is introduced into at least a buffer layer of a compound semiconductor layered structure from a rear surface of the compound semiconductor layered structure to make a resistance value of the buffer layer high.

Abstract: A compound semiconductor device includes a nitride semiconductor stacked structure including a carrier transit layer and a carrier supply layer; a source electrode and a drain electrode provided over the nitride semiconductor stacked structure; a gate electrode provided between the source electrode and the drain electrode, over the nitride semiconductor stacked structure; a field plate provided at least partially between the gate electrode and the drain electrode; and a plurality of insulation films and formed over the nitride semiconductor stacked structure, wherein a number of interfaces of the plurality of insulation films is smaller between the field plate and the drain electrode than in the vicinity of the gate electrode.

Abstract: A semiconductor apparatus includes a substrate, a semiconductor layer formed above the substrate and including a nitride semiconductor, an electrode formed above the semiconductor layer and including gold, a barrier film formed above the electrode and a protection film formed above the semiconductor layer and including one of a silicon oxide film, a silicon nitride film, and a silicon oxynitride film. The protection film is formed on the barrier film. The barrier film includes a metal oxide material, a metal nitride film, or a metal oxynitride film.

Abstract: A semiconductor device includes: a semiconductor layer formed over a substrate; an insulating film formed over the semiconductor layer; and an electrode formed over the insulating film, wherein the insulating film includes an amorphous film including carbon.

Abstract: A semiconductor apparatus includes a first semiconductor layer formed on a substrate, a second semiconductor layer formed on the first semiconductor layer, a gate recess formed by removing at least a portion of the second semiconductor layer, an insulation film formed on the gate recess and the second semiconductor layer, a gate electrode formed on the gate recess via the insulation film, source and drain electrodes formed on one of the first and the second semiconductor layers, and a fluorine containing region formed in at least one of a part of the first semiconductor layer corresponding to a region in which the gate recess is formed and a part of the second semiconductor layer corresponding to the region in which the gate recess is formed.

Abstract: A semiconductor device includes a first semiconductor layer disposed over a substrate, a second semiconductor layer disposed over the first semiconductor layer, a gate recess disposed, through removal of a part of or all the second semiconductor layer, in a predetermined region over the first semiconductor layer, an insulating film disposed over the gate recess and the second semiconductor layer, a gate electrode disposed over the gate recess with the insulating film therebetween, and a source electrode and a drain electrode disposed over the first semiconductor layer or the second semiconductor layer, whereby a central portion of the gate recess is higher than a peripheral portion of the gate recess.

Abstract: A method for fabricating a semiconductor device is disclosed. A resist pattern is formed on a surface of a semiconductor layer in which a first layer and a second layer are sequentially formed on a substrate. A gate recess is formed by removing a part or the entire second layer in an opening area of the resist pattern. The resist pattern is removed. A dry etching residue attached to a bottom surface and lateral surfaces of the gate recess is removed after the resist pattern is removed. An insulating film is formed on the bottom surface, the lateral surfaces, and the semiconductor layer after the dry etching residue is removed. A gate electrode is formed via the insulating film on an area where the gate recess is formed. A source electrode and a drain electrode are formed on the semiconductor layer.

Abstract: On a surface of a compound semiconductor layer including inner wall surfaces of an electrode trench, an etching residue 12a and an altered substance 12b which are produced due to dry etching for forming the electrode trench are removed, and a compound semiconductor is terminated with fluorine. Gate metal is buried in the electrode trench via a gate insulating film, or the gate metal is directly buried in the electrode trench, whereby a gate electrode is formed.

Abstract: A compound semiconductor device includes: an electron transport layer formed over a substrate; an electron supply layer formed over the electron transport layer; and a cap layer formed over the electron supply layer; the cap layer includes a first compound semiconductor layer containing GaN; a second compound semiconductor layer containing AlN, which is formed over the first compound semiconductor layer; a third compound semiconductor layer containing GaN, which is formed over the second compound semiconductor layer; and at least one of a first AlGaN-containing layer and a second AlGaN-containing layer, with the first AlGaN-containing layer formed between the first compound semiconductor layer and the second compound semiconductor layer and the Al content increases toward the second compound semiconductor layer, and the second AlGaN-containing layer formed between the second compound semiconductor layer and the third compound semiconductor layer and the Al content increases toward the second compound semicond