Patents by Inventor Toshiki Naito

Toshiki Naito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7371971
    Abstract: A wired circuit board that can provide improved reliability on connection between the terminal portions and the external terminals while ensuring high productivity and cost reduction, and a production method thereof. After a conductive pattern 3 including terminal portions 6 to connect with external terminals 22 of an electronic component 21 and criterion marks 8 to determine presence or absence of an inhibitory portion 23 that may be formed due to formation of an insulating cover layer 4 to inhibit connection between the terminal portions 6 and the external terminals 22 are formed on the insulating base layer 2 simultaneously, the insulating cover layer 4 to cover the conductive pattern 3 and an opening 7 from which the terminal portions 6 and the criterion marks 8 are exposed is formed. Thereafter, the presence or absence of the inhibitory portion 23 is determined with reference to the criterion marks 8 exposed from the opening 7 of the insulating cover layer 4.
    Type: Grant
    Filed: February 8, 2006
    Date of Patent: May 13, 2008
    Assignee: Nitto Denko Corporation
    Inventors: Yuichi Takayoshi, Kazushi Ichikawa, Toshiki Naito
  • Patent number: 7354697
    Abstract: The invention provides a process for producing a wiring circuit board, which comprises the steps of: (A) forming a conductor layer of a predetermined pattern on an insulating layer; (B) forming a photosensitive solder resist layer on the insulating layer and the patterned conductor layer formed on the insulating layer; (C) disposing a transparent protective film on the photosensitive solder resist layer; and (D) exposing the photosensitive solder resist layer to a light through the transparent protective film.
    Type: Grant
    Filed: September 7, 2004
    Date of Patent: April 8, 2008
    Assignee: Nitto Denko Corporation
    Inventor: Toshiki Naito
  • Patent number: 7323093
    Abstract: A producing method of a flexible wired circuit board that can prevent the formation of a gap between an elongate substrate and a stiffener sheet bonded thereto to prevent contamination of the flexible wired circuit board obtained. In the process subsequent to the process of forming a conductive pattern 3 on a surface of the elongate substrate 1 by the semi-additive process using electrolysis plating and then annealing the elongate substrate 1 with the conductive pattern 3 in its wound up state, a stiffener sheet 9 having a width narrower than the elongate substrate 1 is bonded to the back side of the elongate substrate 1. Thereafter, an oxidized film formed on a surface of the conductive pattern 3 is removed and then a solder resist 11 is formed thereon. This prevents the strip of the stiffener sheet 9 from the elongate substrate 1 and in turn prevents etching solution or developing solution from entraining in a gap therebetween.
    Type: Grant
    Filed: September 28, 2004
    Date of Patent: January 29, 2008
    Assignee: Nitto Denko Corporation
    Inventors: Toshiki Naito, Yoshifumi Shinogi, Takeshi Yamato
  • Publication number: 20070241764
    Abstract: A wired circuit board assembly sheet has a plurality of wired circuit boards, distinguishing marks for distinguishing defectiveness of the wired circuit boards, and a supporting sheet for supporting the plurality of wired circuit boards and the distinguishing marks. Each of the distinguishing marks has an indication portion for indicating a specified one of the wired circuit boards.
    Type: Application
    Filed: April 13, 2007
    Publication date: October 18, 2007
    Applicant: Nitto Denko Corporation
    Inventors: Toshiki Naito, Tetsuya Ohsawa, Kouji Kataoka
  • Publication number: 20070218781
    Abstract: A wired circuit board includes a metal supporting layer, an insulating layer formed on the metal supporting layer and a conductive pattern formed on the insulating layer, and having a terminal portion for connecting to an external terminal. The terminal portion is disposed at an end portion of the conductive pattern, supported on the insulating layer, and exposed from the metal supporting layer to have an end surface thereof used as a point of contact with the external terminal.
    Type: Application
    Filed: March 14, 2007
    Publication date: September 20, 2007
    Applicant: Nitto Denko Corporation
    Inventors: Takahiko Yokai, Toshiki Naito, Yasunari Ooyabu
  • Publication number: 20070207415
    Abstract: The invention provides a process for producing a wiring circuit board, which comprises the steps of: (A) forming a conductor layer of a predetermined pattern on an insulating layer; (B) forming a photosensitive solder resist layer on the insulating layer and the patterned conductor layer formed on the insulating layer; (C) disposing a transparent protective film on the photosensitive solder resist layer; and (D) exposing the photosensitive solder resist layer to a light through the transparent protective film.
    Type: Application
    Filed: May 15, 2007
    Publication date: September 6, 2007
    Applicant: NITTO DENKO CORPORATION
    Inventor: Toshiki Naito
  • Publication number: 20070087175
    Abstract: A wired circuit board is provided that includes an insulating base layer, a conductor layer formed on the insulating base layer, and an insulating cover layer formed on the conductor layer and having an opening through which the conductor layer is exposed, an electrode is formed on the surface of the conductor layer exposed through the opening by forming a nickel plating layer by electroless nickel plating, and then forming a gold plating layer on the nickel plating layer by electrolytic gold plating. Thus, the invention provides a wired circuit board having enhanced connection reliability and reduced cost of manufacture among other benefits.
    Type: Application
    Filed: December 12, 2006
    Publication date: April 19, 2007
    Applicant: Nitto Denko Corporation
    Inventors: Naoto Iwasaki, Toshiki Naito
  • Patent number: 7205482
    Abstract: Electric conductor patterns having inner leads arranged at a pitch of not larger than 60 ?m are formed on a front surface of an insulating layer of a tape carrier for TAB. A reinforcing layer of stainless steel foil is formed on a rear surface of the insulating layer so as to be extend along a lengthwise direction at opposite side edge portions in a widthwise direction of the insulating layer. Accordingly, both dimensional accuracy and positional accuracy can be improved at the time of carrying the tape carrier for TAB or at the time of mounting and bonding electronic parts though the insulating layer can be formed so as to be thin.
    Type: Grant
    Filed: October 8, 2003
    Date of Patent: April 17, 2007
    Assignee: Nitto Denko Corporation
    Inventors: Toshiki Naito, Hiroshi Yamazaki, Toshihiko Omote
  • Publication number: 20060176069
    Abstract: A wired circuit board that can provide improved reliability on connection between the terminal portions and the external terminals while ensuring high productivity and cost reduction, and a production method thereof. After a conductive pattern 3 including terminal portions 6 to connect with external terminals 22 of an electronic component 21 and criterion marks 8 to determine presence or absence of an inhibitory portion 23 that may be formed due to formation of an insulating cover layer 4 to inhibit connection between the terminal portions 6 and the external terminals 22 are formed on the insulating base layer 2 simultaneously, the insulating cover layer 4 to cover the conductive pattern 3 and an opening 7 from which the terminal portions 6 and the criterion marks 8 are exposed is formed. Thereafter, the presence or absence of the inhibitory portion 23 is determined with reference to the criterion marks 8 exposed from the opening 7 of the insulating cover layer 4.
    Type: Application
    Filed: February 8, 2006
    Publication date: August 10, 2006
    Applicant: Nitto Denko Corporation
    Inventors: Yuichi Takayoshi, Kazushi Ichikawa, Toshiki Naito
  • Publication number: 20060093799
    Abstract: A wired circuit board having good alkali resistance as well as good flexibility. The wired circuit board comprising an insulating base layer 21, a conductor layer 22 laminated on the insulating layer 21, and an insulating cover layer 23 formed on the insulating base layer 21 to cover the conductor layer 22, wherein at least the insulating base layer 21 is formed from a resin having a repeated unit expressed by at least either the following general formula (1) or (2), and a weight-average molecular weight in the range of 0.1×105 to 1.
    Type: Application
    Filed: October 27, 2005
    Publication date: May 4, 2006
    Applicant: Nitto Denko Corporation
    Inventors: Yasufumi Miyake, Kyouyuu Jo, Toshiki Naito, Yutaka Aoki
  • Publication number: 20060076242
    Abstract: A producing method of a wired circuit board that can prevent meandering of the elongate base material conveyed with the rolls and also prevent entry of air bubbles in between a light-transparency protecting film and a photosensitive solder resist layer when the light-transparency protecting film is laminated on the photosensitive solder resist layer. After a conductive pattern 3 is formed on the front side of the elongate base material 1 by the additive process, a narrow stiffener sheet 7 smaller in width than the elongate base material 1 is provided on the back side of the elongate base material 1. Then, after the photosensitive solder resist layer 10 is formed on the front side of the elongate base material 1 to cover the conductive pattern 3, the light-transparency protecting film 11 is laminated on the front side of the photosensitive solder resist layer 10. Thereafter, the photosensitive solder resist layer 10 is exposed to light through the light-transparency protecting film 11.
    Type: Application
    Filed: September 28, 2005
    Publication date: April 13, 2006
    Applicant: Nitto Denko Corporation
    Inventor: Toshiki Naito
  • Patent number: 6996901
    Abstract: A production method of a wired circuit board can prevent corrosion of a first thin metal film inwardly of a conductor layer, due to the forming of an undercut portion caused by a skirt portion of a plating resist. A first thin metal film is formed on an insulating base layer. A plating resist is formed in a reversal pattern to a wiring circuit pattern on the first thin metal film, and a conductor layer is formed in the wiring circuit pattern on the first thin metal film exposed from the plating resist. Thereafter, the plating resist is removed and, then, a second thin metal film is formed on the conductor layer and first thin metal film. Thereafter, the second thin metal film and then all portions of the first thin metal layer, except portions thereof where the conductor layer is formed, are removed.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: February 14, 2006
    Assignee: Nitto Denko Corporation
    Inventors: Mitsuru Honjo, Toshiki Naito
  • Publication number: 20050280153
    Abstract: A wired circuit forming board that can provide improved adhesion between an insulating layer and a conductive pattern and can also prevent delamination in a thin metal layer, a wired circuit board for which the same wired circuit forming board is used, and a thin metal layer forming method for forming the thin metal layer. The thin metal layer 2 is formed on the insulating base layer 1 by sputtering the first metal 35 and the second metal 36 in such a condition that a first metal diffusing region 37 for the first metal 35 to be diffused and a second metal diffusing region 38 for the second metal 36 to be diffused are overlapped with each other.
    Type: Application
    Filed: June 8, 2005
    Publication date: December 22, 2005
    Applicant: Nitto Denko Corporation
    Inventors: Toshiki Naito, Hiroshi Yamazaki
  • Publication number: 20050230790
    Abstract: Electric conductor patterns having inner leads arranged at a pitch of not larger than 60 ?m are formed on a front surface of an insulating layer of a tape carrier for TAB. A reinforcing layer of stainless steel foil is formed on a rear surface of the insulating layer so as to be extend along a lengthwise direction at opposite side edge portions in a widthwise direction of the insulating layer. Accordingly, both dimensional accuracy and positional accuracy can be improved at the time of carrying the tape carrier for TAB or at the time of mounting and bonding electronic parts though the insulating layer can be formed so as to be thin.
    Type: Application
    Filed: October 8, 2003
    Publication date: October 20, 2005
    Inventors: Toshiki Naito, Hiroshi Yamazaki, Toshihiko Omote
  • Patent number: 6939745
    Abstract: A method of producing a TAB tape carrier that can produce a TAB tape carrier in such a way as to prevent undulation at a split end surface thereof and tear of circuit pattern thereat, thereby producing the TAB tape carrier of high reliability with increased efficiency. In the method, an insulating layer is formed on an elongate metal supporting layer by application of resin solution to the metal supporting layer and by drying, first. Then, a plurality of lines of wiring patterns are formed on the insulating layer in a semi-additive process. Thereafter, slit grooves are formed in the metal supporting layer in spaces between adjacent lines of wiring patterns. Then, the insulating layer is split along the slit grooves to divide the continuous sheet into individual strips, thereby producing the TAB tape carriers.
    Type: Grant
    Filed: May 6, 2004
    Date of Patent: September 6, 2005
    Assignee: Nitto Denko Corporation
    Inventor: Toshiki Naito
  • Publication number: 20050191473
    Abstract: In order to provide a wired circuit board capable of enhancing the connection reliability and reducing the cost, in a wired circuit board including an insulating base layer, a conductor layer formed on the insulating base layer, and an insulating cover layer formed on the conductor layer and having an opening through which the conductor layer is exposed, an electrode is formed on the surface of the conductor layer exposed through the opening by forming a nickel plating layer by electroless nickel plating, and then forming a gold plating layer on the nickel plating layer by electrolytic gold plating.
    Type: Application
    Filed: February 25, 2005
    Publication date: September 1, 2005
    Applicant: Nitto Denko Corporation
    Inventors: Naoto Iwasaki, Toshiki Naito
  • Publication number: 20050115066
    Abstract: A production method of a wired circuit board that can prevent corrosion of a first thin metal film inwardly of a conductor layer, which is due to the forming of an undercut portion caused by a skirt portion of a plating resist, to prevent the peeling of a wiring circuit pattern. An insulating base layer 1 is prepared, first, and, then, a first thin metal film 2 is formed on the insulating base layer 1. Then, a plating resist 3 is formed in a reversal pattern to a wiring circuit pattern 4 on the first thin metal film 2, and a conductor layer 6 is formed in the wiring circuit pattern 4 on the first thin metal film 2 exposed form the plating resist 3. Thereafter, the plating resist 3 is removed and, then, a second thin metal film 8 is formed on the conductor layer 6 and first thin metal film 2. Thereafter, the second thin metal film 8 is removed. Then, all portions of the first thin metal layer 2, except portions thereof where the conductor layer 6 is formed, are removed.
    Type: Application
    Filed: November 19, 2004
    Publication date: June 2, 2005
    Inventors: Mitsuru Honjo, Toshiki Naito
  • Publication number: 20050103524
    Abstract: A double sided wired circuit board that can permit forming of wiring circuit pattern over the through hole and mounting of the electronic component thereon, for high-density forming of the wiring circuit pattern and high-density mounting of the electronic component. In the double sided wired circuit board comprising an insulating layer 1, and conductor layers 3 formed on both sides of the insulating layer 1, a through hole 2 extending in a thickness direction of the insulating layer 1 is formed in the insulating layer 1 and then the through hole 2 is filled with copper with no substantial space therein by electrolytic plating, to form a conductor portion 4 for providing the electrical conduction between the conductor layers 3. This can permit areas on the surface of the conductor portion to be used as a component mounting portion.
    Type: Application
    Filed: November 12, 2004
    Publication date: May 19, 2005
    Inventors: Toshiki Naito, Takeshi Yoshimi
  • Patent number: 6889432
    Abstract: A method for manufacturing a double-sided circuit board from a board material having a first electric conductor layer and a first electrically insulating layer, including the steps of: making conduction holes in the board material so as to penetrate only the first electrically insulating layer or both the first electrically insulating layer and the first electric conductor layer; forming an electrically conductive thin-film layer on a surface of the first electrically insulating layer and wall surfaces of the conduction holes; forming a second electrically insulating layer on the electrically conductive thin-film layer; forming a first electric conductor wiring by electroplating on predetermined portions of the electrically conductive thin-film layer; covering the first electric conductor wiring with a chemical-resistant film; forming a second electric conductor wiring by chemically dissolving a predetermined portion of another surface of the first electric conductor layer; and removing the second electricall
    Type: Grant
    Filed: February 5, 2003
    Date of Patent: May 10, 2005
    Assignee: Nitto Denko Corporation
    Inventors: Toshiki Naito, Yoshifumi Shinogi, Daisuke Uenda
  • Patent number: D568838
    Type: Grant
    Filed: November 1, 2006
    Date of Patent: May 13, 2008
    Assignee: Nitto Denko Corporation
    Inventors: Naohiro Terada, Kouji Kataoka, Tetsuya Ohsawa, Toshiki Naito