Patents by Inventor Toshimitsu Konuma
Toshimitsu Konuma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20110108863Abstract: An object of the present invention is to provide an EL display device having high operation performance and reliability. A third passivation film 45 is disposed under the EL element 203 comprising a pixel electrode (anode) 46, an EL layer 47 and a cathode 48, and diffusion of alkali metals from the EL element 203 formed by ink jet method into TFTs is prevented. Further, the third passivation film 45 prevents penetration of moisture and oxygen from the TFTs, and suppress degradation of the EL element 203 by dispersing the heat generated by the EL element 203.Type: ApplicationFiled: January 20, 2011Publication date: May 12, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Kunitaka YAMAMOTO, Toshimitsu KONUMA
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Patent number: 7924392Abstract: An active matrix liquid crystal display having improved reliability. Pixel regions and a peripheral driver circuit are integrally packed on the display. TFTs forming the peripheral driver circuit are located inside a sealing material layer on the side of a liquid crystal material, thus protecting the peripheral driver circuit from external moisture and contaminants. This enhances the long-term reliability of the peripheral driver circuit. Pixel TFTs are arranged in pixel regions. The leads going from the TFTs forming the peripheral driver circuit to the pixel TFTs are shortened. This results in a reduction in the resistance. As a result, the display characteristics are improved.Type: GrantFiled: May 21, 2009Date of Patent: April 12, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Yuji Kawasaki, Toshimitsu Konuma, Satoshi Teramoto, Yoshiharu Hirakata
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Publication number: 20110068339Abstract: A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an Ioff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.Type: ApplicationFiled: December 2, 2010Publication date: March 24, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Toshimitsu KONUMA, Akira SUGAWARA, Yukiko UEHARA, Hongyong ZHANG, Atsunori SUZUKI, Hideto OHNUMA, Naoaki YAMAGUCHI, Hideomi SUZAWA, Hideki UOCHI, Yasuhiko TAKEMURA
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Publication number: 20110042679Abstract: An object of the present invention is to provide an EL display device, which has a high operating performance and reliability. A third passivation film 45 is disposed under an EL element 203 which comprises a pixel electrode (anode) 46, an EL layer 47 and a cathode 48, to make a structure in which heat generated by the EL element 203 is radiated. Further, the third passivation film 45 prevents alkali metals within the EL element 203 from diffusing into the TFTs side, and prevents moisture and oxygen of the TFTs side from penetrating into the EL element 203. More preferably, heat radiating effect is given to a fourth passivation film 50 to make the EL element 203 to be enclosed by heat radiating layers.Type: ApplicationFiled: November 1, 2010Publication date: February 24, 2011Inventors: Shunpei Yamazaki, Yun Koyama, Kunitaka Yamamoto, Toshimitsu Konuma
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Patent number: 7880167Abstract: An object of the present invention is to provide an EL display device having high operation performance and reliability. A third passivation film 45 is disposed under the EL element 203 comprising a pixel electrode (anode) 46, an EL layer 47 and a cathode 48, and diffusion of alkali metals from the EL element 203 formed by ink jet method into TFTs is prevented. Further, the third passivation film 45 prevents penetration of moisture and oxygen from the TFTs, and suppress degradation of the EL element 203 by dispersing the heat generated by the EL element 203.Type: GrantFiled: March 22, 2005Date of Patent: February 1, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Kunitaka Yamamoto, Toshimitsu Konuma
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Patent number: 7847355Abstract: A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an Ioff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.Type: GrantFiled: August 3, 2009Date of Patent: December 7, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toshimitsu Konuma, Akira Sugawara, Yukiko Uehara, Hongyong Zhang, Atsunori Suzuki, Hideto Ohnuma, Naoaki Yamaguchi, Hideomi Suzawa, Hideki Uochi, Yasuhiko Takemura
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Patent number: 7825588Abstract: An object of the present invention is to provide an EL display device, which has a high operating performance and reliability. A third passivation film 45 is disposed so as to be in contact with an EL element 203 which comprises a pixel electrode (anode) 46, an EL layer 47 and a cathode 48, to make a structure in which heat generated by the EL element 203 is radiated. Further, the third passivation film 45 prevents alkali metals within the EL element 203 from diffusing into the TFTs side, and prevents moisture and oxygen of the TFTs side from penetrating into the EL element 203. More preferably, heat radiating effect is given to a fourth passivation film 50 to make the EL element 203 to be enclosed by heat radiating layers.Type: GrantFiled: November 21, 2006Date of Patent: November 2, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Kunitaka Yamamoto, Toshimitsu Konuma
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Publication number: 20100255184Abstract: To provide a film deposition apparatus capable of forming an EL element of high reliability. An oxidization cell (205) is placed in a liquid phase film deposition chamber (109) such as a spin coater. The oxidization cell is provided with an oxygen gettering agent (209) comprised of an element that belongs to Group 1 or 2 of the periodic table. The oxygen gettering agent (209) is oxidized consuming oxygen in the atmosphere of the chamber, to thereby reduce the oxygen concentration in the atmosphere to 1 ppb or less. This makes it possible to form an EL element in a substantially oxygen-less state, greatly improving the reliability of the EL element.Type: ApplicationFiled: April 14, 2010Publication date: October 7, 2010Inventors: Shunpei Yamazaki, Toshimitsu Konuma, Takeshi Fukunaga
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Publication number: 20100200871Abstract: Failure light emission of an EL element due to failure film formation of an organic EL material in an electrode hole 46 is improved. By forming the organic EL material after embedding an insulator in an electrode hole 46 on a pixel electrode and forming a protective portion 41b, failure film formation in the electrode hole 46 can be prevented. This can prevent concentration of electric current due to a short circuit between a cathode and an anode of the EL element, and can prevent failure light emission of an EL layer.Type: ApplicationFiled: April 23, 2010Publication date: August 12, 2010Inventors: Toshimitsu Konuma, Junya Maruyama
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Patent number: 7744949Abstract: A method of manufacturing a light emitting device of upward emission type and a thin film forming apparatus used in the method are provided. A plurality of film forming chambers are connected to a first transferring chamber. The plural film forming chambers include a metal material evaporation chamber, an EL layer forming chamber, a sputtering chamber, a CVD chamber, and a sealing chamber. By using this thin film forming apparatus, an upward emission type EL element can be fabricated without exposing the element to the outside air. As a result, a highly reliable light emitting device is obtained.Type: GrantFiled: December 4, 2008Date of Patent: June 29, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toshimitsu Konuma, Hiroko Yamazaki
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Patent number: 7741775Abstract: An object of the present invention is to provide an EL display device having a high operation performance and reliability. The switching TFT 201 formed within a pixel has a multi-gate structure, which is a structure which imposes an importance on reduction of OFF current value. Further, the current control TFT 202 has a channel width wider than that of the switching TFT to make a structure appropriate for flowing electric current. Morever, the LDD region 33 of the current control TFT 202 is formed so as to overlap a portion of the gate electrode 35 to make a structure which imposes importance on prevention of hot carrier injection and reduction of OFF current value.Type: GrantFiled: April 20, 2006Date of Patent: June 22, 2010Assignee: Semiconductor Energy Laboratories Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Kunitaka Yamamoto, Toshimitsu Konuma
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Patent number: 7732824Abstract: Failure light emission of an EL element due to failure film formation of an organic EL material in an electrode hole 46 is improved. By forming the organic EL material after embedding an insulator in an electrode hole 46 on a pixel electrode and forming a protective portion 41b, failure film formation in the electrode hole 46 can be prevented. This can prevent concentration of electric current due to a short circuit between a cathode and an anode of the EL element, and can prevent failure light emission of an EL layer.Type: GrantFiled: November 3, 2006Date of Patent: June 8, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toshimitsu Konuma, Junya Maruyama
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Patent number: 7701134Abstract: An object of the present invention is to provide an EL display device having a high operation performance and reliability. The switching TFT 201 formed within a pixel has a multi-gate structure, which is a structure which imposes an importance on reduction of OFF current value. Further, the current control TFT 202 has a channel width wider than that of the switching TFT to make a structure appropriate for flowing electric current. Morever, the LDD region 33 of the current control TFT 202 is formed so as to overlap a portion of the gate electrode 35 to make a structure which imposes importance on prevention of hot carrier injection and reduction of OFF current value.Type: GrantFiled: March 9, 2005Date of Patent: April 20, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Kunitaka Yamamoto, Toshimitsu Konuma
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Publication number: 20100085527Abstract: A liquid crystal device comprising: a pair of substrates having an electrode arrangement thereon; an orientation control means provided on at least one of said substrates; and a ferroelectric or antiferroelectric liquid crystal layer interposed between said substrates, said liquid crystal layer being uniaxially oriented by virtue of said orientation control means, wherein means for suppressing an orientation control effect of said orientation control means with respect to said liquid crystal layer is provided between said liquid crystal layer and said orientation control means.Type: ApplicationFiled: December 7, 2009Publication date: April 8, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Toshimitsu KONUMA, Takeshi NISHI, Michio SHIMIZU, Harumi MORI, Kouji MORIYA, Satoshi MURAKAMI
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Publication number: 20100068860Abstract: There is provided a method by which lightly doped drain (LDD) regions can be formed easily and at good yields in source/drain regions in thin film transistors possessing gate electrodes covered with an oxide covering. A lightly doped drain (LDD) region is formed by introducing an impurity into an island-shaped silicon film in a self-aligning manner, with a gate electrode serving as a mask. First, low-concentration impurity regions are formed in the island-shaped silicon film by using rotation-tilt ion implantation to effect ion doping from an oblique direction relative to the substrate. Low-concentration impurity regions are also formed below the gate electrode at this time. After that, an impurity at a high concentration is introduced normally to the substrate, so forming high-concentration impurity regions. In the above process, a low-concentration impurity region remains below the gate electrode and constitutes a lightly doped drain region.Type: ApplicationFiled: November 19, 2009Publication date: March 18, 2010Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Hongyong ZHANG, Yasuhiko TAKEMURA, Toshimitsu KONUMA, Hideto OHNUMA, Naoaki YAMAGUCHI, Hideomi SUZAWA, Hideki UOCHI
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Patent number: 7642559Abstract: An object of the present invention is to provide an EL display device having a high operation performance and reliability. The switching TFT 201 formed within a pixel has a multi-gate structure, which is a structure which imposes an importance on reduction of OFF current value. Further, the current control TFT 202 has a channel width wider than that of the switching TFT to make a structure appropriate for flowing electric current. Morever, the LDD region 33 of the current control TFT 202 is formed so as to overlap a portion of the gate electrode 35 to make a structure which imposes importance on prevention of hot carrier injection and reduction of OFF current value.Type: GrantFiled: October 27, 2005Date of Patent: January 5, 2010Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Kunitaka Yamamoto, Toshimitsu Konuma
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Patent number: 7635895Abstract: There is provided a method by which lightly doped drain (LDD) regions can be formed easily and at good yields in source/drain regions in thin film transistors possessing gate electrodes covered with an oxide covering. A lightly doped drain (LDD) region is formed by introducing an impurity into an island-shaped silicon film in a self-aligning manner, with a gate electrode serving as a mask. First, low-concentration impurity regions are formed in the island-shaped silicon film by using rotation-tilt ion implantation to effect ion doping from an oblique direction relative to the substrate. Low-concentration impurity regions are also formed below the gate electrode at this time. After that, an impurity at a high concentration is introduced normally to the substrate, so forming high-concentration impurity regions. In the above process, a low-concentration impurity region remains below the gate electrode and constitutes a lightly doped drain region.Type: GrantFiled: December 29, 2006Date of Patent: December 22, 2009Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hongyong Zhang, Yasuhiko Takemura, Toshimitsu Konuma, Hideto Ohnuma, Naoaki Yamaguchi, Hideomi Suzawa, Hideki Uochi
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Publication number: 20090289254Abstract: A TFT formed on an insulating substrate source, drain and channel regions, a gate insulating film formed on at least the channel region and a gate electrode formed on the gate insulating film. Between the channel region and the drain region, a region having a higher resistivity is provided in order to reduce an Ioff current. A method for forming this structure comprises the steps of anodizing the gate electrode to form a porous anodic oxide film on the side of the gate electrode; removing a portion of the gate insulating using the porous anodic oxide film as a mask so that the gate insulating film extends beyond the gate electrode but does not completely cover the source and drain regions. Thereafter, an ion doping of one conductivity element is performed. The high resistivity region is defined under the gate insulating film.Type: ApplicationFiled: August 3, 2009Publication date: November 26, 2009Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Toshimitsu Konuma, Akira Sugawara, Yukiko Uehara, Hongyong Zhang, Atsunori Suzuki, Hideto Ohnuma, Naoaki Yamaguchi, Hideomi Suzawa, Hideki Uochi, Yasuhiko Takemura
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Publication number: 20090291612Abstract: An active matrix liquid crystal display having improved reliability. Pixel regions and a peripheral driver circuit are integrally packed on the display. TFTs forming the peripheral driver circuit are located inside a sealing material layer on the side of a liquid crystal material, thus protecting the peripheral driver circuit from external moisture and contaminants. This enhances the long-term reliability of the peripheral driver circuit. Pixel TFTs are arranged in pixel regions. The leads going from the TFTs forming the peripheral driver circuit to the pixel TFTs are shortened. This results in a reduction in the resistance. As a result, the display characteristics are improved.Type: ApplicationFiled: May 21, 2009Publication date: November 26, 2009Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shunpei Yamazaki, Jun Koyama, Yuji Kawasaki, Toshimitsu Konuma, Satoshi Teramoto, Yoshiharu Hirakata
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Publication number: 20090284701Abstract: A liquid crystal device comprising: a pair of substrates having an electrode arrangement thereon; an orientation control means provided on at least one of said substrates; and a ferroelectric or antiferroelectric liquid crystal layer interposed between said substrates, said liquid crystal layer being uniaxially oriented by virtue of said orientation control means, wherein means for suppressing an orientation control effect of said orientation control means with respect to said liquid crystal layer is provided between said liquid crystal layer and said orientation control means.Type: ApplicationFiled: July 30, 2009Publication date: November 19, 2009Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Toshimitsu KONUMA, Takeshi NISHI, Michio SHIMIZU, Harumi MORI, Kouji MORIYA, Satoshi MURAKAMI