Patents by Inventor Toshio Sasaki

Toshio Sasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5965101
    Abstract: A process for producing hydrogen peroxide which comprises reacting hydrogen and oxygen in a reaction medium containing a halide of platinum group metal. The process is far simplified and the produced amount of hydrogen peroxide per the halide of platinum group metal is large.
    Type: Grant
    Filed: January 29, 1997
    Date of Patent: October 12, 1999
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Fumisato Goto, Kozo Tanaka, Toshio Sasaki
  • Patent number: 5910913
    Abstract: Each memory cell of a non-volatile semiconductor memory essentially consisting of a one-transistor type memory cell comprising only of an MOSFET having a floating gate electrode. When an electric programming operation is carried out, a positive voltage is applied to an n type drain region, a negative voltage is applied to a control gate and a source region is grounded. When an erasing operation is carried out, the positive voltage is applied to the control gate while all the other electrodes and a semiconductor substrate are grounded. Low power consumption can be accomplished because both of the programming operation and erasing operations are carried out by utilizing a tunneling mechanism. Particularly because the negative voltage is used for the word line, a drain voltage at the time of programming of data can be lowered, so that degradation of a gate oxide film at a channel portion can be mitigated.
    Type: Grant
    Filed: July 30, 1998
    Date of Patent: June 8, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Masataka Kato, Tetsuo Adachi, Toshihiro Tanaka, Toshio Sasaki, Hitoshi Kume, Katsutaka Kimura
  • Patent number: 5840934
    Abstract: Disclosed is a process for producing an epoxidized product of olefins, which comprises oxidizing olefins in the presence of an oxidizing catalyst, using an alcohol medium solution of hydrogen peroxide produced by catalytically reacting hydrogen with oxygen in an alcohol medium.According to the present invention, an epoxidized product of olefins can be produced by using an alcohol medium solution of hydrogen peroxide in high selectivity without requiring an aqueous hydrogen peroxide solution of high concentration and producing a large amount of by-products.
    Type: Grant
    Filed: June 13, 1997
    Date of Patent: November 24, 1998
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Fumisato Goto, Satoru Shibata, Toshio Sasaki, Kozo Tanaka
  • Patent number: 5828600
    Abstract: Each memory cell of a non-volatile semiconductor memory essentially consisting of a one-transistor type memory cell comprising only of an MOSFET having a floating gate electrode. When an electric programming operation is carried out, a positive voltage is applied to an n type drain region, a negative voltage is applied to a control gate and a source region is grounded. When an erasing operation is carried out, the positive voltage is applied to the control gate while all the other electrodes and a semiconductor substrate are grounded. Low power consumption can be accomplished because both of the programming operation and erasing operations are carried out by utilizing a tunneling mechanism. Particularly because the negative voltage is used for the word line, a drain voltage at the time of programming of data can be lowered, so that degradation of a gate oxide film at a channel portion can be mitigated.
    Type: Grant
    Filed: October 30, 1996
    Date of Patent: October 27, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Masataka Kato, Tetsuo Adachi, Toshihiro Tanaka, Toshio Sasaki, Hitoshi Kume
  • Patent number: 5818792
    Abstract: Input/output terminals of a first semiconductor memory device in which failures or defects exist in units of memory mats and input/output terminals of a second semiconductor memory device having redundant memory mats are connected to one another on a mounted substrate to thereby relieve the failures in the memory mat units. A power source is substantially cut off from supplying to a faulty memory mat.
    Type: Grant
    Filed: February 25, 1997
    Date of Patent: October 6, 1998
    Assignees: Hitachi, Ltd., Hitachi Tohbu Semiconductor, Ltd.
    Inventors: Toshio Sasaki, Kazumasa Yanagisawa, Toshio Sugano, Kiyoshi Inoue, Seiichiro Tsukui, Masakazu Aoki, Shigeru Suzuki, Masashi Horiguchi
  • Patent number: 5700895
    Abstract: A novel ethylene-.alpha.-olefin copolymer and a molded article formed therefrom, wherein (A) a density is 0.870 to 0.945 g/cm.sup.3, (B) a relation between an activation energy of flow Ea (J/mole K) obtained by measurement of viscoelasticity at at least three temperatures in the molten state and a melt flow rate MFR (g/10 min) satisfies the following equation (1):logEa.gtoreq.4.6-0.04.times.logMFR (1),(C) a coefficient Cx of variation of chemical composition distribution represented by the following equation (2) is 0.40 to 0.80:Cx=.sigma./SCB.sub.ave (2)wherein .sigma. is a standard deviation of chemical composition distribution (1/1,000 C) and SCB.sub.ave is the average of short chain branchings per 1,000 C (1/1,000 C), (D) a ratio of a weight average molecular weight Mw to a number average molecular weight Mn (Mw/Mn) is 3 to 20, and (F) a ratio (TVR) of trans-vinylene type carbon-carbon double bonds to total carbon-carbon double bonds as determined with an infrared absorption spectrum being 1 to 30%.
    Type: Grant
    Filed: December 11, 1995
    Date of Patent: December 23, 1997
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Yuji Kanda, Toshiyuki Kokubo, Yufu Sato, Toshio Sasaki, Hiroyuki Shiraishi, Yuji Shigematsu
  • Patent number: 5691952
    Abstract: Input/output terminals of a first semiconductor memory device in which failures or defects exist in units of memory mats and input/output terminals of a second semiconductor memory device having redundant memory mats are connected to one another on a mounted substrate to thereby relieve the failures in the memory mat units. A power source is substantially cut off from supplying to a faulty memory mat.
    Type: Grant
    Filed: January 24, 1996
    Date of Patent: November 25, 1997
    Assignees: Hitachi, Ltd., Hitachi Tohbu Semiconductor, Ltd.
    Inventors: Toshio Sasaki, Kazumasa Yanagisawa, Toshio Sugano, Kiyoshi Inoue, Seiichiro Tsukui, Masakazu Aoki, Shigeru Suzuki, Masashi Horiguchi
  • Patent number: 5602223
    Abstract: An ethylene-.alpha.-olefin copolymer having;(A) a density (.rho.) of from 0.870 to 0.945 g/cm.sup.3,(B) a ratio (TVR) of trans-vinylene type carbon-carbon double bonds to total cabon-carbon double bonds as determined with an infrared absorption spectrum being 35% or more, and(C) a weight average molecular weight (Mw) of from 3.0.times.10.sup.4 to 6.0.times.10.sup.5, and a molded article comprising thereof. The present invention provides an ethylene-.alpha.-olefin copolymer and a molded article comprising thereof having an excellent transparency, high gloss and high melt tension.
    Type: Grant
    Filed: March 5, 1996
    Date of Patent: February 11, 1997
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Toshio Sasaki, Kohzoh Miyazaki, Hiroyuki Shiraishi, Yuji Shigematsu, Hirofumi Johoji, Akio Uemura, Yufu Sato
  • Patent number: 5592415
    Abstract: Each memory cell of a non-volatile semiconductor memory essentially consisting of a one-transistor type memory cell comprising only of an MOSFET having a floating gate electrode. When an electric programming operation is carried out, a positive voltage is applied to an n type drain region, a negative voltage is applied to a control gate and a source region is grounded. When an erasing operation is carried out, the positive voltage is applied to the control gate while all the other electrodes and a semiconductor substrate are grounded. Low power consumption can be accomplished because both of the programming operation and erasing operations are carried out by utilizing a tunneling mechanism. Particularly because the negative voltage is used for the word line, a drain voltage at the time of programming of data can be lowered, so that degradation of a gate oxide film at a channel portion can be mitigated.
    Type: Grant
    Filed: December 10, 1993
    Date of Patent: January 7, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Masataka Kato, Tetsuo Adachi, Toshihiro Tanaka, Toshio Sasaki, Hitoshi Kume, Katsutaka Kimura
  • Patent number: 5581508
    Abstract: In a semiconductor memory apparatus having a row decoder classified by main word lines and word lines, the number of spare lines for a defect is increased without increasing the number of spare main word lines. The area of a redundancy circuit is minimized to improve the yield of chip. Normal and spare memory blocks each including a plurality of memory cells are each divided so that replacement may be effected without increasing the number of spare main word lines even when defective addresses associated with a plurality of normal main word lines take place.
    Type: Grant
    Filed: December 9, 1994
    Date of Patent: December 3, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Toshio Sasaki, Toshihiro Tanaka, Atsushi Nozoe, Hitoshi Kume
  • Patent number: 5550781
    Abstract: A memory cartridge having a plurality of dynamic memory units includes an access conversion circuit which converts a static access signal into its inverted signal and an access control circuit which controllably switches between a signal for refreshing each dynamic unit and a signal for external access. The memory cartridge also includes a power switching circuit which switches power from an internal power supply to an external power supply when the memory cartridge is mounted to an external device.
    Type: Grant
    Filed: January 31, 1995
    Date of Patent: August 27, 1996
    Assignees: Hitachi Maxell, Ltd., Hitachi, Ltd
    Inventors: Ken Sugawara, Shigeru Sakairi, Mikio Matoba, Toshio Sasaki, Katsuhiro Shimohigashi, Katsutaka Kimura
  • Patent number: 5508364
    Abstract: A process for polymerizing ethylene at a high temperature under high pressure, which comprises contacting ethylene alone or along with an .alpha.-olefin at a temperature of 120.degree. C. or more at a pressure of 350 kg/cm.sup.2 or more with a catalyst consisting essentially of (A) a reaction product of (A1) a titanium compound having at least one titanium-nitrogen bond with (A2) an organometallic compound of an element of Groups I to III of the Periodic Table and (B) an organoaluminum compound. Said process enables the production of an ethylene polymer or copolymer having a narrow composition distribution and a high molecular weight and being excellent in weather resistance, color development, transparency, corrosiveness and mechanical properties.
    Type: Grant
    Filed: August 22, 1995
    Date of Patent: April 16, 1996
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Toshio Sasaki, Hirofumi Johoji, Hiroyuki Shiraishi, Kohzoh Miyazaki, Toshimi Sato, Yuji Shigematsu
  • Patent number: 5470900
    Abstract: This invention provides a thermoplastic elastomer powder produced by a gas polymerization process by the use of a specified catalyst system which is excellent in powder fluidity, retains a high fluidity even in a state where no substantial forming pressure is applied and can be formed by powder molding process, as well as a powder molding process using said elastomer powder and a molded product of said molding process.
    Type: Grant
    Filed: May 19, 1994
    Date of Patent: November 28, 1995
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Toshio Sasaki, Takeshi Ebara, Toshio Igarashi, Masayuki Tatsumi, Kazuki Wakamatsu
  • Patent number: 5469390
    Abstract: In a semiconductor memory system including a plurality of memory chips, a spare memory is shared among the memory chips. For such a purpose, a common redundant circuit and an external terminal capable of accessing to a spare memory are added to a semiconductor memory system, and a first region for storing a defect address in each memory of the semiconductor memory system and a second region for storing a defect address of the system of the object having the same structure as the first region are provided in the redundant circuit. With this, even when the defect of a normal memory of the semiconductor memory system can not be replaced with the spare memory of the system itself, replacement is made possible with other system having the same structure. Accordingly, the yield of the semiconductor memory system can be increased, and the reliability is also increased.
    Type: Grant
    Filed: September 6, 1994
    Date of Patent: November 21, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Toshio Sasaki, Toshihiro Tanaka
  • Patent number: 5446690
    Abstract: A semiconductor nonvolatile memory device in which the states of memory cells are determined with respect to each of all data lines in a nonvolatile memory device so as to perform control such as continuation and suspension of programming automatically. Memory cell arrays in which nonvolatile semiconductor memory cells are arranged in an array form, word lines W1 and W2 to which control gates of a plurality of memory cell groups (sectors) are connected in common and data lines to which drains of a plurality of memory cells are connected in common are included, and there are possessed of a precharging circuit, a data hold circuit having a sense amplifier function and a data latch function and a memory cell state detecting circuit for each of said data lines. Reprogramming is made at the same time with respect to memory cells (sector) connected to the same word line.
    Type: Grant
    Filed: May 25, 1994
    Date of Patent: August 29, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Toshihiro Tanaka, Masataka Kato, Toshio Sasaki, Hitoshi Kume, Hiroaki Kotani, Kazunori Furusawa
  • Patent number: 5430681
    Abstract: A memory cartridge having a plurality of dynamic memory units includes an access conversion circuit which converts a static access signal into its inverted signal and an access control circuit which controllably switches between a signal for refreshing each dynamic unit and a signal for external access. The memory cartridge also includes a power switching circuit which switches power from an internal power supply to an external power supply when the memory cartridge is mounted to an external device.
    Type: Grant
    Filed: July 5, 1994
    Date of Patent: July 4, 1995
    Assignees: Hitachi Maxell, Ltd., Hitachi, Ltd.
    Inventors: Ken Sugawara, Shigeru Sakairi, Mikio Matoba, Toshio Sasaki, Katsuhiro Shimohigashi, Katsutaka Kimura
  • Patent number: 5422856
    Abstract: To effect erase and program operations, i.e., rewrite of the non-volatile memory device efficiently with small electric power consumption and at high speed, a plurality of memory blocks that have a plurality of sectors and that each include a plurality of non-volatile memory cells are connected to buffer memories having at least the same memory capacity as a sector, and a read/write circuit generates internal addresses and timing for selecting sectors according to the external address and timing signals to control the read-out and rewrite of data between the sectors corresponding to the internal addresses and the buffer memories corresponding to the sectors, wherein the read/write circuit selects the sectors at timings shifted from one another and erases or programs the data in the selected sector in order to rewrite the data.
    Type: Grant
    Filed: March 1, 1994
    Date of Patent: June 6, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Toshio Sasaki, Toshihiro Tanaka, Masataka Kato
  • Patent number: 5378778
    Abstract: A liquid catalyst component which can be used as a component of a catalyst system in combination with an organoaluminum compound (B) for producing ethylene-.alpha.-olefin copolymers.
    Type: Grant
    Filed: April 29, 1994
    Date of Patent: January 3, 1995
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Hirofumi Johoji, Hiroyuki Shiraishi, Toshio Sasaki, Kiyoshi Kawai
  • Patent number: 5275133
    Abstract: The present invention provides an apparatus for cooling an internal combustion engine having a supercharger attached thereto, wherein the apparatus includes communication passages and by way of which the upper end of a coolant flow passage for circulating coolant through the internal combustion engine and a coolant flow passage for circulating coolant through the supercharger communicates with an upper tank installed on a radiator so that cooling of the supercharge and separating of air from coolant can simultaneously be accomplished by arranged of the communication passages.
    Type: Grant
    Filed: May 29, 1990
    Date of Patent: January 4, 1994
    Assignee: Toshio Sasaki
    Inventors: Toshio Sasaki, Yasukuni Kawashima
  • Patent number: 5258476
    Abstract: A process for producing an ethylene-.alpha.-olefin copolymer which comprises copolymerizing ethylene and an .alpha.-olefin at a temperature higher than 120.degree. C. by using a catalyst system comprising a specified titanium amide compound represented by general formula (R.sup.1 R.sup.2 N).sub.4-n TiY.sub.n and an oxygen-containing alkylaluminum compound. According to the above process, there can be obtained ethylene-.alpha.-olefin copolymers narrow in composition distribution, high in molecular weight and excellent in weather resistance, colorizability, corrosion resistance and dynamic properties.
    Type: Grant
    Filed: March 12, 1992
    Date of Patent: November 2, 1993
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Toshio Sasaki, Hirofumi Johoji, Hiroyuki Shiraishi, Yoshihiro Miyoshi