Abstract: A steam engine has a pipe shaped fluid container, a heating and cooling devices respectively provided at a heating and cooling portions of the fluid container, and an output device connected to the fluid container, so that the output device is operated by the fluid pressure change in the fluid container, to generate an electric power. In such a steam engine, an inner radius “r1” of the cooling portion is made to almost equal to a depth “?1” of thermal penetration, which is calculated by the following formula (1); ? 1 = 2 ? a 1 ? ( 1 ) wherein, “a1” is a heat diffusivity of the working fluid at its low pressure, and “?” is an angular frequency of the movement of the working fluid.

Abstract: A manufacturing method of a silicon carbide semiconductor device includes the steps of: preparing a semiconductor substrate including a silicon carbide substrate, a drift layer and a first semiconductor layer; forming a plurality of first trenches in a cell portion; forming a gate layer on an inner wall of each first trench by an epitaxial growth method; forming a first insulation film on the surface of the semiconductor substrate; forming a gate electrode on the first insulation film for connecting to the gate layer electrically; forming a source electrode on the first insulation film for connecting to the first semiconductor layer in the cell portion; and forming a drain electrode connected to the silicon carbide substrate electrically.

Abstract: In a steam engine having a heating device, a cooling device, and an output device, the output device comprises a piston reciprocally moving by a self-excited fluid vibration of a working fluid in a fluid container. The piston is reciprocally moved by the output device for a certain period before starting an operation of the steam engine, so that the working fluid is moved to an inside space of the heating device. Since the working fluid is surely heated and vaporized by the heating device, the fluid vibration is stably started, and as a result, the operation of the steam engine can be smoothly started.

Abstract: A stem engine has a fluid container, a heating device and a cooling device. The fluid container has an outer pipe having an upper closed end, and an inner pipe provided in the outer pipe and having a fluid inlet port through which the inside of the inner pipe is operatively communicated with the outside of the inner pipe. The inner pipe has a pressure control device at its lower end, and a fluid injection port at its upper end for injecting the working fluid in the inner pipe into a space defined between the inner pipe and the outer pipe, when the pressure in the inner pipe is increased. The working fluid injected into the space between the inner and outer pipes is heated and vaporized by the heating device, so that volumetric expansion of the working fluid takes place to increase fluid pressure in the fluid container. The vaporized steam is then cooled and liquidized by the cooling device and thereby the volumetric contraction takes place, so that the fluid pressure is decreased.

Abstract: An airflow meter has a membrane type sensor element. The sensor element is supported on a support member so that a sensing surface of the sensor element is in parallel to the airflow direction. The airflow meter has at least one means for protecting the sensor element from dust such as foreign particles. The protecting means is provided with an obstruction member that is disposed upstream or downstream of the sensor element with respect to the airflow direction. The sensor element is hidden behind the obstruction member. The obstruction member has gradually spreading surfaces and gradually converging surfaces along the airflow direction. Alternatively, the protecting means can be provided with a deflector, a cover member, a flow guide member, an inlet or a dust collector.

Abstract: A silicon carbide power device includes a junction field effect transistor and a protective diode, which is a Zener or PN junction diode. The PN junction of the protective diode has a breakdown voltage lower than the PN junction of the transistor. Another silicon carbide power device includes a protective diode, which is a Schottky diode. The Schottky diode has a breakdown voltage lower than the PN junction of the transistor by adjusting Schottky barrier height or the depletion layer formed in the semiconductor included in the Schottky diode. Another silicon carbide power device includes three protective diodes, which are Zener diodes. Two of the protective diodes are used to clamp the voltages applied to the gate and the drain of the transistor due to surge energy and used to release the surge energy. The last diode is a thermo-sensitive diode, with which the temperature of the JFET is measured.

Abstract: An optical device includes a semiconductor substrate and an optical part having a plurality of columnar members disposed on the substrate. Each columnar member is disposed in a standing manner and adhered each other so that the optical part is provided. The optical part is integrated with the substrate. This optical part has high design freedom.

Abstract: A semiconductor device arrangement includes a plurality of three-dimensional semiconductor units. Each of the three-dimensional semiconductor units includes a semiconductor chip in a shape of a rectangular parallelepiped having six surfaces, and semiconductor devices formed on at least one among the six surfaces. The three-dimensional semiconductor units are mechanically connected and supported, and are electrically connected in a suitable way.

Abstract: In a semiconductor device, a p-type base region is provided in an n−-type substrate to extend from a principal surface of the substrate in a perpendicular direction to the principal surface. An n+-type source region extends in the p-type base region from the principal surface in the perpendicular direction, and an n+-type drain region extends in the substrate separately from the p-type base region with a drift region interposed therebetween. A trench is formed to penetrate the p-type base region from the n+-type source region in a direction parallel to the principal surface. A gate electrode is formed in the trench through a gate insulating film. Accordingly, a channel region can be formed with a channel width in a depth direction of the trench when a voltage is applied to the gate electrode.

Abstract: In a trench-gate type power MOSFET in which a gate electrode is formed on a gate oxide layer formed on a surface of a wall defining a trench, the trench is annealed by heating, for example, at the temperature between 1050° C. and 1150° C. in a hydrogen atmosphere before the gate oxide layer is formed. The crystal defects generated in a crystal adjacent to the trench are cured by the hydrogen annealing without enlarging the trench horizontal width, so that a trench having a high aspect ratio is provided while leak current at a PN junction is prevented. In addition, the breakdown voltage of the gate oxide layer is prevented from being lowered.

Abstract: In a semiconductor device, a p-type base region is provided in an n−-type substrate to extend from a principal surface of the substrate in a perpendicular direction to the principal surface. An n+-type source region extends in the p-type base region from the principal surface in the perpendicular direction, and an n+-type drain region extends in the substrate separately from the p-type base region with a drift region interposed therebetween. A trench is formed to penetrate the p-type base region from the n+-type source region in a direction parallel to the principal surface. A gate electrode is formed in the trench through a gate insulating film. Accordingly, a channel region can be formed with a channel width in a depth direction of the trench when a voltage is applied to the gate electrode.

Abstract: An airflow meter has a membrane type sensor element. The sensor element is supported on a support member so that a sensing surface of the sensor element is in parallel to the airflow direction. The airflow meter has at least one means for protecting the sensor element from dust such as foreign particles. The protecting means is provided with an obstruction member that is disposed upstream or downstream of the sensor element with respect to the airflow direction. The sensor element is hidden behind the obstruction member. The obstruction member has gradually spreading surfaces and gradually converging surfaces along the airflow direction. Alternatively, the protecting means can be provided with a deflector, a cover member, a flow guide member, an inlet or a dust collector.

Abstract: A silicon carbide power device includes a junction field effect transistor and a protective diode, which is a Zener or PN junction diode. The PN junction of the protective diode has a breakdown voltage lower than the PN junction of the transistor. Another silicon carbide power device includes a protective diode, which is a Schottky diode. The Schottky diode has a breakdown voltage lower than the PN junction of the transistor by adjusting Schottky barrier height or the depletion layer formed in the semiconductor included in the Schottky diode. Another silicon carbide power device includes three protective diodes, which are Zener diodes. Two of the protective diodes are used to clamp the voltages applied to the gate and the drain of the transistor due to surge energy and used to release the surge energy. The last diode is a thermo-sensitive diode, with which the temperature of the JFET is measured.

Abstract: In a semiconductor device, a p-type base region is provided in an n−-type substrate to extend from a principal surface of the substrate in a perpendicular direction to the principal surface. An n+-type source region extends in the p-type base region from the principal surface in the perpendicular direction, and an n+-type drain region extends in the substrate separately from the p-type base region with a drift region interposed therebetween. A trench is formed to penetrate the p-type base region from the n+-type source region in a direction parallel to the principal surface. A gate electrode is formed in the trench through a gate insulating film. Accordingly, a channel region can be formed with a channel width in a depth direction of the trench when a voltage is applied to the gate electrode.

Abstract: A semiconductor device arrangement includes a plurality of three-dimensional semiconductor units. Each of the three-dimensional semiconductor units includes a semiconductor chip in a shape of a rectangular parallelepiped having six surfaces, and semiconductor devices formed on at least one among the six surfaces. The three-dimensional semiconductor units are mechanically connected and supported, and are electrically connected in a suitable way.

Abstract: A semiconductor device has a dielectric strength for a gate oxide film at a trench bottom that is higher than that of side walls used for channels. An n+0 type substrate 1 having substrate plane orientation of (110) is prepared, and the side walls of a trench where channels are formed are in (100) planes. The other, non-channel forming, side walls of the trench are in (110) planes. Thus, the growth rate of the gate oxide film 7 in the non-channel forming side walls and the trench bottom is faster than that in the channel forming side walls. As a result, the film thickness at the non-channel-forming side walls and the trench bottom is greater than that of the channel-forming side walls. Accordingly, the device has high mobility, and there is no drop of dielectric strength due to partial reduction of the thickness of the gate oxide film 7. This achieves both a reduction of the ON resistance and an increase in the dielectric strength of the semiconductor device.

Abstract: In a trench-gate type power MOSFET in which a gate electrode is formed on a gate oxide layer formed on a surface of a wall defining a trench, the trench is annealed by heating, for example, at the temperature between 1050° C. and 1150° C. in a hydrogen atmosphere before the gate oxide layer is formed. The crystal defects generated in a crystal adjacent to the trench are cured by the hydrogen annealing without enlarging the trench horizontal width, so that a trench having a high aspect ratio is provided while leak current at a PN junction is prevented. In addition, the breakdown voltage of the gate oxide layer is prevented from being lowered.

Abstract: A semiconductor device has a dielectric strength for a gate oxide film at a trench bottom that is higher than that of side walls used for channels. An n+ type substrate 1 having substrate plane orientation of (110) is prepared, and the side walls of a trench where channels are formed are in (100) planes. The other, non-channel forming, side walls of the trench are in (110) planes. Thus, the growth rate of the gate oxide film 7 in the non-channel forming side walls and the trench bottom is faster than that in the channel forming side walls. As a result, the film thickness at the non-channel-forming side walls and the trench bottom is greater than that of the channel-forming side walls. Accordingly, the device has high mobility, and there is no drop of dielectric strength due to partial reduction of the thickness of the gate oxide film 7. This achieves both a reduction of the ON resistance and an increase in the dielectric strength of the semiconductor device.

Abstract: A silicon layer provided in a silicon substrate through a buried oxide film includes a silicon island partitioned by a trench. A surface of the silicon island in the trench is covered with a side wall oxide film, and LDMOS transistors are formed in the trench. A first impurity-doped polysilicon layer for applying a substrate potential is disposed between the buried oxide film and the substrate, and a second impurity-doped polysilicon layer is buried in the trench to communicate with the first impurity-doped polysilicon layer. Further, electrodes for applying the substrate potential are disposed on the second impurity-doped polysilicon layer. Accordingly, the substrate potential can be readily applied from the surface of the silicon layer.

Abstract: A semiconductor device of SOI structure exhibits a excellent heat-radiating characteristic while assuring breakdown-voltage and element-isolating performance. A buried silicon oxide film having a thickness required by the breakdown-voltage of a semiconductor element is buried between a SOI layer and a silicon substrate. A SOI layer is divided into island silicon regions by a groove for electrical-isolation use, and the groove is filled with dielectric such as an oxide film and polycrystalline silicon. In an island silicon region, a LDMOS transistor having high breakdown voltage may be formed as the semiconductor element, and potential distribution is created in accordance with a voltage application to the semiconductor element. The buried silicon oxide film at a region where low electric potential is distributed, for example a region below a grounded well region of the LDMOS transistor, is made thin.