Abstract: A semiconductor package structure includes a redistribution structure, a chip, an upper dielectric layer, a plurality of conductive members and an encapsulation layer. The redistribution structure includes a redistribution layer and a first dielectric layer disposed on the redistribution layer. The upper dielectric layer is disposed between the chip and the first dielectric layer of the redistribution structure, wherein the upper dielectric layer and the first dielectric layer are organic materials. A plurality of conductive members is disposed between the redistribution layer and the chip. Each conductive member has a first end adjacent to the chip and a second end adjacent to the redistribution structure, wherein the first end of said each conductive member contacts with the upper dielectric layer and the second end of said each conductive member contacts with the first dielectric layer.

Abstract: A separating device includes a separating unit and a crack front line adjusting unit. The separating unit is adapted to separate the flexible film and the substrate. During the process of separating the flexible film from the substrate, a crack front line is formed between a portion of the flexible film not separated from the substrate and a portion of the flexible film separated from the substrate. The crack front line adjusting unit is adapted to sense a relative displacement state of the flexible film and the substrate for determining a distribution of the crack front line, and is adapted to apply a down pressing force to the flexible film or the substrate and increase or decrease the down pressing force according to the relative displacement state, so as to adjust the distribution of the crack front line.

Abstract: A method, apparatus and program product simulate a high performance computing (HPC) application environment by creating a cluster of virtual nodes in one or more operating system instances executing on one or more physical computing node, thereby enabling a plurality of parallel tasks from an HPC application to be executed on the cluster of virtual nodes.

Abstract: A method, apparatus and program product simulate a high performance computing (HPC) application environment by creating a cluster of virtual nodes in one or more operating system instances executing on one or more physical computing node, thereby enabling a plurality of parallel tasks from an HPC application to be executed on the cluster of virtual nodes.

Abstract: A redistribution layer structure of the semiconductor package includes a dielectric layer having a thickness, at least one upper conductive wire disposed on a first surface of the dielectric layer, at least one lower conductive wire disposed on a second surface of the dielectric layer, and vias penetrating the dielectric layer and connecting the at least one upper conductive wire and the at least one lower conductive wire. Each via has a cross-section at one upper conductive wire. The cross-section has a third width. The ratio of the third width to the thickness of the dielectric layer is less than or equal to 1. The ratio of the pitch between every two adjacent vias to the third width is greater than or equal to 0.5.

Abstract: A semiconductor package structure includes a redistribution structure, a chip, an upper dielectric layer, a plurality of conductive members and an encapsulation layer. The redistribution structure includes a redistribution layer and a first dielectric layer disposed on the redistribution layer. The upper dielectric layer is disposed between the chip and the first dielectric layer of the redistribution structure, wherein the upper dielectric layer and the first dielectric layer are organic materials. A plurality of conductive members is disposed between the redistribution layer and the chip. Each conductive member has a first end adjacent to the chip and a second end adjacent to the redistribution structure, wherein the first end of said each conductive member contacts with the upper dielectric layer and the second end of said each conductive member contacts with the first dielectric layer.

Abstract: A separating device includes a separating unit and a crack front line adjusting unit. The separating unit is adapted to separate the flexible film and the substrate. During the process of separating the flexible film from the substrate, a crack front line is formed between a portion of the flexible film not separated from the substrate and a portion of the flexible film separated from the substrate. The crack front line adjusting unit is adapted to sense a relative displacement state of the flexible film and the substrate for determining a distribution of the crack front line, and is adapted to apply a down pressing force to the flexible film or the substrate and increase or decrease the down pressing force according to the relative displacement state, so as to adjust the distribution of the crack front line.

Abstract: A chip package structure includes a chip package layer and at least one conductive structure layer. The chip package layer includes at least one chip and an encapsulant. The chip has an upper surface, and the encapsulant is used to encapsulate the chip and expose the upper surface. The conductive structure layer includes a plurality of first conductive pillars and a plurality of second conductive pillars. The first conductive pillars are disposed on the upper surface, the second conductive pillars are disposed on the upper surface and located between an edge of the upper surface and the first conductive pillars. A density of the second conductive pillars along an extending direction of the edge is greater than or equal to 1.2 times of a density of the first conductive pillars along the extending direction of the edge.

Abstract: A redistribution layer structure of the semiconductor package includes a dielectric layer having a thickness, at least one upper conductive wire disposed on a first surface of the dielectric layer, at least one lower conductive wire disposed on a second surface of the dielectric layer, and vias penetrating the dielectric layer and connecting the at least one upper conductive wire and the at least one lower conductive wire. Each via has a cross-section at one upper conductive wire. The cross-section has a third width. The ratio of the third width to the thickness of the dielectric layer is less than or equal to 1. The ratio of the pitch between every two adjacent vias to the third width is greater than or equal to 0.5.

Abstract: The disclosure relates to a dosage forms and combinations of dosage forms useful for effective oral administration of drugs which are otherwise unsuitable for oral administration, owing to acid- and/or protease-mediated degradation. The dosage forms include a self-microemulsifying drug delivery system (SMEDDS) with which the drug is combined and an antacid. When co-administered to a mammal, the dosage form(s) can prevent drug degradation by the strong acid and digestive enzymes normally present in the gastric environment, and can improve water-soluble drug absorption in gastrointestinal (GI) tract. The dosage forms can be used to effectively administer insulin by an oral route, for example, such as in the form of a powder that can be stored for long periods and reconstituted with water or another fluid shortly before administration.

Abstract: A method, apparatus and program product utilize an empirical approach to determine the locations of one or more IO adapters in an HPC environment. Performance tests may be run using a plurality of candidate mappings that map IO adapters to various locations in the HPC environment, and based upon the results of such testing, speculative adapter affinity information may be generated that assigns one or more IO adapters to one or more locations to optimize adapter affinity performance for subsequently-executed tasks.

Abstract: A message flow controller limits a process from passing a new message in a reliable message passing layer from a source node to at least one destination node while a total number of in-flight messages for the process meets a first level limit. The message flow controller limits the new message from passing from the source node to a particular destination node from among a plurality of destination nodes while a total number of in-flight messages to the particular destination node meets a second level limit. Responsive to the total number of in-flight messages to the particular destination node not meeting the second level limit, the message flow controller only sends a new packet from among at least one packet for the new message to the particular destination node while a total number of in-flight packets for the new message is less than a third level limit.

Abstract: A method, apparatus and program product utilize an empirical approach to determine the locations of one or more IO adapters in an HPC environment. Performance tests may be run using a plurality of candidate mappings that map IO adapters to various locations in the HPC environment, and based upon the results of such testing, speculative adapter affinity information may be generated that assigns one or more IO adapters to one or more locations to optimize adapter affinity performance for subsequently-executed tasks.

Abstract: Administering group identifiers of processes in a parallel computer includes each process in a set of processes, receiving from a compute node of the plurality of compute nodes, a request to establish the set of processes as an operational group including receiving a list of process identifiers for each process of the set of processes. Embodiments also include each process generating without communication amongst the processes, a unique group identifier in dependence upon the list of process identifiers.

Abstract: In a distributed computing environment that includes compute nodes, where the compute nodes execute a plurality of tasks, a lock for resources may be administered. Administering the lock may be carried out by requesting, in an atomic operation by a requesting task, the lock, including: determining, by the requesting task, whether the lock is available; if the lock is available, obtaining the lock; and if the lock is unavailable, joining, by the requesting task, a queue of tasks waiting for availability of the lock.

Abstract: In a distributed computing environment that includes compute nodes, where the compute nodes execute a plurality of tasks, a lock for resources may be administered. Administering the lock may be carried out by requesting, in an atomic operation by a requesting task, the lock, including: determining, by the requesting task, whether the lock is available; if the lock is available, obtaining the lock; and if the lock is unavailable, joining, by the requesting task, a queue of tasks waiting for availability of the lock.

Abstract: A method, apparatus and program product utilize an empirical approach to determine the locations of one or more IO adapters in an HPC environment. Performance tests may be run using a plurality of candidate mappings that map IO adapters to various locations in the HPC environment, and based upon the results of such testing, speculative adapter affinity information may be generated that assigns one or more IO adapters to one or more locations to optimize adapter affinity performance for subsequently-executed tasks.

Abstract: A method, apparatus and program product utilize an empirical approach to determine the locations of one or more IO adapters in an HPC environment. Performance tests may be run using a plurality of candidate mappings that map IO adapters to various locations in the HPC environment, and based upon the results of such testing, speculative adapter affinity information may be generated that assigns one or more IO adapters to one or more locations to optimize adapter affinity performance for subsequently-executed tasks.

Abstract: Methods, apparatuses, and computer program products for responding to a timeout of a message in a parallel computer are provided. The parallel computer includes a plurality of compute nodes operatively coupled for data communications over one or more data communications networks. Each compute node includes one or more tasks. Embodiments include a first task of a first node sending a message to a second task on a second node. Embodiments also include the first task sending to the second node a command via a parallel operating environment (POE) in response to a timeout of the message. The command instructs the second node to perform a timeout motivated operation.

Abstract: Methods, apparatuses, and computer program products for responding to a timeout of a message in a parallel computer are provided. The parallel computer includes a plurality of compute nodes operatively coupled for data communications over one or more data communications networks. Each compute node includes one or more tasks. Embodiments include a first task of a first node sending a message to a second task on a second node. Embodiments also include the first task sending to the second node a command via a parallel operating environment (POE) in response to a timeout of the message. The command instructs the second node to perform a timeout motivated operation.