Patents by Inventor Tsai Yang
Tsai Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9104501Abstract: A job may be divided into multiple tasks that may execute in parallel on one or more compute nodes. The tasks executing on the same compute node may be coordinated using barrier synchronization. However, to perform barrier synchronization, the tasks use (or attach) to a barrier synchronization register which establishes a common checkpoint for each of the tasks. A leader task may use a shared memory region to publish to follower tasks the location of the barrier synchronization register—i.e., a barrier synchronization register ID. The follower tasks may then monitor the shared memory to determine the barrier synchronization register ID. The leader task may also use a count to ensure all the tasks attach to the BSR. This advantageously avoids any task-to-task communication which may reduce overhead and improve performance.Type: GrantFiled: December 7, 2012Date of Patent: August 11, 2015Assignee: International Business Machines CorporationInventors: Tsai-Yang Jea, William P. Lepera, HanHong Xue, Zhi Zhang
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Publication number: 20150222556Abstract: A message flow controller limits a process from passing a new message in a reliable message passing layer from a source node to at least one destination node while a total number of in-flight messages for the process meets a first level limit. The message flow controller limits the new message from passing from the source node to a particular destination node from among a plurality of destination nodes while a total number of in-flight messages to the particular destination node meets a second level limit. Responsive to the total number of in-flight messages to the particular destination node not meeting the second level limit, the message flow controller only sends a new packet from among at least one packet for the new message to the particular destination node while a total number of in-flight packets for the new message is less than a third level limit.Type: ApplicationFiled: April 17, 2015Publication date: August 6, 2015Inventors: UMAN CHAN, DERYCK X. HONG, TSAI-YANG JEA, CHULHO KIM, ZENON J. PIATEK, HUNG Q. THAI, ABHINAV VISHNU, HANHONG XUE
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Patent number: 9092272Abstract: A job may be divided into multiple tasks that may execute in parallel on one or more compute nodes. The tasks executing on the same compute node may be coordinated using barrier synchronization. However, to perform barrier synchronization, the tasks use (or attach) to a barrier synchronization register which establishes a common checkpoint for each of the tasks. A leader task may use a shared memory region to publish to follower tasks the location of the barrier synchronization register—i.e., a barrier synchronization register ID. The follower tasks may then monitor the shared memory to determine the barrier synchronization register ID. The leader task may also use a count to ensure all the tasks attach to the BSR. This advantageously avoids any task-to-task communication which may reduce overhead and improve performance.Type: GrantFiled: December 8, 2011Date of Patent: July 28, 2015Assignee: International Business Machines CorporationInventors: Tsai-Yang Jea, William P. LePera, Hanhong Xue, Zhi Zhang
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Publication number: 20150205888Abstract: A method, apparatus and program product simulate a high performance computing (HPC) application environment by creating a cluster of virtual nodes in one or more operating system instances executing on one or more physical computing node, thereby enabling a plurality of parallel tasks from an HPC application to be executed on the cluster of virtual nodes.Type: ApplicationFiled: January 17, 2014Publication date: July 23, 2015Applicant: International Business Machines CorporationInventors: Jun He, Tsai-Yang Jea, William P. LePera, Hanhong Xue
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Publication number: 20150205625Abstract: A method, apparatus and program product simulate a high performance computing (HPC) application environment by creating a cluster of virtual nodes in one or more operating system instances executing on one or more physical computing node, thereby enabling a plurality of parallel tasks from an HPC application to be executed on the cluster of virtual nodes.Type: ApplicationFiled: August 13, 2014Publication date: July 23, 2015Inventors: Jun He, Tsai-Yang Jea, William P. LePera, Hanhong Xue
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Publication number: 20150193277Abstract: In a distributed computing environment that includes compute nodes, where the compute nodes execute a plurality of tasks, a lock for resources may be administered. Administering the lock may be carried out by requesting, in an atomic operation by a requesting task, the lock, including: determining, by the requesting task, whether the lock is available; if the lock is available, obtaining the lock; and if the lock is unavailable, joining, by the requesting task, a queue of tasks waiting for availability of the lock.Type: ApplicationFiled: January 6, 2014Publication date: July 9, 2015Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: CHARLES J. ARCHER, TSAI-YANG JEA
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Publication number: 20150193278Abstract: In a distributed computing environment that includes compute nodes, where the compute nodes execute a plurality of tasks, a lock for resources may be administered. Administering the lock may be carried out by requesting, in an atomic operation by a requesting task, the lock, including: determining, by the requesting task, whether the lock is available; if the lock is available, obtaining the lock; and if the lock is unavailable, joining, by the requesting task, a queue of tasks waiting for availability of the lock.Type: ApplicationFiled: June 5, 2014Publication date: July 9, 2015Inventors: CHARLES J. ARCHER, TSAI-YANG JEA
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Patent number: 9049112Abstract: A message flow controller limits a process from passing a new message in a reliable message passing layer from a source node to at least one destination node while a total number of in-flight messages for the process meets a first level limit. The message flow controller limits the new message from passing from the source node to a particular destination node from among a plurality of destination nodes while a total number of in-flight messages to the particular destination node meets a second level limit. Responsive to the total number of in-flight messages to the particular destination node not meeting the second level limit, the message flow controller only sends a new packet from among at least one packet for the new message to the particular destination node while a total number of in-flight packets for the new message is less than a third level limit.Type: GrantFiled: April 5, 2013Date of Patent: June 2, 2015Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Uman Chan, Deryck X. Hong, Tsai-Yang Jea, Chulho Kim, Zenon J. Piatek, Hung Q. Thai, Abhinav Vishnu, Hanhong Xue
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Patent number: 9037805Abstract: A method for managing a cache region including receiving a new region to be stored within the cache, the cache including multiple regions defined by one or more ranges having a starting index and an ending index, and storing the new region in the cache in accordance with a cache invariant, the cache invariant ensuring that regions in the cache are not overlapping and that the regions are stored in a specified order.Type: GrantFiled: November 28, 2013Date of Patent: May 19, 2015Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Tsai-Yang Jea, Zhi Zhang
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Patent number: 9004762Abstract: A linear motion module comprises a linear rail, a sliding block and balls. The sliding block is slidingly disposed on the linear rail and comprises a sliding block body, circulation elements and end caps. The inside of the sliding block body is configured with inner circulation grooves, the inner circulation groove and the rail groove constitute an inner circulation passage, and each of two sides of the sliding block body is configured with at least a circulation channel that corresponds to the inner circulation passage and penetrates through the sliding block body. Each of the circulation elements includes at least a circulation tube, and the opposite two circulation tubes are connected to each other to constitute an outer circulation passage. Each of the end caps is configured with at least two circulation guiding grooves, and the circulation guiding groove is connected to the inner and outer circulation passages.Type: GrantFiled: December 9, 2013Date of Patent: April 14, 2015Assignee: TBI Motion Technology Co., Ltd.Inventors: Ching-Sheng Lee, Chin-Tsai Yang
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Patent number: 9003124Abstract: A system or computer usable program product for managing a cache region including receiving a new region to be stored within the cache, the cache including multiple regions defined by one or more ranges having a starting index and an ending index, and storing the new region in the cache in accordance with a cache invariant, the cache invariant ensuring that regions in the cache are not overlapping and that the regions are stored in a specified order.Type: GrantFiled: December 13, 2011Date of Patent: April 7, 2015Assignee: International Business Machines CorporationInventors: Tsai-Yang Jea, Zhi Zhang
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Publication number: 20150081862Abstract: Administering group identifiers of processes in a parallel computer includes each process in a set of processes, receiving from a compute node of the plurality of compute nodes, a request to establish the set of processes as an operational group including receiving a list of process identifiers for each process of the set of processes. Embodiments also include each process generating without communication amongst the processes, a unique group identifier in dependence upon the list of process identifiers.Type: ApplicationFiled: September 13, 2013Publication date: March 19, 2015Applicant: International Business Machines CorporationInventors: CHARLES J. ARCHER, TSAI-YANG JEA, CHULHO KIM
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Patent number: 8959528Abstract: Acknowledging incoming messages, including: determining, by an acknowledgement dispatching module, whether an incoming message has been received in an active message queue; responsive to determining that the incoming message has been received in the active message queue, resetting, by the acknowledgement dispatching module, an acknowledgment iteration counter; incrementing, by the acknowledgement dispatching module, the acknowledgment iteration counter; determining, by the acknowledgement dispatching module, whether the acknowledgment iteration counter has reached a predetermined threshold; and responsive to determining that the acknowledgment iteration counter has reached the predetermined threshold, processing, by the acknowledgement dispatching module, all messages in the active message queue.Type: GrantFiled: March 13, 2013Date of Patent: February 17, 2015Assignee: International Business Machines CorporationInventors: Tsai-Yang Jea, Serban C. Maerean, Ilie G. Tanase, Hanhong Xue
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Patent number: 8954991Abstract: Acknowledging incoming messages, including: determining, by an acknowledgement dispatching module, whether an incoming message has been received in an active message queue; responsive to determining that the incoming message has been received in the active message queue, resetting, by the acknowledgement dispatching module, an acknowledgment iteration counter; incrementing, by the acknowledgement dispatching module, the acknowledgment iteration counter; determining, by the acknowledgement dispatching module, whether the acknowledgment iteration counter has reached a predetermined threshold; and responsive to determining that the acknowledgment iteration counter has reached the predetermined threshold, processing, by the acknowledgement dispatching module, all messages in the active message queue.Type: GrantFiled: March 14, 2013Date of Patent: February 10, 2015Assignee: International Business Machines CorporationInventors: Tsai-Yang Jea, Serban C. Maerean, Ilie G. Tanase, Hanhong Xue
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Publication number: 20150027257Abstract: A ball screw includes a screw, a nut and a plurality of balls. The nut is slidingly disposed on the screw and includes a nut body and at least one end assembly. The end assembly includes an end circulation member, a dust-proof member and a fastening member. The fastening member and the end circulation member are disposed on the opposite sides of the dust-proof member. One side of the fastening member includes a plurality of projections, and the other side of the fastening member includes a plurality of indentations corresponding to the projections.Type: ApplicationFiled: December 9, 2013Publication date: January 29, 2015Applicant: TBI MOTION TECHNOLOGY CO., LTD.Inventors: Ching-Sheng LEE, Chin-Tsai YANG
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Publication number: 20140282612Abstract: Acknowledging incoming messages, including: determining, by an acknowledgement dispatching module, whether an incoming message has been received in an active message queue; responsive to determining that the incoming message has been received in the active message queue, resetting, by the acknowledgement dispatching module, an acknowledgment iteration counter; incrementing, by the acknowledgement dispatching module, the acknowledgment iteration counter; determining, by the acknowledgement dispatching module, whether the acknowledgment iteration counter has reached a predetermined threshold; and responsive to determining that the acknowledgment iteration counter has reached the predetermined threshold, processing, by the acknowledgement dispatching module, all messages in the active message queue.Type: ApplicationFiled: March 13, 2013Publication date: September 18, 2014Applicant: International Business Machines CorporationInventors: Tsai-Yang Jea, Serban C. Maerean, Ilie G. Tanase, Hanhong Xue
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Patent number: 8805952Abstract: In a distributed computing system that includes compute nodes that include computer memory, globally accessible memory space is administered by: for each compute node: mapping a memory region of a predefined size beginning at a predefined address; executing one or more memory management operations within the memory region, including, for each memory management operation executed within the memory region: executing the operation collectively by all compute nodes, where the operation includes a specification of one or more parameters and the parameters are the same across all compute nodes; receiving, by each compute node from a deterministic memory management module in response to the memory management operation, a return value, where the return value is the same across all compute nodes; entering, by each compute node after local completion of the memory management operation, a barrier; and when all compute nodes have entered the barrier, resuming execution.Type: GrantFiled: January 4, 2012Date of Patent: August 12, 2014Assignee: International Business Machines CorporationInventors: Tsai-Yang Jea, Yuan Yuan Nie
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Patent number: 8751600Abstract: In a distributed computing system that includes compute nodes that include computer memory, globally accessible memory space is administered by: for each compute node: mapping a memory region of a predefined size beginning at a predefined address; executing one or more memory management operations within the memory region, including, for each memory management operation executed within the memory region: executing the operation collectively by all compute nodes, where the operation includes a specification of one or more parameters and the parameters are the same across all compute nodes; receiving, by each compute node from a deterministic memory management module in response to the memory management operation, a return value, where the return value is the same across all compute nodes; entering, by each compute node after local completion of the memory management operation, a barrier; and when all compute nodes have entered the barrier, resuming execution.Type: GrantFiled: December 11, 2012Date of Patent: June 10, 2014Assignee: International Business Machines CorporationInventors: Tsai-Yang Jea, Yuan Yuan Nie
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Publication number: 20140089601Abstract: A method for managing a cache region including receiving a new region to be stored within the cache, the cache including multiple regions defined by one or more ranges having a starting index and an ending index, and storing the new region in the cache in accordance with a cache invariant, the cache invariant ensuring that regions in the cache are not overlapping and that the regions are stored in a specified order.Type: ApplicationFiled: November 28, 2013Publication date: March 27, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Tsai-Yang Jea, Zhi Zhang
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Patent number: 8625861Abstract: Techniques for generating a gradient characterization for a first fingerprint image are provided. One or more fingerprint feature points are selected from the first fingerprint image. A region is obtained for each of the one or more selected fingerprint feature points. The region is a representation of an area proximate a given fingerprint feature point. Each of the obtained regions is divided into a plurality of sub-regions. A histogram is generated for each of the plurality of sub-regions. For each of the one or more selected fingerprint feature points, the one or more generated histograms are combined into a concatenated histogram. The concatenated histogram is used for identification purposes.Type: GrantFiled: May 15, 2008Date of Patent: January 7, 2014Assignee: International Business Machines CorporationInventors: Gaurav Aggarwal, Rudolf Maarten Bolle, Tsai-Yang Jea, Nalini Kanta Ratha