Patents by Inventor Tsann Lin

Tsann Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220115586
    Abstract: A magnetic tunnel junction (MTJ) element is provided. The MTJ element includes a reference layer, a tunnel barrier layer disposed over the reference layer, a free layer disposed over the tunnel barrier layer, and a diffusion barrier layer disposed over the free layer. The MU element in accordance with the present disclosure exhibits a low resistance desired for a low-power write operation, and a high TIM coefficient desired for a low bit-error-rate (BER) read operation.
    Type: Application
    Filed: October 14, 2020
    Publication date: April 14, 2022
    Inventors: YA-LING LEE, TSANN LIN, HAN-JONG CHIA
  • Patent number: 11289538
    Abstract: A memory device including bit lines, auxiliary lines, selectors, and memory cells is provided. The word lines are intersected with the bit lines. The auxiliary lines are disposed between the word lines and the of bit lines. The selectors are inserted between the bit lines and the auxiliary lines. The memory cells are inserted between the word lines and the auxiliary lines.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: March 29, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ji-Feng Ying, Jhong-Sheng Wang, Tsann Lin
  • Publication number: 20220050150
    Abstract: In an embodiment, a device includes: a magnetoresistive random access memory cell including: a bottom electrode; a reference layer over the bottom electrode; a tunnel barrier layer over the reference layer, the tunnel barrier layer including a first composition of magnesium and oxygen; a free layer over the tunnel barrier layer, the free layer having a lesser coercivity than the reference layer; a cap layer over the free layer, the cap layer including a second composition of magnesium and oxygen, the second composition of magnesium and oxygen having a greater atomic concentration of oxygen and a lesser atomic concentration of magnesium than the first composition of magnesium and oxygen; and a top electrode over the cap layer.
    Type: Application
    Filed: August 12, 2020
    Publication date: February 17, 2022
    Inventors: Jui-Fen Chien, Wei-Gang Chiu, Tsann Lin
  • Publication number: 20220052254
    Abstract: A magnetic memory includes a first spin-orbital-transfer-spin-torque-transfer (SOT-STT) hybrid magnetic device disposed over a substrate, a second SOT-STT hybrid magnetic device disposed over the substrate, and a SOT conductive layer connected to the first and second SOT-STT hybrid magnetic devices. Each of the first and second SOT-STT hybrid magnetic devices includes a first magnetic layer, as a magnetic free layer, a spacer layer disposed under the first magnetic layer, and a second magnetic layer, as a magnetic reference layer, disposed under the spacer layer. The SOT conductive layer is disposed over the first magnetic layer of each of the first and second SOT-STT hybrid magnetic devices.
    Type: Application
    Filed: November 1, 2021
    Publication date: February 17, 2022
    Inventors: Ji-Feng YING, Jhong-Sheng WANG, Tsann LIN
  • Publication number: 20210390992
    Abstract: A method for forming a semiconductor memory structure is provided. The method includes following operations. An interlayer is formed over a first ferromagnetic layer, wherein forming the interlayer includes following operations. A first metal film is formed by sputtering a first target material. A first oxygen treatment is conducted to the first metal film to form a first metal oxide film. A second metal oxide film is formed over the first metal oxide film by sputtering a second target material different from the first target material. A second metal film is formed by sputtering a third target material. A second oxygen treatment is conducted to the second metal film to form a third metal oxide film.
    Type: Application
    Filed: June 15, 2020
    Publication date: December 16, 2021
    Inventors: Jui-Fen Chien, Hanwen Yeh, Tsann Lin
  • Publication number: 20210359002
    Abstract: Some embodiments relate to a method for manufacturing a memory device. The method includes forming a bottom electrode layer over a substrate. A first etch process is performed, thereby defining one or more holes in the bottom electrode layer and defining a bottom electrode. A pair of insulators are formed within the one or more holes such that the insulators are disposed on opposing sides of the bottom electrode. A buffer layer, a seed layer, a magnetic tunnel junction (MTJ) stack, and a top electrode are formed over the bottom electrode. A second etch process is performed to remove a portion of the buffer layer, the seed layer, the MTJ stack, and the top electrode, thereby defining a memory cell.
    Type: Application
    Filed: July 29, 2021
    Publication date: November 18, 2021
    Inventors: Tsann Lin, Chien-Min Lee, Ji-Feng Ying
  • Patent number: 11177433
    Abstract: The disclosed technology generally relates semiconductor devices, and relates more particularly to a spin transfer torque device, a method of operating the spin-transfer torque device and a method of fabricating the spin-transfer torque device. According to one aspect, a spin-transfer torque device includes a magnetic flux guide layer and a set of magnetic tunnel junction (MTJ) pillars arranged above the magnetic flux guide layer. Each one of the pillars includes a separate free layer, a separate tunnel barrier layer and a separate reference layer. A coupling layer is arranged between the magnetic flux guide layer and the MTJ pillars, wherein a magnetization of the separate free layer of each of the each of the MTJ pillars is coupled, parallel or antiparallel, to a magnetization of the magnetic flux guide layer through the coupling layer.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: November 16, 2021
    Assignee: IMEC vzw
    Inventors: Tsann Lin, Johan Swerts
  • Patent number: 11165012
    Abstract: A magnetic memory including a first spin-orbital-transfer-spin-torque-transfer (SOT-SIT) hybrid magnetic device disposed over a substrate, a second SOT-STT hybrid magnetic device disposed over the substrate, and a SOT conductive layer connected to the first and second SOT-STT hybrid magnetic devices. Each of the first and second SOT-STT hybrid magnetic devices includes a first magnetic layer, as a magnetic free layer, a spacer layer disposed under the first magnetic layer, and a second magnetic layer, as a magnetic reference layer, disposed under the spacer layer. The SOT conductive layer is disposed over the first magnetic layer of each of the first and second SOT-STT hybrid magnetic devices.
    Type: Grant
    Filed: October 3, 2019
    Date of Patent: November 2, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ji-Feng Ying, Jhong-Sheng Wang, Tsann Lin
  • Patent number: 11088201
    Abstract: Some embodiments relate to a memory device. The memory device includes a magnetoresistive random-access memory (MRAM) cell comprising a magnetic tunnel junction (MTJ). The MTJ device comprises a stack of layers, comprising a bottom electrode disposed over a substrate. A seed layer disposed over the bottom electrode. A buffer layer is disposed between the bottom electrode and the seed layer. The buffer layer prevents diffusion of a diffusive species from the bottom electrode to the seed layer.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: August 10, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsann Lin, Chien-Min Lee, Ji-Feng Ying
  • Publication number: 20210036055
    Abstract: A memory device including bit lines, auxiliary lines, selectors, and memory cells is provided. The word lines are intersected with the bit lines. The auxiliary lines are disposed between the word lines and the of bit lines. The selectors are inserted between the bit lines and the auxiliary lines. The memory cells are inserted between the word lines and the auxiliary lines.
    Type: Application
    Filed: January 9, 2020
    Publication date: February 4, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ji-Feng Ying, Jhong-Sheng Wang, Tsann Lin
  • Publication number: 20200136018
    Abstract: A magnetic memory including a first spin-orbital-transfer-spin-torque-transfer (SOT-STT) hybrid magnetic device disposed over a substrate, a second SOT-STT hybrid magnetic device disposed over the substrate, and a SOT conductive layer connected to the first and second SOT devices. Each of the first and second SOT-STT hybrid magnetic devices includes a first magnetic layer, as a magnetic free layer, a spacer layer disposed under the first magnetic layer, and a second magnetic layer, as a magnetic reference layer, disposed under the spacer layer. The SOT conductive layer is disposed over the first magnetic layer of each of the first and second SOT-STT hybrid magnetic devices.
    Type: Application
    Filed: October 3, 2019
    Publication date: April 30, 2020
    Inventors: Ji-Feng YING, Jhong-Sheng WANG, Tsann LIN
  • Publication number: 20200098408
    Abstract: Some embodiments relate to a memory device. The memory device includes a magnetoresistive random-access memory (MRAM) cell comprising a magnetic tunnel junction (MTJ). The MTJ device comprises a stack of layers, comprising a bottom electrode disposed over a substrate. A seed layer disposed over the bottom electrode. A buffer layer is disposed between the bottom electrode and the seed layer. The buffer layer prevents diffusion of a diffusive species from the bottom electrode to the seed layer.
    Type: Application
    Filed: July 5, 2019
    Publication date: March 26, 2020
    Inventors: Tsann Lin, Ji-Feng Ying, Chih-Chung Lai
  • Publication number: 20200006425
    Abstract: Some embodiments relate to a memory device. The memory device includes a magnetoresistive random-access memory (MRAM) cell comprising a magnetic tunnel junction (MTJ). The MTJ device comprises a stack of layers, comprising a bottom electrode disposed over a substrate. A seed layer disposed over the bottom electrode. A buffer layer is disposed between the bottom electrode and the seed layer. The buffer layer prevents diffusion of a diffusive species from the bottom electrode to the seed layer.
    Type: Application
    Filed: April 2, 2019
    Publication date: January 2, 2020
    Inventors: Tsann Lin, Chien-Min Lee, Ji-Feng Ying
  • Publication number: 20190189915
    Abstract: The disclosed technology generally relates semiconductor devices, and relates more particularly to a spin transfer torque device, a method of operating the spin-transfer torque device and a method of fabricating the spin-transfer torque device. According to one aspect, a spin-transfer torque device includes a magnetic flux guide layer and a set of magnetic tunnel junction (MTJ) pillars arranged above the magnetic flux guide layer. Each one of the pillars includes a separate free layer, a separate tunnel barrier layer and a separate reference layer. A coupling layer is arranged between the magnetic flux guide layer and the MTJ pillars, wherein a magnetization of the separate free layer of each of the each of the MTJ pillars is coupled, parallel or antiparallel, to a magnetization of the magnetic flux guide layer through the coupling layer.
    Type: Application
    Filed: November 30, 2018
    Publication date: June 20, 2019
    Inventors: Tsann Lin, Johan Swerts
  • Publication number: 20190067564
    Abstract: The disclosed technology generally relates to magnetic memory devices, and more particularly to spin transfer torque magnetic random access memory (STT-MRAM) devices having a magnetic tunnel junction (MTJ), and further relates to methods of fabricating the STT-MRAM devices. In an aspect, a magnetoresistive random access memory (MRAM) device has a magnetic tunnel junction (MTJ). The MTJ includes a magnetic reference layer comprising CoFeB, a magnetic free layer comprising CoFeB, and a barrier layer comprising MgO. The barrier layer is interposed between the magnetic reference layer and the magnetic free layer. The barrier layer has a thickness adapted to tunnel electrons between the magnetic reference layer and the magnetic free layer sufficient to cause a change in the magnetization direction of the variable magnetization under a bias. The MTJ further comprises a buffer layer comprising one or more of Co, Fe, CoFe and CoFeB, where the buffer layer is doped with one or both of C and N.
    Type: Application
    Filed: August 13, 2018
    Publication date: February 28, 2019
    Inventors: Johan Swerts, Kiroubanand Sankaran, Tsann Lin, Geoffrey Pourtois
  • Patent number: 10050192
    Abstract: The disclosed technology generally relates to magnetic memory devices, and more particularly to spin transfer torque magnetic random access memory (STT-MRAM) devices having a magnetic tunnel junction (MTJ), and further relates to methods of fabricating the STT-MRAM devices. In an aspect, a magnetoresistive random access memory (MRAM) device has a magnetic tunnel junction (MTJ). The MTJ includes a magnetic reference layer including CoFeB, a magnetic free layer comprising CoFeB, and a barrier layer including MgO. The barrier layer is interposed between the magnetic reference layer and the magnetic free layer. The barrier layer has a thickness adapted to tunnel electrons between the magnetic reference layer and the magnetic free layer sufficient to cause a change in the magnetization direction of the variable magnetization under a bias. The MTJ further comprises a buffer layer comprising one or more of Co, Fe, CoFe and CoFeB, where the buffer layer is doped with one or both of C and N.
    Type: Grant
    Filed: December 8, 2016
    Date of Patent: August 14, 2018
    Assignee: IMEC vzw
    Inventors: Johan Swerts, Kiroubanand Sankaran, Tsann Lin, Geoffrey Pourtois
  • Publication number: 20170170390
    Abstract: The disclosed technology generally relates to magnetic memory devices, and more particularly to spin transfer torque magnetic random access memory (STT-MRAM) devices having a magnetic tunnel junction (MTJ), and further relates to methods of fabricating the STT-MRAM devices. In an aspect, a magnetoresistive random access memory (MRAM) device has a magnetic tunnel junction (MTJ). The MTJ includes a magnetic reference layer comprising CoFeB, a magnetic free layer comprising CoFeB, and a barrier layer comprising MgO. The barrier layer is interposed between the magnetic reference layer and the magnetic free layer. The barrier layer has a thickness adapted to tunnel electrons between the magnetic reference layer and the magnetic free layer sufficient to cause a change in the magnetization direction of the variable magnetization under a bias. The MTJ further comprises a buffer layer comprising one or more of Co, Fe, CoFe and CoFeB, where the buffer layer is doped with one or both of C and N.
    Type: Application
    Filed: December 8, 2016
    Publication date: June 15, 2017
    Inventors: Johan Swerts, Kiroubanand Sankaran, Tsann Lin, Geoffrey Pourtois
  • Patent number: 8947835
    Abstract: The invention provides a tunneling magnetoresistance (TMR) read sensor with a long diffusion path and ex-situ interfaces in a sense layer structure. The sense layer structure comprises a first sense layer preferably formed of a ferromagnetic Co—Fe film, a second sense layer preferably formed of a ferromagnetic Co—Fe—B film, and a third sense layer preferably formed of a ferromagnetic Ni—Fe film. The sense layer structure has a long diffusion path (defined as a total thickness of the first and second sense layers) and ex-situ interfaces for suppressing unwanted diffusions of Ni atoms. Alternatively, the sense layer structure comprises a first sense layer preferably formed of a ferromagnetic Co—Fe film, a second sense layer preferably formed of a ferromagnetic Co—Fe—B film, a third sense layer preferably formed of a ferromagnetic Co—Fe—B—Hf film, and a fourth sense layer preferably formed of a ferromagnetic Ni—Fe film.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: February 3, 2015
    Assignee: HGST Netherlands B.V.
    Inventor: Tsann Lin
  • Patent number: 8946707
    Abstract: The invention provides a tunneling magnetoresistance (TMR) read sensor with an integrated auxiliary shield comprising buffer, parallel-coupling, shielding and decoupling layers for high-resolution magnetic recording. The buffer layer, preferably formed of an amorphous ferromagnetic Co—X (where X is Hf, Y, Zr, etc.) film, creates microstructural discontinuity between a lower ferromagnetic shield and the TMR read sensor. The parallel-coupling layer, preferably formed of a polycrystalline nonmagnetic Ru film, causes parallel coupling between the buffer and shielding layers. The shielding layer, preferably formed of a polycrystalline ferromagnetic Ni—Fe film exactly identical to that used as the lower ferromagnetic shield, shields magnetic fluxes stemming from a recording medium into the lower edge of the TMR read sensor.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: February 3, 2015
    Assignee: HGST Netherlands B.V.
    Inventor: Tsann Lin
  • Patent number: 8836000
    Abstract: The invention provides a bottom-type perpendicular magnetic tunnel junction (pMTJ) element with thermally stable amorphous blocking layers for high-density nonvolatile data storage. The first blocking layer, preferably formed of an amorphous nonmagnetic film, blocks a polycrystalline diffusion barrier layer with a body-center-cubic (bcc) <110> texture in order for the keeper and lower reference layers of the bottom-type pMTJ element to freely grow with a face-centered-cubic (fcc) <111> texture, thereby developing strong perpendicular magnetic anisotropy (PMA). The second blocking layer, preferably formed of an amorphous ferromagnetic film, blocks the keeper and lower reference layers of the bottom-type pMTJ element in order for the upper reference, barrier and storage layers of the bottom-type pMTJ element to freely grow with a <001> texture, thereby exhibiting a strong tunneling magnetoresistance (TMR) effect.
    Type: Grant
    Filed: May 10, 2013
    Date of Patent: September 16, 2014
    Assignee: Avalanche Technology, Inc.
    Inventor: Tsann Lin